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bootstage: Correct printf types
[people/ms/u-boot.git] / common / cmd_pci.c
1 /*
2 * (C) Copyright 2001 Sysgo Real-Time Solutions, GmbH <www.elinos.com>
3 * Andreas Heppel <aheppel@sysgo.de>
4 *
5 * (C) Copyright 2002
6 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7 * Wolfgang Grandegger, DENX Software Engineering, wg@denx.de.
8 *
9 * See file CREDITS for list of people who contributed to this
10 * project.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * MA 02111-1307 USA
26 */
27
28 /*
29 * PCI routines
30 */
31
32 #include <common.h>
33 #include <command.h>
34 #include <asm/processor.h>
35 #include <asm/io.h>
36 #include <pci.h>
37
38 /*
39 * Follows routines for the output of infos about devices on PCI bus.
40 */
41
42 void pci_header_show(pci_dev_t dev);
43 void pci_header_show_brief(pci_dev_t dev);
44
45 /*
46 * Subroutine: pciinfo
47 *
48 * Description: Show information about devices on PCI bus.
49 * Depending on the define CONFIG_SYS_SHORT_PCI_LISTING
50 * the output will be more or less exhaustive.
51 *
52 * Inputs: bus_no the number of the bus to be scanned.
53 *
54 * Return: None
55 *
56 */
57 void pciinfo(int BusNum, int ShortPCIListing)
58 {
59 int Device;
60 int Function;
61 unsigned char HeaderType;
62 unsigned short VendorID;
63 pci_dev_t dev;
64
65 printf("Scanning PCI devices on bus %d\n", BusNum);
66
67 if (ShortPCIListing) {
68 printf("BusDevFun VendorId DeviceId Device Class Sub-Class\n");
69 printf("_____________________________________________________________\n");
70 }
71
72 for (Device = 0; Device < PCI_MAX_PCI_DEVICES; Device++) {
73 HeaderType = 0;
74 VendorID = 0;
75 for (Function = 0; Function < PCI_MAX_PCI_FUNCTIONS; Function++) {
76 /*
77 * If this is not a multi-function device, we skip the rest.
78 */
79 if (Function && !(HeaderType & 0x80))
80 break;
81
82 dev = PCI_BDF(BusNum, Device, Function);
83
84 pci_read_config_word(dev, PCI_VENDOR_ID, &VendorID);
85 if ((VendorID == 0xFFFF) || (VendorID == 0x0000))
86 continue;
87
88 if (!Function) pci_read_config_byte(dev, PCI_HEADER_TYPE, &HeaderType);
89
90 if (ShortPCIListing)
91 {
92 printf("%02x.%02x.%02x ", BusNum, Device, Function);
93 pci_header_show_brief(dev);
94 }
95 else
96 {
97 printf("\nFound PCI device %02x.%02x.%02x:\n",
98 BusNum, Device, Function);
99 pci_header_show(dev);
100 }
101 }
102 }
103 }
104
105
106 /*
107 * Subroutine: pci_header_show_brief
108 *
109 * Description: Reads and prints the header of the
110 * specified PCI device in short form.
111 *
112 * Inputs: dev Bus+Device+Function number
113 *
114 * Return: None
115 *
116 */
117 void pci_header_show_brief(pci_dev_t dev)
118 {
119 u16 vendor, device;
120 u8 class, subclass;
121
122 pci_read_config_word(dev, PCI_VENDOR_ID, &vendor);
123 pci_read_config_word(dev, PCI_DEVICE_ID, &device);
124 pci_read_config_byte(dev, PCI_CLASS_CODE, &class);
125 pci_read_config_byte(dev, PCI_CLASS_SUB_CODE, &subclass);
126
127 printf("0x%.4x 0x%.4x %-23s 0x%.2x\n",
128 vendor, device,
129 pci_class_str(class), subclass);
130 }
131
132 /*
133 * Subroutine: PCI_Header_Show
134 *
135 * Description: Reads the header of the specified PCI device.
136 *
137 * Inputs: BusDevFunc Bus+Device+Function number
138 *
139 * Return: None
140 *
141 */
142 void pci_header_show(pci_dev_t dev)
143 {
144 u8 _byte, header_type;
145 u16 _word;
146 u32 _dword;
147
148 #define PRINT(msg, type, reg) \
149 pci_read_config_##type(dev, reg, &_##type); \
150 printf(msg, _##type)
151
152 #define PRINT2(msg, type, reg, func) \
153 pci_read_config_##type(dev, reg, &_##type); \
154 printf(msg, _##type, func(_##type))
155
156 pci_read_config_byte(dev, PCI_HEADER_TYPE, &header_type);
157
158 PRINT (" vendor ID = 0x%.4x\n", word, PCI_VENDOR_ID);
159 PRINT (" device ID = 0x%.4x\n", word, PCI_DEVICE_ID);
160 PRINT (" command register = 0x%.4x\n", word, PCI_COMMAND);
161 PRINT (" status register = 0x%.4x\n", word, PCI_STATUS);
162 PRINT (" revision ID = 0x%.2x\n", byte, PCI_REVISION_ID);
163 PRINT2(" class code = 0x%.2x (%s)\n", byte, PCI_CLASS_CODE,
164 pci_class_str);
165 PRINT (" sub class code = 0x%.2x\n", byte, PCI_CLASS_SUB_CODE);
166 PRINT (" programming interface = 0x%.2x\n", byte, PCI_CLASS_PROG);
167 PRINT (" cache line = 0x%.2x\n", byte, PCI_CACHE_LINE_SIZE);
168 PRINT (" latency time = 0x%.2x\n", byte, PCI_LATENCY_TIMER);
169 PRINT (" header type = 0x%.2x\n", byte, PCI_HEADER_TYPE);
170 PRINT (" BIST = 0x%.2x\n", byte, PCI_BIST);
171 PRINT (" base address 0 = 0x%.8x\n", dword, PCI_BASE_ADDRESS_0);
172
173 switch (header_type & 0x03) {
174 case PCI_HEADER_TYPE_NORMAL: /* "normal" PCI device */
175 PRINT (" base address 1 = 0x%.8x\n", dword, PCI_BASE_ADDRESS_1);
176 PRINT (" base address 2 = 0x%.8x\n", dword, PCI_BASE_ADDRESS_2);
177 PRINT (" base address 3 = 0x%.8x\n", dword, PCI_BASE_ADDRESS_3);
178 PRINT (" base address 4 = 0x%.8x\n", dword, PCI_BASE_ADDRESS_4);
179 PRINT (" base address 5 = 0x%.8x\n", dword, PCI_BASE_ADDRESS_5);
180 PRINT (" cardBus CIS pointer = 0x%.8x\n", dword, PCI_CARDBUS_CIS);
181 PRINT (" sub system vendor ID = 0x%.4x\n", word, PCI_SUBSYSTEM_VENDOR_ID);
182 PRINT (" sub system ID = 0x%.4x\n", word, PCI_SUBSYSTEM_ID);
183 PRINT (" expansion ROM base address = 0x%.8x\n", dword, PCI_ROM_ADDRESS);
184 PRINT (" interrupt line = 0x%.2x\n", byte, PCI_INTERRUPT_LINE);
185 PRINT (" interrupt pin = 0x%.2x\n", byte, PCI_INTERRUPT_PIN);
186 PRINT (" min Grant = 0x%.2x\n", byte, PCI_MIN_GNT);
187 PRINT (" max Latency = 0x%.2x\n", byte, PCI_MAX_LAT);
188 break;
189
190 case PCI_HEADER_TYPE_BRIDGE: /* PCI-to-PCI bridge */
191
192 PRINT (" base address 1 = 0x%.8x\n", dword, PCI_BASE_ADDRESS_1);
193 PRINT (" primary bus number = 0x%.2x\n", byte, PCI_PRIMARY_BUS);
194 PRINT (" secondary bus number = 0x%.2x\n", byte, PCI_SECONDARY_BUS);
195 PRINT (" subordinate bus number = 0x%.2x\n", byte, PCI_SUBORDINATE_BUS);
196 PRINT (" secondary latency timer = 0x%.2x\n", byte, PCI_SEC_LATENCY_TIMER);
197 PRINT (" IO base = 0x%.2x\n", byte, PCI_IO_BASE);
198 PRINT (" IO limit = 0x%.2x\n", byte, PCI_IO_LIMIT);
199 PRINT (" secondary status = 0x%.4x\n", word, PCI_SEC_STATUS);
200 PRINT (" memory base = 0x%.4x\n", word, PCI_MEMORY_BASE);
201 PRINT (" memory limit = 0x%.4x\n", word, PCI_MEMORY_LIMIT);
202 PRINT (" prefetch memory base = 0x%.4x\n", word, PCI_PREF_MEMORY_BASE);
203 PRINT (" prefetch memory limit = 0x%.4x\n", word, PCI_PREF_MEMORY_LIMIT);
204 PRINT (" prefetch memory base upper = 0x%.8x\n", dword, PCI_PREF_BASE_UPPER32);
205 PRINT (" prefetch memory limit upper = 0x%.8x\n", dword, PCI_PREF_LIMIT_UPPER32);
206 PRINT (" IO base upper 16 bits = 0x%.4x\n", word, PCI_IO_BASE_UPPER16);
207 PRINT (" IO limit upper 16 bits = 0x%.4x\n", word, PCI_IO_LIMIT_UPPER16);
208 PRINT (" expansion ROM base address = 0x%.8x\n", dword, PCI_ROM_ADDRESS1);
209 PRINT (" interrupt line = 0x%.2x\n", byte, PCI_INTERRUPT_LINE);
210 PRINT (" interrupt pin = 0x%.2x\n", byte, PCI_INTERRUPT_PIN);
211 PRINT (" bridge control = 0x%.4x\n", word, PCI_BRIDGE_CONTROL);
212 break;
213
214 case PCI_HEADER_TYPE_CARDBUS: /* PCI-to-CardBus bridge */
215
216 PRINT (" capabilities = 0x%.2x\n", byte, PCI_CB_CAPABILITY_LIST);
217 PRINT (" secondary status = 0x%.4x\n", word, PCI_CB_SEC_STATUS);
218 PRINT (" primary bus number = 0x%.2x\n", byte, PCI_CB_PRIMARY_BUS);
219 PRINT (" CardBus number = 0x%.2x\n", byte, PCI_CB_CARD_BUS);
220 PRINT (" subordinate bus number = 0x%.2x\n", byte, PCI_CB_SUBORDINATE_BUS);
221 PRINT (" CardBus latency timer = 0x%.2x\n", byte, PCI_CB_LATENCY_TIMER);
222 PRINT (" CardBus memory base 0 = 0x%.8x\n", dword, PCI_CB_MEMORY_BASE_0);
223 PRINT (" CardBus memory limit 0 = 0x%.8x\n", dword, PCI_CB_MEMORY_LIMIT_0);
224 PRINT (" CardBus memory base 1 = 0x%.8x\n", dword, PCI_CB_MEMORY_BASE_1);
225 PRINT (" CardBus memory limit 1 = 0x%.8x\n", dword, PCI_CB_MEMORY_LIMIT_1);
226 PRINT (" CardBus IO base 0 = 0x%.4x\n", word, PCI_CB_IO_BASE_0);
227 PRINT (" CardBus IO base high 0 = 0x%.4x\n", word, PCI_CB_IO_BASE_0_HI);
228 PRINT (" CardBus IO limit 0 = 0x%.4x\n", word, PCI_CB_IO_LIMIT_0);
229 PRINT (" CardBus IO limit high 0 = 0x%.4x\n", word, PCI_CB_IO_LIMIT_0_HI);
230 PRINT (" CardBus IO base 1 = 0x%.4x\n", word, PCI_CB_IO_BASE_1);
231 PRINT (" CardBus IO base high 1 = 0x%.4x\n", word, PCI_CB_IO_BASE_1_HI);
232 PRINT (" CardBus IO limit 1 = 0x%.4x\n", word, PCI_CB_IO_LIMIT_1);
233 PRINT (" CardBus IO limit high 1 = 0x%.4x\n", word, PCI_CB_IO_LIMIT_1_HI);
234 PRINT (" interrupt line = 0x%.2x\n", byte, PCI_INTERRUPT_LINE);
235 PRINT (" interrupt pin = 0x%.2x\n", byte, PCI_INTERRUPT_PIN);
236 PRINT (" bridge control = 0x%.4x\n", word, PCI_CB_BRIDGE_CONTROL);
237 PRINT (" subvendor ID = 0x%.4x\n", word, PCI_CB_SUBSYSTEM_VENDOR_ID);
238 PRINT (" subdevice ID = 0x%.4x\n", word, PCI_CB_SUBSYSTEM_ID);
239 PRINT (" PC Card 16bit base address = 0x%.8x\n", dword, PCI_CB_LEGACY_MODE_BASE);
240 break;
241
242 default:
243 printf("unknown header\n");
244 break;
245 }
246
247 #undef PRINT
248 #undef PRINT2
249 }
250
251 /* Convert the "bus.device.function" identifier into a number.
252 */
253 static pci_dev_t get_pci_dev(char* name)
254 {
255 char cnum[12];
256 int len, i, iold, n;
257 int bdfs[3] = {0,0,0};
258
259 len = strlen(name);
260 if (len > 8)
261 return -1;
262 for (i = 0, iold = 0, n = 0; i < len; i++) {
263 if (name[i] == '.') {
264 memcpy(cnum, &name[iold], i - iold);
265 cnum[i - iold] = '\0';
266 bdfs[n++] = simple_strtoul(cnum, NULL, 16);
267 iold = i + 1;
268 }
269 }
270 strcpy(cnum, &name[iold]);
271 if (n == 0)
272 n = 1;
273 bdfs[n] = simple_strtoul(cnum, NULL, 16);
274 return PCI_BDF(bdfs[0], bdfs[1], bdfs[2]);
275 }
276
277 static int pci_cfg_display(pci_dev_t bdf, ulong addr, ulong size, ulong length)
278 {
279 #define DISP_LINE_LEN 16
280 ulong i, nbytes, linebytes;
281 int rc = 0;
282
283 if (length == 0)
284 length = 0x40 / size; /* Standard PCI configuration space */
285
286 /* Print the lines.
287 * once, and all accesses are with the specified bus width.
288 */
289 nbytes = length * size;
290 do {
291 uint val4;
292 ushort val2;
293 u_char val1;
294
295 printf("%08lx:", addr);
296 linebytes = (nbytes>DISP_LINE_LEN)?DISP_LINE_LEN:nbytes;
297 for (i=0; i<linebytes; i+= size) {
298 if (size == 4) {
299 pci_read_config_dword(bdf, addr, &val4);
300 printf(" %08x", val4);
301 } else if (size == 2) {
302 pci_read_config_word(bdf, addr, &val2);
303 printf(" %04x", val2);
304 } else {
305 pci_read_config_byte(bdf, addr, &val1);
306 printf(" %02x", val1);
307 }
308 addr += size;
309 }
310 printf("\n");
311 nbytes -= linebytes;
312 if (ctrlc()) {
313 rc = 1;
314 break;
315 }
316 } while (nbytes > 0);
317
318 return (rc);
319 }
320
321 static int pci_cfg_write (pci_dev_t bdf, ulong addr, ulong size, ulong value)
322 {
323 if (size == 4) {
324 pci_write_config_dword(bdf, addr, value);
325 }
326 else if (size == 2) {
327 ushort val = value & 0xffff;
328 pci_write_config_word(bdf, addr, val);
329 }
330 else {
331 u_char val = value & 0xff;
332 pci_write_config_byte(bdf, addr, val);
333 }
334 return 0;
335 }
336
337 static int
338 pci_cfg_modify (pci_dev_t bdf, ulong addr, ulong size, ulong value, int incrflag)
339 {
340 ulong i;
341 int nbytes;
342 uint val4;
343 ushort val2;
344 u_char val1;
345
346 /* Print the address, followed by value. Then accept input for
347 * the next value. A non-converted value exits.
348 */
349 do {
350 printf("%08lx:", addr);
351 if (size == 4) {
352 pci_read_config_dword(bdf, addr, &val4);
353 printf(" %08x", val4);
354 }
355 else if (size == 2) {
356 pci_read_config_word(bdf, addr, &val2);
357 printf(" %04x", val2);
358 }
359 else {
360 pci_read_config_byte(bdf, addr, &val1);
361 printf(" %02x", val1);
362 }
363
364 nbytes = readline (" ? ");
365 if (nbytes == 0 || (nbytes == 1 && console_buffer[0] == '-')) {
366 /* <CR> pressed as only input, don't modify current
367 * location and move to next. "-" pressed will go back.
368 */
369 if (incrflag)
370 addr += nbytes ? -size : size;
371 nbytes = 1;
372 #ifdef CONFIG_BOOT_RETRY_TIME
373 reset_cmd_timeout(); /* good enough to not time out */
374 #endif
375 }
376 #ifdef CONFIG_BOOT_RETRY_TIME
377 else if (nbytes == -2) {
378 break; /* timed out, exit the command */
379 }
380 #endif
381 else {
382 char *endp;
383 i = simple_strtoul(console_buffer, &endp, 16);
384 nbytes = endp - console_buffer;
385 if (nbytes) {
386 #ifdef CONFIG_BOOT_RETRY_TIME
387 /* good enough to not time out
388 */
389 reset_cmd_timeout();
390 #endif
391 pci_cfg_write (bdf, addr, size, i);
392 if (incrflag)
393 addr += size;
394 }
395 }
396 } while (nbytes);
397
398 return 0;
399 }
400
401 /* PCI Configuration Space access commands
402 *
403 * Syntax:
404 * pci display[.b, .w, .l] bus.device.function} [addr] [len]
405 * pci next[.b, .w, .l] bus.device.function [addr]
406 * pci modify[.b, .w, .l] bus.device.function [addr]
407 * pci write[.b, .w, .l] bus.device.function addr value
408 */
409 static int do_pci(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
410 {
411 ulong addr = 0, value = 0, size = 0;
412 pci_dev_t bdf = 0;
413 char cmd = 's';
414
415 if (argc > 1)
416 cmd = argv[1][0];
417
418 switch (cmd) {
419 case 'd': /* display */
420 case 'n': /* next */
421 case 'm': /* modify */
422 case 'w': /* write */
423 /* Check for a size specification. */
424 size = cmd_get_data_size(argv[1], 4);
425 if (argc > 3)
426 addr = simple_strtoul(argv[3], NULL, 16);
427 if (argc > 4)
428 value = simple_strtoul(argv[4], NULL, 16);
429 case 'h': /* header */
430 if (argc < 3)
431 goto usage;
432 if ((bdf = get_pci_dev(argv[2])) == -1)
433 return 1;
434 break;
435 #ifdef CONFIG_CMD_PCI_ENUM
436 case 'e':
437 break;
438 #endif
439 default: /* scan bus */
440 value = 1; /* short listing */
441 bdf = 0; /* bus number */
442 if (argc > 1) {
443 if (argv[argc-1][0] == 'l') {
444 value = 0;
445 argc--;
446 }
447 if (argc > 1)
448 bdf = simple_strtoul(argv[1], NULL, 16);
449 }
450 pciinfo(bdf, value);
451 return 0;
452 }
453
454 switch (argv[1][0]) {
455 case 'h': /* header */
456 pci_header_show(bdf);
457 return 0;
458 case 'd': /* display */
459 return pci_cfg_display(bdf, addr, size, value);
460 #ifdef CONFIG_CMD_PCI_ENUM
461 case 'e':
462 pci_init();
463 return 0;
464 #endif
465 case 'n': /* next */
466 if (argc < 4)
467 goto usage;
468 return pci_cfg_modify(bdf, addr, size, value, 0);
469 case 'm': /* modify */
470 if (argc < 4)
471 goto usage;
472 return pci_cfg_modify(bdf, addr, size, value, 1);
473 case 'w': /* write */
474 if (argc < 5)
475 goto usage;
476 return pci_cfg_write(bdf, addr, size, value);
477 }
478
479 return 1;
480 usage:
481 return CMD_RET_USAGE;
482 }
483
484 /***************************************************/
485
486 #ifdef CONFIG_SYS_LONGHELP
487 static char pci_help_text[] =
488 "[bus] [long]\n"
489 " - short or long list of PCI devices on bus 'bus'\n"
490 #ifdef CONFIG_CMD_PCI_ENUM
491 "pci enum\n"
492 " - re-enumerate PCI buses\n"
493 #endif
494 "pci header b.d.f\n"
495 " - show header of PCI device 'bus.device.function'\n"
496 "pci display[.b, .w, .l] b.d.f [address] [# of objects]\n"
497 " - display PCI configuration space (CFG)\n"
498 "pci next[.b, .w, .l] b.d.f address\n"
499 " - modify, read and keep CFG address\n"
500 "pci modify[.b, .w, .l] b.d.f address\n"
501 " - modify, auto increment CFG address\n"
502 "pci write[.b, .w, .l] b.d.f address value\n"
503 " - write to CFG address";
504 #endif
505
506 U_BOOT_CMD(
507 pci, 5, 1, do_pci,
508 "list and access PCI Configuration Space", pci_help_text
509 );
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