2 * (C) Copyright 2001 Sysgo Real-Time Solutions, GmbH <www.elinos.com>
3 * Andreas Heppel <aheppel@sysgo.de>
6 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7 * Wolfgang Grandegger, DENX Software Engineering, wg@denx.de.
9 * See file CREDITS for list of people who contributed to this
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
34 #include <asm/processor.h>
38 unsigned char ShortPCIListing
= 1;
41 * Follows routines for the output of infos about devices on PCI bus.
44 void pci_header_show(pci_dev_t dev
);
45 void pci_header_show_brief(pci_dev_t dev
);
50 * Description: Show information about devices on PCI bus.
51 * Depending on the define CONFIG_SYS_SHORT_PCI_LISTING
52 * the output will be more or less exhaustive.
54 * Inputs: bus_no the number of the bus to be scanned.
59 void pciinfo(int BusNum
, int ShortPCIListing
)
63 unsigned char HeaderType
;
64 unsigned short VendorID
;
67 printf("Scanning PCI devices on bus %d\n", BusNum
);
69 if (ShortPCIListing
) {
70 printf("BusDevFun VendorId DeviceId Device Class Sub-Class\n");
71 printf("_____________________________________________________________\n");
74 for (Device
= 0; Device
< PCI_MAX_PCI_DEVICES
; Device
++) {
77 for (Function
= 0; Function
< PCI_MAX_PCI_FUNCTIONS
; Function
++) {
79 * If this is not a multi-function device, we skip the rest.
81 if (Function
&& !(HeaderType
& 0x80))
84 dev
= PCI_BDF(BusNum
, Device
, Function
);
86 pci_read_config_word(dev
, PCI_VENDOR_ID
, &VendorID
);
87 if ((VendorID
== 0xFFFF) || (VendorID
== 0x0000))
90 if (!Function
) pci_read_config_byte(dev
, PCI_HEADER_TYPE
, &HeaderType
);
94 printf("%02x.%02x.%02x ", BusNum
, Device
, Function
);
95 pci_header_show_brief(dev
);
99 printf("\nFound PCI device %02x.%02x.%02x:\n",
100 BusNum
, Device
, Function
);
101 pci_header_show(dev
);
109 * Subroutine: pci_header_show_brief
111 * Description: Reads and prints the header of the
112 * specified PCI device in short form.
114 * Inputs: dev Bus+Device+Function number
119 void pci_header_show_brief(pci_dev_t dev
)
124 pci_read_config_word(dev
, PCI_VENDOR_ID
, &vendor
);
125 pci_read_config_word(dev
, PCI_DEVICE_ID
, &device
);
126 pci_read_config_byte(dev
, PCI_CLASS_CODE
, &class);
127 pci_read_config_byte(dev
, PCI_CLASS_SUB_CODE
, &subclass
);
129 printf("0x%.4x 0x%.4x %-23s 0x%.2x\n",
131 pci_class_str(class), subclass
);
135 * Subroutine: PCI_Header_Show
137 * Description: Reads the header of the specified PCI device.
139 * Inputs: BusDevFunc Bus+Device+Function number
144 void pci_header_show(pci_dev_t dev
)
146 u8 _byte
, header_type
;
150 #define PRINT(msg, type, reg) \
151 pci_read_config_##type(dev, reg, &_##type); \
154 #define PRINT2(msg, type, reg, func) \
155 pci_read_config_##type(dev, reg, &_##type); \
156 printf(msg, _##type, func(_##type))
158 pci_read_config_byte(dev
, PCI_HEADER_TYPE
, &header_type
);
160 PRINT (" vendor ID = 0x%.4x\n", word
, PCI_VENDOR_ID
);
161 PRINT (" device ID = 0x%.4x\n", word
, PCI_DEVICE_ID
);
162 PRINT (" command register = 0x%.4x\n", word
, PCI_COMMAND
);
163 PRINT (" status register = 0x%.4x\n", word
, PCI_STATUS
);
164 PRINT (" revision ID = 0x%.2x\n", byte
, PCI_REVISION_ID
);
165 PRINT2(" class code = 0x%.2x (%s)\n", byte
, PCI_CLASS_CODE
,
167 PRINT (" sub class code = 0x%.2x\n", byte
, PCI_CLASS_SUB_CODE
);
168 PRINT (" programming interface = 0x%.2x\n", byte
, PCI_CLASS_PROG
);
169 PRINT (" cache line = 0x%.2x\n", byte
, PCI_CACHE_LINE_SIZE
);
170 PRINT (" latency time = 0x%.2x\n", byte
, PCI_LATENCY_TIMER
);
171 PRINT (" header type = 0x%.2x\n", byte
, PCI_HEADER_TYPE
);
172 PRINT (" BIST = 0x%.2x\n", byte
, PCI_BIST
);
173 PRINT (" base address 0 = 0x%.8x\n", dword
, PCI_BASE_ADDRESS_0
);
175 switch (header_type
& 0x03) {
176 case PCI_HEADER_TYPE_NORMAL
: /* "normal" PCI device */
177 PRINT (" base address 1 = 0x%.8x\n", dword
, PCI_BASE_ADDRESS_1
);
178 PRINT (" base address 2 = 0x%.8x\n", dword
, PCI_BASE_ADDRESS_2
);
179 PRINT (" base address 3 = 0x%.8x\n", dword
, PCI_BASE_ADDRESS_3
);
180 PRINT (" base address 4 = 0x%.8x\n", dword
, PCI_BASE_ADDRESS_4
);
181 PRINT (" base address 5 = 0x%.8x\n", dword
, PCI_BASE_ADDRESS_5
);
182 PRINT (" cardBus CIS pointer = 0x%.8x\n", dword
, PCI_CARDBUS_CIS
);
183 PRINT (" sub system vendor ID = 0x%.4x\n", word
, PCI_SUBSYSTEM_VENDOR_ID
);
184 PRINT (" sub system ID = 0x%.4x\n", word
, PCI_SUBSYSTEM_ID
);
185 PRINT (" expansion ROM base address = 0x%.8x\n", dword
, PCI_ROM_ADDRESS
);
186 PRINT (" interrupt line = 0x%.2x\n", byte
, PCI_INTERRUPT_LINE
);
187 PRINT (" interrupt pin = 0x%.2x\n", byte
, PCI_INTERRUPT_PIN
);
188 PRINT (" min Grant = 0x%.2x\n", byte
, PCI_MIN_GNT
);
189 PRINT (" max Latency = 0x%.2x\n", byte
, PCI_MAX_LAT
);
192 case PCI_HEADER_TYPE_BRIDGE
: /* PCI-to-PCI bridge */
194 PRINT (" base address 1 = 0x%.8x\n", dword
, PCI_BASE_ADDRESS_1
);
195 PRINT (" primary bus number = 0x%.2x\n", byte
, PCI_PRIMARY_BUS
);
196 PRINT (" secondary bus number = 0x%.2x\n", byte
, PCI_SECONDARY_BUS
);
197 PRINT (" subordinate bus number = 0x%.2x\n", byte
, PCI_SUBORDINATE_BUS
);
198 PRINT (" secondary latency timer = 0x%.2x\n", byte
, PCI_SEC_LATENCY_TIMER
);
199 PRINT (" IO base = 0x%.2x\n", byte
, PCI_IO_BASE
);
200 PRINT (" IO limit = 0x%.2x\n", byte
, PCI_IO_LIMIT
);
201 PRINT (" secondary status = 0x%.4x\n", word
, PCI_SEC_STATUS
);
202 PRINT (" memory base = 0x%.4x\n", word
, PCI_MEMORY_BASE
);
203 PRINT (" memory limit = 0x%.4x\n", word
, PCI_MEMORY_LIMIT
);
204 PRINT (" prefetch memory base = 0x%.4x\n", word
, PCI_PREF_MEMORY_BASE
);
205 PRINT (" prefetch memory limit = 0x%.4x\n", word
, PCI_PREF_MEMORY_LIMIT
);
206 PRINT (" prefetch memory base upper = 0x%.8x\n", dword
, PCI_PREF_BASE_UPPER32
);
207 PRINT (" prefetch memory limit upper = 0x%.8x\n", dword
, PCI_PREF_LIMIT_UPPER32
);
208 PRINT (" IO base upper 16 bits = 0x%.4x\n", word
, PCI_IO_BASE_UPPER16
);
209 PRINT (" IO limit upper 16 bits = 0x%.4x\n", word
, PCI_IO_LIMIT_UPPER16
);
210 PRINT (" expansion ROM base address = 0x%.8x\n", dword
, PCI_ROM_ADDRESS1
);
211 PRINT (" interrupt line = 0x%.2x\n", byte
, PCI_INTERRUPT_LINE
);
212 PRINT (" interrupt pin = 0x%.2x\n", byte
, PCI_INTERRUPT_PIN
);
213 PRINT (" bridge control = 0x%.4x\n", word
, PCI_BRIDGE_CONTROL
);
216 case PCI_HEADER_TYPE_CARDBUS
: /* PCI-to-CardBus bridge */
218 PRINT (" capabilities = 0x%.2x\n", byte
, PCI_CB_CAPABILITY_LIST
);
219 PRINT (" secondary status = 0x%.4x\n", word
, PCI_CB_SEC_STATUS
);
220 PRINT (" primary bus number = 0x%.2x\n", byte
, PCI_CB_PRIMARY_BUS
);
221 PRINT (" CardBus number = 0x%.2x\n", byte
, PCI_CB_CARD_BUS
);
222 PRINT (" subordinate bus number = 0x%.2x\n", byte
, PCI_CB_SUBORDINATE_BUS
);
223 PRINT (" CardBus latency timer = 0x%.2x\n", byte
, PCI_CB_LATENCY_TIMER
);
224 PRINT (" CardBus memory base 0 = 0x%.8x\n", dword
, PCI_CB_MEMORY_BASE_0
);
225 PRINT (" CardBus memory limit 0 = 0x%.8x\n", dword
, PCI_CB_MEMORY_LIMIT_0
);
226 PRINT (" CardBus memory base 1 = 0x%.8x\n", dword
, PCI_CB_MEMORY_BASE_1
);
227 PRINT (" CardBus memory limit 1 = 0x%.8x\n", dword
, PCI_CB_MEMORY_LIMIT_1
);
228 PRINT (" CardBus IO base 0 = 0x%.4x\n", word
, PCI_CB_IO_BASE_0
);
229 PRINT (" CardBus IO base high 0 = 0x%.4x\n", word
, PCI_CB_IO_BASE_0_HI
);
230 PRINT (" CardBus IO limit 0 = 0x%.4x\n", word
, PCI_CB_IO_LIMIT_0
);
231 PRINT (" CardBus IO limit high 0 = 0x%.4x\n", word
, PCI_CB_IO_LIMIT_0_HI
);
232 PRINT (" CardBus IO base 1 = 0x%.4x\n", word
, PCI_CB_IO_BASE_1
);
233 PRINT (" CardBus IO base high 1 = 0x%.4x\n", word
, PCI_CB_IO_BASE_1_HI
);
234 PRINT (" CardBus IO limit 1 = 0x%.4x\n", word
, PCI_CB_IO_LIMIT_1
);
235 PRINT (" CardBus IO limit high 1 = 0x%.4x\n", word
, PCI_CB_IO_LIMIT_1_HI
);
236 PRINT (" interrupt line = 0x%.2x\n", byte
, PCI_INTERRUPT_LINE
);
237 PRINT (" interrupt pin = 0x%.2x\n", byte
, PCI_INTERRUPT_PIN
);
238 PRINT (" bridge control = 0x%.4x\n", word
, PCI_CB_BRIDGE_CONTROL
);
239 PRINT (" subvendor ID = 0x%.4x\n", word
, PCI_CB_SUBSYSTEM_VENDOR_ID
);
240 PRINT (" subdevice ID = 0x%.4x\n", word
, PCI_CB_SUBSYSTEM_ID
);
241 PRINT (" PC Card 16bit base address = 0x%.8x\n", dword
, PCI_CB_LEGACY_MODE_BASE
);
245 printf("unknown header\n");
253 /* Convert the "bus.device.function" identifier into a number.
255 static pci_dev_t
get_pci_dev(char* name
)
259 int bdfs
[3] = {0,0,0};
264 for (i
= 0, iold
= 0, n
= 0; i
< len
; i
++) {
265 if (name
[i
] == '.') {
266 memcpy(cnum
, &name
[iold
], i
- iold
);
267 cnum
[i
- iold
] = '\0';
268 bdfs
[n
++] = simple_strtoul(cnum
, NULL
, 16);
272 strcpy(cnum
, &name
[iold
]);
275 bdfs
[n
] = simple_strtoul(cnum
, NULL
, 16);
276 return PCI_BDF(bdfs
[0], bdfs
[1], bdfs
[2]);
279 static int pci_cfg_display(pci_dev_t bdf
, ulong addr
, ulong size
, ulong length
)
281 #define DISP_LINE_LEN 16
282 ulong i
, nbytes
, linebytes
;
286 length
= 0x40 / size
; /* Standard PCI configuration space */
289 * once, and all accesses are with the specified bus width.
291 nbytes
= length
* size
;
297 printf("%08lx:", addr
);
298 linebytes
= (nbytes
>DISP_LINE_LEN
)?DISP_LINE_LEN
:nbytes
;
299 for (i
=0; i
<linebytes
; i
+= size
) {
301 pci_read_config_dword(bdf
, addr
, &val4
);
302 printf(" %08x", val4
);
303 } else if (size
== 2) {
304 pci_read_config_word(bdf
, addr
, &val2
);
305 printf(" %04x", val2
);
307 pci_read_config_byte(bdf
, addr
, &val1
);
308 printf(" %02x", val1
);
318 } while (nbytes
> 0);
323 static int pci_cfg_write (pci_dev_t bdf
, ulong addr
, ulong size
, ulong value
)
326 pci_write_config_dword(bdf
, addr
, value
);
328 else if (size
== 2) {
329 ushort val
= value
& 0xffff;
330 pci_write_config_word(bdf
, addr
, val
);
333 u_char val
= value
& 0xff;
334 pci_write_config_byte(bdf
, addr
, val
);
340 pci_cfg_modify (pci_dev_t bdf
, ulong addr
, ulong size
, ulong value
, int incrflag
)
344 extern char console_buffer
[];
349 /* Print the address, followed by value. Then accept input for
350 * the next value. A non-converted value exits.
353 printf("%08lx:", addr
);
355 pci_read_config_dword(bdf
, addr
, &val4
);
356 printf(" %08x", val4
);
358 else if (size
== 2) {
359 pci_read_config_word(bdf
, addr
, &val2
);
360 printf(" %04x", val2
);
363 pci_read_config_byte(bdf
, addr
, &val1
);
364 printf(" %02x", val1
);
367 nbytes
= readline (" ? ");
368 if (nbytes
== 0 || (nbytes
== 1 && console_buffer
[0] == '-')) {
369 /* <CR> pressed as only input, don't modify current
370 * location and move to next. "-" pressed will go back.
373 addr
+= nbytes
? -size
: size
;
375 #ifdef CONFIG_BOOT_RETRY_TIME
376 reset_cmd_timeout(); /* good enough to not time out */
379 #ifdef CONFIG_BOOT_RETRY_TIME
380 else if (nbytes
== -2) {
381 break; /* timed out, exit the command */
386 i
= simple_strtoul(console_buffer
, &endp
, 16);
387 nbytes
= endp
- console_buffer
;
389 #ifdef CONFIG_BOOT_RETRY_TIME
390 /* good enough to not time out
394 pci_cfg_write (bdf
, addr
, size
, i
);
404 /* PCI Configuration Space access commands
407 * pci display[.b, .w, .l] bus.device.function} [addr] [len]
408 * pci next[.b, .w, .l] bus.device.function [addr]
409 * pci modify[.b, .w, .l] bus.device.function [addr]
410 * pci write[.b, .w, .l] bus.device.function addr value
412 int do_pci (cmd_tbl_t
*cmdtp
, int flag
, int argc
, char * const argv
[])
414 ulong addr
= 0, value
= 0, size
= 0;
422 case 'd': /* display */
424 case 'm': /* modify */
425 case 'w': /* write */
426 /* Check for a size specification. */
427 size
= cmd_get_data_size(argv
[1], 4);
429 addr
= simple_strtoul(argv
[3], NULL
, 16);
431 value
= simple_strtoul(argv
[4], NULL
, 16);
432 case 'h': /* header */
435 if ((bdf
= get_pci_dev(argv
[2])) == -1)
438 #ifdef CONFIG_CMD_PCI_ENUM
442 default: /* scan bus */
443 value
= 1; /* short listing */
444 bdf
= 0; /* bus number */
446 if (argv
[argc
-1][0] == 'l') {
451 bdf
= simple_strtoul(argv
[1], NULL
, 16);
457 switch (argv
[1][0]) {
458 case 'h': /* header */
459 pci_header_show(bdf
);
461 case 'd': /* display */
462 return pci_cfg_display(bdf
, addr
, size
, value
);
463 #ifdef CONFIG_CMD_PCI_ENUM
471 return pci_cfg_modify(bdf
, addr
, size
, value
, 0);
472 case 'm': /* modify */
475 return pci_cfg_modify(bdf
, addr
, size
, value
, 1);
476 case 'w': /* write */
479 return pci_cfg_write(bdf
, addr
, size
, value
);
484 return cmd_usage(cmdtp
);
487 /***************************************************/
492 "list and access PCI Configuration Space",
494 " - short or long list of PCI devices on bus 'bus'\n"
495 #ifdef CONFIG_CMD_PCI_ENUM
497 " - re-enumerate PCI buses\n"
500 " - show header of PCI device 'bus.device.function'\n"
501 "pci display[.b, .w, .l] b.d.f [address] [# of objects]\n"
502 " - display PCI configuration space (CFG)\n"
503 "pci next[.b, .w, .l] b.d.f address\n"
504 " - modify, read and keep CFG address\n"
505 "pci modify[.b, .w, .l] b.d.f address\n"
506 " - modify, auto increment CFG address\n"
507 "pci write[.b, .w, .l] b.d.f address value\n"
508 " - write to CFG address"