2 * (C) Copyright 2001 Sysgo Real-Time Solutions, GmbH <www.elinos.com>
3 * Andreas Heppel <aheppel@sysgo.de>
6 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7 * Wolfgang Grandegger, DENX Software Engineering, wg@denx.de.
9 * SPDX-License-Identifier: GPL-2.0+
17 #include <bootretry.h>
20 #include <asm/processor.h>
25 * Follows routines for the output of infos about devices on PCI bus.
28 void pci_header_show(pci_dev_t dev
);
29 void pci_header_show_brief(pci_dev_t dev
);
34 * Description: Show information about devices on PCI bus.
35 * Depending on the define CONFIG_SYS_SHORT_PCI_LISTING
36 * the output will be more or less exhaustive.
38 * Inputs: bus_no the number of the bus to be scanned.
43 void pciinfo(int BusNum
, int ShortPCIListing
)
45 struct pci_controller
*hose
= pci_bus_to_hose(BusNum
);
48 unsigned char HeaderType
;
49 unsigned short VendorID
;
55 printf("Scanning PCI devices on bus %d\n", BusNum
);
57 if (ShortPCIListing
) {
58 printf("BusDevFun VendorId DeviceId Device Class Sub-Class\n");
59 printf("_____________________________________________________________\n");
62 for (Device
= 0; Device
< PCI_MAX_PCI_DEVICES
; Device
++) {
65 for (Function
= 0; Function
< PCI_MAX_PCI_FUNCTIONS
; Function
++) {
67 * If this is not a multi-function device, we skip the rest.
69 if (Function
&& !(HeaderType
& 0x80))
72 dev
= PCI_BDF(BusNum
, Device
, Function
);
74 if (pci_skip_dev(hose
, dev
))
77 pci_read_config_word(dev
, PCI_VENDOR_ID
, &VendorID
);
78 if ((VendorID
== 0xFFFF) || (VendorID
== 0x0000))
81 if (!Function
) pci_read_config_byte(dev
, PCI_HEADER_TYPE
, &HeaderType
);
85 printf("%02x.%02x.%02x ", BusNum
, Device
, Function
);
86 pci_header_show_brief(dev
);
90 printf("\nFound PCI device %02x.%02x.%02x:\n",
91 BusNum
, Device
, Function
);
100 * Subroutine: pci_header_show_brief
102 * Description: Reads and prints the header of the
103 * specified PCI device in short form.
105 * Inputs: dev Bus+Device+Function number
110 void pci_header_show_brief(pci_dev_t dev
)
115 pci_read_config_word(dev
, PCI_VENDOR_ID
, &vendor
);
116 pci_read_config_word(dev
, PCI_DEVICE_ID
, &device
);
117 pci_read_config_byte(dev
, PCI_CLASS_CODE
, &class);
118 pci_read_config_byte(dev
, PCI_CLASS_SUB_CODE
, &subclass
);
120 printf("0x%.4x 0x%.4x %-23s 0x%.2x\n",
122 pci_class_str(class), subclass
);
126 * Subroutine: PCI_Header_Show
128 * Description: Reads the header of the specified PCI device.
130 * Inputs: BusDevFunc Bus+Device+Function number
135 void pci_header_show(pci_dev_t dev
)
137 u8 _byte
, header_type
;
141 #define PRINT(msg, type, reg) \
142 pci_read_config_##type(dev, reg, &_##type); \
145 #define PRINT2(msg, type, reg, func) \
146 pci_read_config_##type(dev, reg, &_##type); \
147 printf(msg, _##type, func(_##type))
149 pci_read_config_byte(dev
, PCI_HEADER_TYPE
, &header_type
);
151 PRINT (" vendor ID = 0x%.4x\n", word
, PCI_VENDOR_ID
);
152 PRINT (" device ID = 0x%.4x\n", word
, PCI_DEVICE_ID
);
153 PRINT (" command register = 0x%.4x\n", word
, PCI_COMMAND
);
154 PRINT (" status register = 0x%.4x\n", word
, PCI_STATUS
);
155 PRINT (" revision ID = 0x%.2x\n", byte
, PCI_REVISION_ID
);
156 PRINT2(" class code = 0x%.2x (%s)\n", byte
, PCI_CLASS_CODE
,
158 PRINT (" sub class code = 0x%.2x\n", byte
, PCI_CLASS_SUB_CODE
);
159 PRINT (" programming interface = 0x%.2x\n", byte
, PCI_CLASS_PROG
);
160 PRINT (" cache line = 0x%.2x\n", byte
, PCI_CACHE_LINE_SIZE
);
161 PRINT (" latency time = 0x%.2x\n", byte
, PCI_LATENCY_TIMER
);
162 PRINT (" header type = 0x%.2x\n", byte
, PCI_HEADER_TYPE
);
163 PRINT (" BIST = 0x%.2x\n", byte
, PCI_BIST
);
164 PRINT (" base address 0 = 0x%.8x\n", dword
, PCI_BASE_ADDRESS_0
);
166 switch (header_type
& 0x03) {
167 case PCI_HEADER_TYPE_NORMAL
: /* "normal" PCI device */
168 PRINT (" base address 1 = 0x%.8x\n", dword
, PCI_BASE_ADDRESS_1
);
169 PRINT (" base address 2 = 0x%.8x\n", dword
, PCI_BASE_ADDRESS_2
);
170 PRINT (" base address 3 = 0x%.8x\n", dword
, PCI_BASE_ADDRESS_3
);
171 PRINT (" base address 4 = 0x%.8x\n", dword
, PCI_BASE_ADDRESS_4
);
172 PRINT (" base address 5 = 0x%.8x\n", dword
, PCI_BASE_ADDRESS_5
);
173 PRINT (" cardBus CIS pointer = 0x%.8x\n", dword
, PCI_CARDBUS_CIS
);
174 PRINT (" sub system vendor ID = 0x%.4x\n", word
, PCI_SUBSYSTEM_VENDOR_ID
);
175 PRINT (" sub system ID = 0x%.4x\n", word
, PCI_SUBSYSTEM_ID
);
176 PRINT (" expansion ROM base address = 0x%.8x\n", dword
, PCI_ROM_ADDRESS
);
177 PRINT (" interrupt line = 0x%.2x\n", byte
, PCI_INTERRUPT_LINE
);
178 PRINT (" interrupt pin = 0x%.2x\n", byte
, PCI_INTERRUPT_PIN
);
179 PRINT (" min Grant = 0x%.2x\n", byte
, PCI_MIN_GNT
);
180 PRINT (" max Latency = 0x%.2x\n", byte
, PCI_MAX_LAT
);
183 case PCI_HEADER_TYPE_BRIDGE
: /* PCI-to-PCI bridge */
185 PRINT (" base address 1 = 0x%.8x\n", dword
, PCI_BASE_ADDRESS_1
);
186 PRINT (" primary bus number = 0x%.2x\n", byte
, PCI_PRIMARY_BUS
);
187 PRINT (" secondary bus number = 0x%.2x\n", byte
, PCI_SECONDARY_BUS
);
188 PRINT (" subordinate bus number = 0x%.2x\n", byte
, PCI_SUBORDINATE_BUS
);
189 PRINT (" secondary latency timer = 0x%.2x\n", byte
, PCI_SEC_LATENCY_TIMER
);
190 PRINT (" IO base = 0x%.2x\n", byte
, PCI_IO_BASE
);
191 PRINT (" IO limit = 0x%.2x\n", byte
, PCI_IO_LIMIT
);
192 PRINT (" secondary status = 0x%.4x\n", word
, PCI_SEC_STATUS
);
193 PRINT (" memory base = 0x%.4x\n", word
, PCI_MEMORY_BASE
);
194 PRINT (" memory limit = 0x%.4x\n", word
, PCI_MEMORY_LIMIT
);
195 PRINT (" prefetch memory base = 0x%.4x\n", word
, PCI_PREF_MEMORY_BASE
);
196 PRINT (" prefetch memory limit = 0x%.4x\n", word
, PCI_PREF_MEMORY_LIMIT
);
197 PRINT (" prefetch memory base upper = 0x%.8x\n", dword
, PCI_PREF_BASE_UPPER32
);
198 PRINT (" prefetch memory limit upper = 0x%.8x\n", dword
, PCI_PREF_LIMIT_UPPER32
);
199 PRINT (" IO base upper 16 bits = 0x%.4x\n", word
, PCI_IO_BASE_UPPER16
);
200 PRINT (" IO limit upper 16 bits = 0x%.4x\n", word
, PCI_IO_LIMIT_UPPER16
);
201 PRINT (" expansion ROM base address = 0x%.8x\n", dword
, PCI_ROM_ADDRESS1
);
202 PRINT (" interrupt line = 0x%.2x\n", byte
, PCI_INTERRUPT_LINE
);
203 PRINT (" interrupt pin = 0x%.2x\n", byte
, PCI_INTERRUPT_PIN
);
204 PRINT (" bridge control = 0x%.4x\n", word
, PCI_BRIDGE_CONTROL
);
207 case PCI_HEADER_TYPE_CARDBUS
: /* PCI-to-CardBus bridge */
209 PRINT (" capabilities = 0x%.2x\n", byte
, PCI_CB_CAPABILITY_LIST
);
210 PRINT (" secondary status = 0x%.4x\n", word
, PCI_CB_SEC_STATUS
);
211 PRINT (" primary bus number = 0x%.2x\n", byte
, PCI_CB_PRIMARY_BUS
);
212 PRINT (" CardBus number = 0x%.2x\n", byte
, PCI_CB_CARD_BUS
);
213 PRINT (" subordinate bus number = 0x%.2x\n", byte
, PCI_CB_SUBORDINATE_BUS
);
214 PRINT (" CardBus latency timer = 0x%.2x\n", byte
, PCI_CB_LATENCY_TIMER
);
215 PRINT (" CardBus memory base 0 = 0x%.8x\n", dword
, PCI_CB_MEMORY_BASE_0
);
216 PRINT (" CardBus memory limit 0 = 0x%.8x\n", dword
, PCI_CB_MEMORY_LIMIT_0
);
217 PRINT (" CardBus memory base 1 = 0x%.8x\n", dword
, PCI_CB_MEMORY_BASE_1
);
218 PRINT (" CardBus memory limit 1 = 0x%.8x\n", dword
, PCI_CB_MEMORY_LIMIT_1
);
219 PRINT (" CardBus IO base 0 = 0x%.4x\n", word
, PCI_CB_IO_BASE_0
);
220 PRINT (" CardBus IO base high 0 = 0x%.4x\n", word
, PCI_CB_IO_BASE_0_HI
);
221 PRINT (" CardBus IO limit 0 = 0x%.4x\n", word
, PCI_CB_IO_LIMIT_0
);
222 PRINT (" CardBus IO limit high 0 = 0x%.4x\n", word
, PCI_CB_IO_LIMIT_0_HI
);
223 PRINT (" CardBus IO base 1 = 0x%.4x\n", word
, PCI_CB_IO_BASE_1
);
224 PRINT (" CardBus IO base high 1 = 0x%.4x\n", word
, PCI_CB_IO_BASE_1_HI
);
225 PRINT (" CardBus IO limit 1 = 0x%.4x\n", word
, PCI_CB_IO_LIMIT_1
);
226 PRINT (" CardBus IO limit high 1 = 0x%.4x\n", word
, PCI_CB_IO_LIMIT_1_HI
);
227 PRINT (" interrupt line = 0x%.2x\n", byte
, PCI_INTERRUPT_LINE
);
228 PRINT (" interrupt pin = 0x%.2x\n", byte
, PCI_INTERRUPT_PIN
);
229 PRINT (" bridge control = 0x%.4x\n", word
, PCI_CB_BRIDGE_CONTROL
);
230 PRINT (" subvendor ID = 0x%.4x\n", word
, PCI_CB_SUBSYSTEM_VENDOR_ID
);
231 PRINT (" subdevice ID = 0x%.4x\n", word
, PCI_CB_SUBSYSTEM_ID
);
232 PRINT (" PC Card 16bit base address = 0x%.8x\n", dword
, PCI_CB_LEGACY_MODE_BASE
);
236 printf("unknown header\n");
244 /* Convert the "bus.device.function" identifier into a number.
246 static pci_dev_t
get_pci_dev(char* name
)
250 int bdfs
[3] = {0,0,0};
255 for (i
= 0, iold
= 0, n
= 0; i
< len
; i
++) {
256 if (name
[i
] == '.') {
257 memcpy(cnum
, &name
[iold
], i
- iold
);
258 cnum
[i
- iold
] = '\0';
259 bdfs
[n
++] = simple_strtoul(cnum
, NULL
, 16);
263 strcpy(cnum
, &name
[iold
]);
266 bdfs
[n
] = simple_strtoul(cnum
, NULL
, 16);
267 return PCI_BDF(bdfs
[0], bdfs
[1], bdfs
[2]);
270 static int pci_cfg_display(pci_dev_t bdf
, ulong addr
, ulong size
, ulong length
)
272 #define DISP_LINE_LEN 16
273 ulong i
, nbytes
, linebytes
;
277 length
= 0x40 / size
; /* Standard PCI configuration space */
280 * once, and all accesses are with the specified bus width.
282 nbytes
= length
* size
;
288 printf("%08lx:", addr
);
289 linebytes
= (nbytes
>DISP_LINE_LEN
)?DISP_LINE_LEN
:nbytes
;
290 for (i
=0; i
<linebytes
; i
+= size
) {
292 pci_read_config_dword(bdf
, addr
, &val4
);
293 printf(" %08x", val4
);
294 } else if (size
== 2) {
295 pci_read_config_word(bdf
, addr
, &val2
);
296 printf(" %04x", val2
);
298 pci_read_config_byte(bdf
, addr
, &val1
);
299 printf(" %02x", val1
);
309 } while (nbytes
> 0);
314 static int pci_cfg_write (pci_dev_t bdf
, ulong addr
, ulong size
, ulong value
)
317 pci_write_config_dword(bdf
, addr
, value
);
319 else if (size
== 2) {
320 ushort val
= value
& 0xffff;
321 pci_write_config_word(bdf
, addr
, val
);
324 u_char val
= value
& 0xff;
325 pci_write_config_byte(bdf
, addr
, val
);
331 pci_cfg_modify (pci_dev_t bdf
, ulong addr
, ulong size
, ulong value
, int incrflag
)
339 /* Print the address, followed by value. Then accept input for
340 * the next value. A non-converted value exits.
343 printf("%08lx:", addr
);
345 pci_read_config_dword(bdf
, addr
, &val4
);
346 printf(" %08x", val4
);
348 else if (size
== 2) {
349 pci_read_config_word(bdf
, addr
, &val2
);
350 printf(" %04x", val2
);
353 pci_read_config_byte(bdf
, addr
, &val1
);
354 printf(" %02x", val1
);
357 nbytes
= cli_readline(" ? ");
358 if (nbytes
== 0 || (nbytes
== 1 && console_buffer
[0] == '-')) {
359 /* <CR> pressed as only input, don't modify current
360 * location and move to next. "-" pressed will go back.
363 addr
+= nbytes
? -size
: size
;
365 /* good enough to not time out */
366 bootretry_reset_cmd_timeout();
368 #ifdef CONFIG_BOOT_RETRY_TIME
369 else if (nbytes
== -2) {
370 break; /* timed out, exit the command */
375 i
= simple_strtoul(console_buffer
, &endp
, 16);
376 nbytes
= endp
- console_buffer
;
378 /* good enough to not time out
380 bootretry_reset_cmd_timeout();
381 pci_cfg_write (bdf
, addr
, size
, i
);
391 /* PCI Configuration Space access commands
394 * pci display[.b, .w, .l] bus.device.function} [addr] [len]
395 * pci next[.b, .w, .l] bus.device.function [addr]
396 * pci modify[.b, .w, .l] bus.device.function [addr]
397 * pci write[.b, .w, .l] bus.device.function addr value
399 static int do_pci(cmd_tbl_t
*cmdtp
, int flag
, int argc
, char * const argv
[])
401 ulong addr
= 0, value
= 0, size
= 0;
409 case 'd': /* display */
411 case 'm': /* modify */
412 case 'w': /* write */
413 /* Check for a size specification. */
414 size
= cmd_get_data_size(argv
[1], 4);
416 addr
= simple_strtoul(argv
[3], NULL
, 16);
418 value
= simple_strtoul(argv
[4], NULL
, 16);
419 case 'h': /* header */
422 if ((bdf
= get_pci_dev(argv
[2])) == -1)
425 #ifdef CONFIG_CMD_PCI_ENUM
429 default: /* scan bus */
430 value
= 1; /* short listing */
431 bdf
= 0; /* bus number */
433 if (argv
[argc
-1][0] == 'l') {
438 bdf
= simple_strtoul(argv
[1], NULL
, 16);
444 switch (argv
[1][0]) {
445 case 'h': /* header */
446 pci_header_show(bdf
);
448 case 'd': /* display */
449 return pci_cfg_display(bdf
, addr
, size
, value
);
450 #ifdef CONFIG_CMD_PCI_ENUM
458 return pci_cfg_modify(bdf
, addr
, size
, value
, 0);
459 case 'm': /* modify */
462 return pci_cfg_modify(bdf
, addr
, size
, value
, 1);
463 case 'w': /* write */
466 return pci_cfg_write(bdf
, addr
, size
, value
);
471 return CMD_RET_USAGE
;
474 /***************************************************/
476 #ifdef CONFIG_SYS_LONGHELP
477 static char pci_help_text
[] =
479 " - short or long list of PCI devices on bus 'bus'\n"
480 #ifdef CONFIG_CMD_PCI_ENUM
482 " - re-enumerate PCI buses\n"
485 " - show header of PCI device 'bus.device.function'\n"
486 "pci display[.b, .w, .l] b.d.f [address] [# of objects]\n"
487 " - display PCI configuration space (CFG)\n"
488 "pci next[.b, .w, .l] b.d.f address\n"
489 " - modify, read and keep CFG address\n"
490 "pci modify[.b, .w, .l] b.d.f address\n"
491 " - modify, auto increment CFG address\n"
492 "pci write[.b, .w, .l] b.d.f address value\n"
493 " - write to CFG address";
498 "list and access PCI Configuration Space", pci_help_text