]>
git.ipfire.org Git - people/ms/u-boot.git/blob - common/cmd_reginfo.c
3 * Subodh Nijsure, SkyStream Networks, snijsure@skystream.com
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 #if defined(CONFIG_8xx)
28 #elif defined (CONFIG_4xx)
29 extern void ppc4xx_reginfo(void);
30 #elif defined (CONFIG_5xx)
32 #elif defined (CONFIG_MPC5200)
34 #elif defined (CONFIG_MPC86xx)
35 extern void mpc86xx_reginfo(void);
36 #elif defined(CONFIG_MPC85xx)
37 extern void mpc85xx_reginfo(void);
40 int do_reginfo (cmd_tbl_t
*cmdtp
, int flag
, int argc
, char * const argv
[])
42 #if defined(CONFIG_8xx)
43 volatile immap_t
*immap
= (immap_t
*)CONFIG_SYS_IMMR
;
44 volatile memctl8xx_t
*memctl
= &immap
->im_memctl
;
45 volatile sysconf8xx_t
*sysconf
= &immap
->im_siu_conf
;
46 volatile sit8xx_t
*timers
= &immap
->im_sit
;
48 /* Hopefully more PowerPC knowledgable people will add code to display
49 * other useful registers
52 printf ("\nSystem Configuration registers\n"
54 "\tIMMR\t0x%08X\n", get_immr(0));
56 printf("\tSIUMCR\t0x%08X", sysconf
->sc_siumcr
);
57 printf("\tSYPCR\t0x%08X\n",sysconf
->sc_sypcr
);
59 printf("\tSWT\t0x%08X", sysconf
->sc_swt
);
60 printf("\tSWSR\t0x%04X\n", sysconf
->sc_swsr
);
62 printf("\tSIPEND\t0x%08X\tSIMASK\t0x%08X\n",
63 sysconf
->sc_sipend
, sysconf
->sc_simask
);
64 printf("\tSIEL\t0x%08X\tSIVEC\t0x%08X\n",
65 sysconf
->sc_siel
, sysconf
->sc_sivec
);
66 printf("\tTESR\t0x%08X\tSDCR\t0x%08X\n",
67 sysconf
->sc_tesr
, sysconf
->sc_sdcr
);
69 printf ("Memory Controller Registers\n"
71 "\tBR0\t0x%08X\tOR0\t0x%08X \n", memctl
->memc_br0
, memctl
->memc_or0
);
72 printf("\tBR1\t0x%08X\tOR1\t0x%08X \n", memctl
->memc_br1
, memctl
->memc_or1
);
73 printf("\tBR2\t0x%08X\tOR2\t0x%08X \n", memctl
->memc_br2
, memctl
->memc_or2
);
74 printf("\tBR3\t0x%08X\tOR3\t0x%08X \n", memctl
->memc_br3
, memctl
->memc_or3
);
75 printf("\tBR4\t0x%08X\tOR4\t0x%08X \n", memctl
->memc_br4
, memctl
->memc_or4
);
76 printf("\tBR5\t0x%08X\tOR5\t0x%08X \n", memctl
->memc_br5
, memctl
->memc_or5
);
77 printf("\tBR6\t0x%08X\tOR6\t0x%08X \n", memctl
->memc_br6
, memctl
->memc_or6
);
78 printf("\tBR7\t0x%08X\tOR7\t0x%08X \n", memctl
->memc_br7
, memctl
->memc_or7
);
80 "\tmamr\t0x%08X\tmbmr\t0x%08X \n",
81 memctl
->memc_mamr
, memctl
->memc_mbmr
);
82 printf("\tmstat\t0x%08X\tmptpr\t0x%08X \n",
83 memctl
->memc_mstat
, memctl
->memc_mptpr
);
84 printf("\tmdr\t0x%08X \n", memctl
->memc_mdr
);
86 printf ("\nSystem Integration Timers\n"
87 "\tTBSCR\t0x%08X\tRTCSC\t0x%08X \n",
88 timers
->sit_tbscr
, timers
->sit_rtcsc
);
89 printf("\tPISCR\t0x%08X \n", timers
->sit_piscr
);
92 * May be some CPM info here?
95 #elif defined (CONFIG_4xx)
97 #elif defined(CONFIG_5xx)
99 volatile immap_t
*immap
= (immap_t
*)CONFIG_SYS_IMMR
;
100 volatile memctl5xx_t
*memctl
= &immap
->im_memctl
;
101 volatile sysconf5xx_t
*sysconf
= &immap
->im_siu_conf
;
102 volatile sit5xx_t
*timers
= &immap
->im_sit
;
103 volatile car5xx_t
*car
= &immap
->im_clkrst
;
104 volatile uimb5xx_t
*uimb
= &immap
->im_uimb
;
106 puts ("\nSystem Configuration registers\n");
107 printf("\tIMMR\t0x%08X\tSIUMCR\t0x%08X \n", get_immr(0), sysconf
->sc_siumcr
);
108 printf("\tSYPCR\t0x%08X\tSWSR\t0x%04X \n" ,sysconf
->sc_sypcr
, sysconf
->sc_swsr
);
109 printf("\tSIPEND\t0x%08X\tSIMASK\t0x%08X \n", sysconf
->sc_sipend
, sysconf
->sc_simask
);
110 printf("\tSIEL\t0x%08X\tSIVEC\t0x%08X \n", sysconf
->sc_siel
, sysconf
->sc_sivec
);
111 printf("\tTESR\t0x%08X\n", sysconf
->sc_tesr
);
113 puts ("\nMemory Controller Registers\n");
114 printf("\tBR0\t0x%08X\tOR0\t0x%08X \n", memctl
->memc_br0
, memctl
->memc_or0
);
115 printf("\tBR1\t0x%08X\tOR1\t0x%08X \n", memctl
->memc_br1
, memctl
->memc_or1
);
116 printf("\tBR2\t0x%08X\tOR2\t0x%08X \n", memctl
->memc_br2
, memctl
->memc_or2
);
117 printf("\tBR3\t0x%08X\tOR3\t0x%08X \n", memctl
->memc_br3
, memctl
->memc_or3
);
118 printf("\tDMBR\t0x%08X\tDMOR\t0x%08X \n", memctl
->memc_dmbr
, memctl
->memc_dmor
);
119 printf("\tMSTAT\t0x%08X\n", memctl
->memc_mstat
);
121 puts ("\nSystem Integration Timers\n");
122 printf("\tTBSCR\t0x%08X\tRTCSC\t0x%08X \n", timers
->sit_tbscr
, timers
->sit_rtcsc
);
123 printf("\tPISCR\t0x%08X \n", timers
->sit_piscr
);
125 puts ("\nClocks and Reset\n");
126 printf("\tSCCR\t0x%08X\tPLPRCR\t0x%08X \n", car
->car_sccr
, car
->car_plprcr
);
128 puts ("\nU-Bus to IMB3 Bus Interface\n");
129 printf("\tUMCR\t0x%08X\tUIPEND\t0x%08X \n", uimb
->uimb_umcr
, uimb
->uimb_uipend
);
132 #elif defined(CONFIG_MPC5200)
133 puts ("\nMPC5200 registers\n");
134 printf ("MBAR=%08x\n", CONFIG_SYS_MBAR
);
135 puts ("Memory map registers\n");
136 printf ("\tCS0: start %08lX\tstop %08lX\tconfig %08lX\ten %d\n",
137 *(volatile ulong
*)MPC5XXX_CS0_START
,
138 *(volatile ulong
*)MPC5XXX_CS0_STOP
,
139 *(volatile ulong
*)MPC5XXX_CS0_CFG
,
140 (*(volatile ulong
*)MPC5XXX_ADDECR
& 0x00010000) ? 1 : 0);
141 printf ("\tCS1: start %08lX\tstop %08lX\tconfig %08lX\ten %d\n",
142 *(volatile ulong
*)MPC5XXX_CS1_START
,
143 *(volatile ulong
*)MPC5XXX_CS1_STOP
,
144 *(volatile ulong
*)MPC5XXX_CS1_CFG
,
145 (*(volatile ulong
*)MPC5XXX_ADDECR
& 0x00020000) ? 1 : 0);
146 printf ("\tCS2: start %08lX\tstop %08lX\tconfig %08lX\ten %d\n",
147 *(volatile ulong
*)MPC5XXX_CS2_START
,
148 *(volatile ulong
*)MPC5XXX_CS2_STOP
,
149 *(volatile ulong
*)MPC5XXX_CS2_CFG
,
150 (*(volatile ulong
*)MPC5XXX_ADDECR
& 0x00040000) ? 1 : 0);
151 printf ("\tCS3: start %08lX\tstop %08lX\tconfig %08lX\ten %d\n",
152 *(volatile ulong
*)MPC5XXX_CS3_START
,
153 *(volatile ulong
*)MPC5XXX_CS3_STOP
,
154 *(volatile ulong
*)MPC5XXX_CS3_CFG
,
155 (*(volatile ulong
*)MPC5XXX_ADDECR
& 0x00080000) ? 1 : 0);
156 printf ("\tCS4: start %08lX\tstop %08lX\tconfig %08lX\ten %d\n",
157 *(volatile ulong
*)MPC5XXX_CS4_START
,
158 *(volatile ulong
*)MPC5XXX_CS4_STOP
,
159 *(volatile ulong
*)MPC5XXX_CS4_CFG
,
160 (*(volatile ulong
*)MPC5XXX_ADDECR
& 0x00100000) ? 1 : 0);
161 printf ("\tCS5: start %08lX\tstop %08lX\tconfig %08lX\ten %d\n",
162 *(volatile ulong
*)MPC5XXX_CS5_START
,
163 *(volatile ulong
*)MPC5XXX_CS5_STOP
,
164 *(volatile ulong
*)MPC5XXX_CS5_CFG
,
165 (*(volatile ulong
*)MPC5XXX_ADDECR
& 0x00200000) ? 1 : 0);
166 printf ("\tCS6: start %08lX\tstop %08lX\tconfig %08lX\ten %d\n",
167 *(volatile ulong
*)MPC5XXX_CS6_START
,
168 *(volatile ulong
*)MPC5XXX_CS6_STOP
,
169 *(volatile ulong
*)MPC5XXX_CS6_CFG
,
170 (*(volatile ulong
*)MPC5XXX_ADDECR
& 0x04000000) ? 1 : 0);
171 printf ("\tCS7: start %08lX\tstop %08lX\tconfig %08lX\ten %d\n",
172 *(volatile ulong
*)MPC5XXX_CS7_START
,
173 *(volatile ulong
*)MPC5XXX_CS7_STOP
,
174 *(volatile ulong
*)MPC5XXX_CS7_CFG
,
175 (*(volatile ulong
*)MPC5XXX_ADDECR
& 0x08000000) ? 1 : 0);
176 printf ("\tBOOTCS: start %08lX\tstop %08lX\tconfig %08lX\ten %d\n",
177 *(volatile ulong
*)MPC5XXX_BOOTCS_START
,
178 *(volatile ulong
*)MPC5XXX_BOOTCS_STOP
,
179 *(volatile ulong
*)MPC5XXX_BOOTCS_CFG
,
180 (*(volatile ulong
*)MPC5XXX_ADDECR
& 0x02000000) ? 1 : 0);
181 printf ("\tSDRAMCS0: %08lX\n",
182 *(volatile ulong
*)MPC5XXX_SDRAM_CS0CFG
);
183 printf ("\tSDRAMCS1: %08lX\n",
184 *(volatile ulong
*)MPC5XXX_SDRAM_CS1CFG
);
185 #elif defined(CONFIG_MPC86xx)
188 #elif defined(CONFIG_MPC85xx)
191 #elif defined(CONFIG_BLACKFIN)
192 puts("\nSystem Configuration registers\n");
194 puts("\nPLL Registers\n");
195 printf("\tPLL_DIV: 0x%04x PLL_CTL: 0x%04x\n",
196 bfin_read_PLL_DIV(), bfin_read_PLL_CTL());
197 printf("\tPLL_STAT: 0x%04x PLL_LOCKCNT: 0x%04x\n",
198 bfin_read_PLL_STAT(), bfin_read_PLL_LOCKCNT());
199 printf("\tVR_CTL: 0x%04x\n", bfin_read_VR_CTL());
201 puts("\nEBIU AMC Registers\n");
202 printf("\tEBIU_AMGCTL: 0x%04x\n", bfin_read_EBIU_AMGCTL());
203 printf("\tEBIU_AMBCTL0: 0x%08x EBIU_AMBCTL1: 0x%08x\n",
204 bfin_read_EBIU_AMBCTL0(), bfin_read_EBIU_AMBCTL1());
206 printf("\tEBIU_MBSCTL: 0x%08x EBIU_ARBSTAT: 0x%08x\n",
207 bfin_read_EBIU_MBSCTL(), bfin_read_EBIU_ARBSTAT());
208 printf("\tEBIU_MODE: 0x%08x EBIU_FCTL: 0x%08x\n",
209 bfin_read_EBIU_MODE(), bfin_read_EBIU_FCTL());
213 puts("\nEBIU DDR Registers\n");
214 printf("\tEBIU_DDRCTL0: 0x%08x EBIU_DDRCTL1: 0x%08x\n",
215 bfin_read_EBIU_DDRCTL0(), bfin_read_EBIU_DDRCTL1());
216 printf("\tEBIU_DDRCTL2: 0x%08x EBIU_DDRCTL3: 0x%08x\n",
217 bfin_read_EBIU_DDRCTL2(), bfin_read_EBIU_DDRCTL3());
218 printf("\tEBIU_DDRQUE: 0x%08x EBIU_RSTCTL 0x%04x\n",
219 bfin_read_EBIU_DDRQUE(), bfin_read_EBIU_RSTCTL());
220 printf("\tEBIU_ERRADD: 0x%08x EBIU_ERRMST: 0x%04x\n",
221 bfin_read_EBIU_ERRADD(), bfin_read_EBIU_ERRMST());
223 puts("\nEBIU SDC Registers\n");
224 printf("\tEBIU_SDRRC: 0x%04x EBIU_SDBCTL: 0x%04x\n",
225 bfin_read_EBIU_SDRRC(), bfin_read_EBIU_SDBCTL());
226 printf("\tEBIU_SDSTAT: 0x%04x EBIU_SDGCTL: 0x%08x\n",
227 bfin_read_EBIU_SDSTAT(), bfin_read_EBIU_SDGCTL());
230 #endif /* CONFIG_BLACKFIN */
235 /**************************************************/
237 #if defined(CONFIG_CMD_REGINFO)
239 reginfo
, 2, 1, do_reginfo
,
240 "print register information",