common/miiphyutil.c

   1 /*
   2  * (C) Copyright 2001
   3  * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
   4  *
   5  * SPDX-License-Identifier:     GPL-2.0+
   6  */
   7
   8 /*
   9  * This provides a bit-banged interface to the ethernet MII management
  10  * channel.
  11  */
  12
  13 #include <common.h>
  14 #include <dm.h>
  15 #include <miiphy.h>
  16 #include <phy.h>
  17
  18 #include <asm/types.h>
  19 #include <linux/list.h>
  20 #include <malloc.h>
  21 #include <net.h>
  22
  23 /* local debug macro */
  24 #undef MII_DEBUG
  25
  26 #undef debug
  27 #ifdef MII_DEBUG
  28 #define debug(fmt, args...)     printf(fmt, ##args)
  29 #else
  30 #define debug(fmt, args...)
  31 #endif /* MII_DEBUG */
  32
  33 static struct list_head mii_devs;
  34 static struct mii_dev *current_mii;
  35
  36 /*
  37  * Lookup the mii_dev struct by the registered device name.
  38  */
  39 struct mii_dev *miiphy_get_dev_by_name(const char *devname)
  40 {
  41         struct list_head *entry;
  42         struct mii_dev *dev;
  43
  44         if (!devname) {
  45                 printf("NULL device name!\n");
  46                 return NULL;
  47         }
  48
  49         list_for_each(entry, &mii_devs) {
  50                 dev = list_entry(entry, struct mii_dev, link);
  51                 if (strcmp(dev->name, devname) == 0)
  52                         return dev;
  53         }
  54
  55         return NULL;
  56 }
  57
  58 /*****************************************************************************
  59  *
  60  * Initialize global data. Need to be called before any other miiphy routine.
  61  */
  62 void miiphy_init(void)
  63 {
  64         INIT_LIST_HEAD(&mii_devs);
  65         current_mii = NULL;
  66 }
  67
  68 static int legacy_miiphy_read(struct mii_dev *bus, int addr, int devad, int reg)
  69 {
  70         unsigned short val;
  71         int ret;
  72         struct legacy_mii_dev *ldev = bus->priv;
  73
  74         ret = ldev->read(bus->name, addr, reg, &val);
  75
  76         return ret ? -1 : (int)val;
  77 }
  78
  79 static int legacy_miiphy_write(struct mii_dev *bus, int addr, int devad,
  80                                 int reg, u16 val)
  81 {
  82         struct legacy_mii_dev *ldev = bus->priv;
  83
  84         return ldev->write(bus->name, addr, reg, val);
  85 }
  86
  87 /*****************************************************************************
  88  *
  89  * Register read and write MII access routines for the device <name>.
  90  * This API is now deprecated. Please use mdio_alloc and mdio_register, instead.
  91  */
  92 void miiphy_register(const char *name,
  93                       int (*read)(const char *devname, unsigned char addr,
  94                                    unsigned char reg, unsigned short *value),
  95                       int (*write)(const char *devname, unsigned char addr,
  96                                     unsigned char reg, unsigned short value))
  97 {
  98         struct mii_dev *new_dev;
  99         struct legacy_mii_dev *ldev;
 100
 101         BUG_ON(strlen(name) >= MDIO_NAME_LEN);
 102
 103         /* check if we have unique name */
 104         new_dev = miiphy_get_dev_by_name(name);
 105         if (new_dev) {
 106                 printf("miiphy_register: non unique device name '%s'\n", name);
 107                 return;
 108         }
 109
 110         /* allocate memory */
 111         new_dev = mdio_alloc();
 112         ldev = malloc(sizeof(*ldev));
 113
 114         if (new_dev == NULL || ldev == NULL) {
 115                 printf("miiphy_register: cannot allocate memory for '%s'\n",
 116                         name);
 117                 return;
 118         }
 119
 120         /* initalize mii_dev struct fields */
 121         new_dev->read = legacy_miiphy_read;
 122         new_dev->write = legacy_miiphy_write;
 123         strncpy(new_dev->name, name, MDIO_NAME_LEN);
 124         new_dev->name[MDIO_NAME_LEN - 1] = 0;
 125         ldev->read = read;
 126         ldev->write = write;
 127         new_dev->priv = ldev;
 128
 129         debug("miiphy_register: added '%s', read=0x%08lx, write=0x%08lx\n",
 130                new_dev->name, ldev->read, ldev->write);
 131
 132         /* add it to the list */
 133         list_add_tail(&new_dev->link, &mii_devs);
 134
 135         if (!current_mii)
 136                 current_mii = new_dev;
 137 }
 138
 139 struct mii_dev *mdio_alloc(void)
 140 {
 141         struct mii_dev *bus;
 142
 143         bus = malloc(sizeof(*bus));
 144         if (!bus)
 145                 return bus;
 146
 147         memset(bus, 0, sizeof(*bus));
 148
 149         /* initalize mii_dev struct fields */
 150         INIT_LIST_HEAD(&bus->link);
 151
 152         return bus;
 153 }
 154
 155 void mdio_free(struct mii_dev *bus)
 156 {
 157         free(bus);
 158 }
 159
 160 int mdio_register(struct mii_dev *bus)
 161 {
 162         if (!bus || !bus->name || !bus->read || !bus->write)
 163                 return -1;
 164
 165         /* check if we have unique name */
 166         if (miiphy_get_dev_by_name(bus->name)) {
 167                 printf("mdio_register: non unique device name '%s'\n",
 168                         bus->name);
 169                 return -1;
 170         }
 171
 172         /* add it to the list */
 173         list_add_tail(&bus->link, &mii_devs);
 174
 175         if (!current_mii)
 176                 current_mii = bus;
 177
 178         return 0;
 179 }
 180
 181 int mdio_unregister(struct mii_dev *bus)
 182 {
 183         if (!bus)
 184                 return 0;
 185
 186         /* delete it from the list */
 187         list_del(&bus->link);
 188
 189         if (current_mii == bus)
 190                 current_mii = NULL;
 191
 192         return 0;
 193 }
 194
 195 void mdio_list_devices(void)
 196 {
 197         struct list_head *entry;
 198
 199         list_for_each(entry, &mii_devs) {
 200                 int i;
 201                 struct mii_dev *bus = list_entry(entry, struct mii_dev, link);
 202
 203                 printf("%s:\n", bus->name);
 204
 205                 for (i = 0; i < PHY_MAX_ADDR; i++) {
 206                         struct phy_device *phydev = bus->phymap[i];
 207
 208                         if (phydev) {
 209                                 printf("%d - %s", i, phydev->drv->name);
 210
 211                                 if (phydev->dev)
 212                                         printf(" <--> %s\n", phydev->dev->name);
 213                                 else
 214                                         printf("\n");
 215                         }
 216                 }
 217         }
 218 }
 219
 220 int miiphy_set_current_dev(const char *devname)
 221 {
 222         struct mii_dev *dev;
 223
 224         dev = miiphy_get_dev_by_name(devname);
 225         if (dev) {
 226                 current_mii = dev;
 227                 return 0;
 228         }
 229
 230         printf("No such device: %s\n", devname);
 231
 232         return 1;
 233 }
 234
 235 struct mii_dev *mdio_get_current_dev(void)
 236 {
 237         return current_mii;
 238 }
 239
 240 struct phy_device *mdio_phydev_for_ethname(const char *ethname)
 241 {
 242         struct list_head *entry;
 243         struct mii_dev *bus;
 244
 245         list_for_each(entry, &mii_devs) {
 246                 int i;
 247                 bus = list_entry(entry, struct mii_dev, link);
 248
 249                 for (i = 0; i < PHY_MAX_ADDR; i++) {
 250                         if (!bus->phymap[i] || !bus->phymap[i]->dev)
 251                                 continue;
 252
 253                         if (strcmp(bus->phymap[i]->dev->name, ethname) == 0)
 254                                 return bus->phymap[i];
 255                 }
 256         }
 257
 258         printf("%s is not a known ethernet\n", ethname);
 259         return NULL;
 260 }
 261
 262 const char *miiphy_get_current_dev(void)
 263 {
 264         if (current_mii)
 265                 return current_mii->name;
 266
 267         return NULL;
 268 }
 269
 270 static struct mii_dev *miiphy_get_active_dev(const char *devname)
 271 {
 272         /* If the current mii is the one we want, return it */
 273         if (current_mii)
 274                 if (strcmp(current_mii->name, devname) == 0)
 275                         return current_mii;
 276
 277         /* Otherwise, set the active one to the one we want */
 278         if (miiphy_set_current_dev(devname))
 279                 return NULL;
 280         else
 281                 return current_mii;
 282 }
 283
 284 /*****************************************************************************
 285  *
 286  * Read to variable <value> from the PHY attached to device <devname>,
 287  * use PHY address <addr> and register <reg>.
 288  *
 289  * This API is deprecated. Use phy_read on a phy_device found via phy_connect
 290  *
 291  * Returns:
 292  *   0 on success
 293  */
 294 int miiphy_read(const char *devname, unsigned char addr, unsigned char reg,
 295                  unsigned short *value)
 296 {
 297         struct mii_dev *bus;
 298         int ret;
 299
 300         bus = miiphy_get_active_dev(devname);
 301         if (!bus)
 302                 return 1;
 303
 304         ret = bus->read(bus, addr, MDIO_DEVAD_NONE, reg);
 305         if (ret < 0)
 306                 return 1;
 307
 308         *value = (unsigned short)ret;
 309         return 0;
 310 }
 311
 312 /*****************************************************************************
 313  *
 314  * Write <value> to the PHY attached to device <devname>,
 315  * use PHY address <addr> and register <reg>.
 316  *
 317  * This API is deprecated. Use phy_write on a phy_device found by phy_connect
 318  *
 319  * Returns:
 320  *   0 on success
 321  */
 322 int miiphy_write(const char *devname, unsigned char addr, unsigned char reg,
 323                   unsigned short value)
 324 {
 325         struct mii_dev *bus;
 326
 327         bus = miiphy_get_active_dev(devname);
 328         if (bus)
 329                 return bus->write(bus, addr, MDIO_DEVAD_NONE, reg, value);
 330
 331         return 1;
 332 }
 333
 334 /*****************************************************************************
 335  *
 336  * Print out list of registered MII capable devices.
 337  */
 338 void miiphy_listdev(void)
 339 {
 340         struct list_head *entry;
 341         struct mii_dev *dev;
 342
 343         puts("MII devices: ");
 344         list_for_each(entry, &mii_devs) {
 345                 dev = list_entry(entry, struct mii_dev, link);
 346                 printf("'%s' ", dev->name);
 347         }
 348         puts("\n");
 349
 350         if (current_mii)
 351                 printf("Current device: '%s'\n", current_mii->name);
 352 }
 353
 354 /*****************************************************************************
 355  *
 356  * Read the OUI, manufacture's model number, and revision number.
 357  *
 358  * OUI:     22 bits (unsigned int)
 359  * Model:    6 bits (unsigned char)
 360  * Revision: 4 bits (unsigned char)
 361  *
 362  * This API is deprecated.
 363  *
 364  * Returns:
 365  *   0 on success
 366  */
 367 int miiphy_info(const char *devname, unsigned char addr, unsigned int *oui,
 368                  unsigned char *model, unsigned char *rev)
 369 {
 370         unsigned int reg = 0;
 371         unsigned short tmp;
 372
 373         if (miiphy_read(devname, addr, MII_PHYSID2, &tmp) != 0) {
 374                 debug("PHY ID register 2 read failed\n");
 375                 return -1;
 376         }
 377         reg = tmp;
 378
 379         debug("MII_PHYSID2 @ 0x%x = 0x%04x\n", addr, reg);
 380
 381         if (reg == 0xFFFF) {
 382                 /* No physical device present at this address */
 383                 return -1;
 384         }
 385
 386         if (miiphy_read(devname, addr, MII_PHYSID1, &tmp) != 0) {
 387                 debug("PHY ID register 1 read failed\n");
 388                 return -1;
 389         }
 390         reg |= tmp << 16;
 391         debug("PHY_PHYIDR[1,2] @ 0x%x = 0x%08x\n", addr, reg);
 392
 393         *oui = (reg >> 10);
 394         *model = (unsigned char)((reg >> 4) & 0x0000003F);
 395         *rev = (unsigned char)(reg & 0x0000000F);
 396         return 0;
 397 }
 398
 399 #ifndef CONFIG_PHYLIB
 400 /*****************************************************************************
 401  *
 402  * Reset the PHY.
 403  *
 404  * This API is deprecated. Use PHYLIB.
 405  *
 406  * Returns:
 407  *   0 on success
 408  */
 409 int miiphy_reset(const char *devname, unsigned char addr)
 410 {
 411         unsigned short reg;
 412         int timeout = 500;
 413
 414         if (miiphy_read(devname, addr, MII_BMCR, &reg) != 0) {
 415                 debug("PHY status read failed\n");
 416                 return -1;
 417         }
 418         if (miiphy_write(devname, addr, MII_BMCR, reg | BMCR_RESET) != 0) {
 419                 debug("PHY reset failed\n");
 420                 return -1;
 421         }
 422 #ifdef CONFIG_PHY_RESET_DELAY
 423         udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */
 424 #endif
 425         /*
 426          * Poll the control register for the reset bit to go to 0 (it is
 427          * auto-clearing).  This should happen within 0.5 seconds per the
 428          * IEEE spec.
 429          */
 430         reg = 0x8000;
 431         while (((reg & 0x8000) != 0) && timeout--) {
 432                 if (miiphy_read(devname, addr, MII_BMCR, &reg) != 0) {
 433                         debug("PHY status read failed\n");
 434                         return -1;
 435                 }
 436                 udelay(1000);
 437         }
 438         if ((reg & 0x8000) == 0) {
 439                 return 0;
 440         } else {
 441                 puts("PHY reset timed out\n");
 442                 return -1;
 443         }
 444         return 0;
 445 }
 446 #endif /* !PHYLIB */
 447
 448 /*****************************************************************************
 449  *
 450  * Determine the ethernet speed (10/100/1000).  Return 10 on error.
 451  */
 452 int miiphy_speed(const char *devname, unsigned char addr)
 453 {
 454         u16 bmcr, anlpar;
 455
 456 #if defined(CONFIG_PHY_GIGE)
 457         u16 btsr;
 458
 459         /*
 460          * Check for 1000BASE-X.  If it is supported, then assume that the speed
 461          * is 1000.
 462          */
 463         if (miiphy_is_1000base_x(devname, addr))
 464                 return _1000BASET;
 465
 466         /*
 467          * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set.
 468          */
 469         /* Check for 1000BASE-T. */
 470         if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) {
 471                 printf("PHY 1000BT status");
 472                 goto miiphy_read_failed;
 473         }
 474         if (btsr != 0xFFFF &&
 475                         (btsr & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)))
 476                 return _1000BASET;
 477 #endif /* CONFIG_PHY_GIGE */
 478
 479         /* Check Basic Management Control Register first. */
 480         if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) {
 481                 printf("PHY speed");
 482                 goto miiphy_read_failed;
 483         }
 484         /* Check if auto-negotiation is on. */
 485         if (bmcr & BMCR_ANENABLE) {
 486                 /* Get auto-negotiation results. */
 487                 if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
 488                         printf("PHY AN speed");
 489                         goto miiphy_read_failed;
 490                 }
 491                 return (anlpar & LPA_100) ? _100BASET : _10BASET;
 492         }
 493         /* Get speed from basic control settings. */
 494         return (bmcr & BMCR_SPEED100) ? _100BASET : _10BASET;
 495
 496 miiphy_read_failed:
 497         printf(" read failed, assuming 10BASE-T\n");
 498         return _10BASET;
 499 }
 500
 501 /*****************************************************************************
 502  *
 503  * Determine full/half duplex.  Return half on error.
 504  */
 505 int miiphy_duplex(const char *devname, unsigned char addr)
 506 {
 507         u16 bmcr, anlpar;
 508
 509 #if defined(CONFIG_PHY_GIGE)
 510         u16 btsr;
 511
 512         /* Check for 1000BASE-X. */
 513         if (miiphy_is_1000base_x(devname, addr)) {
 514                 /* 1000BASE-X */
 515                 if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
 516                         printf("1000BASE-X PHY AN duplex");
 517                         goto miiphy_read_failed;
 518                 }
 519         }
 520         /*
 521          * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set.
 522          */
 523         /* Check for 1000BASE-T. */
 524         if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) {
 525                 printf("PHY 1000BT status");
 526                 goto miiphy_read_failed;
 527         }
 528         if (btsr != 0xFFFF) {
 529                 if (btsr & PHY_1000BTSR_1000FD) {
 530                         return FULL;
 531                 } else if (btsr & PHY_1000BTSR_1000HD) {
 532                         return HALF;
 533                 }
 534         }
 535 #endif /* CONFIG_PHY_GIGE */
 536
 537         /* Check Basic Management Control Register first. */
 538         if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) {
 539                 puts("PHY duplex");
 540                 goto miiphy_read_failed;
 541         }
 542         /* Check if auto-negotiation is on. */
 543         if (bmcr & BMCR_ANENABLE) {
 544                 /* Get auto-negotiation results. */
 545                 if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
 546                         puts("PHY AN duplex");
 547                         goto miiphy_read_failed;
 548                 }
 549                 return (anlpar & (LPA_10FULL | LPA_100FULL)) ?
 550                     FULL : HALF;
 551         }
 552         /* Get speed from basic control settings. */
 553         return (bmcr & BMCR_FULLDPLX) ? FULL : HALF;
 554
 555 miiphy_read_failed:
 556         printf(" read failed, assuming half duplex\n");
 557         return HALF;
 558 }
 559
 560 /*****************************************************************************
 561  *
 562  * Return 1 if PHY supports 1000BASE-X, 0 if PHY supports 10BASE-T/100BASE-TX/
 563  * 1000BASE-T, or on error.
 564  */
 565 int miiphy_is_1000base_x(const char *devname, unsigned char addr)
 566 {
 567 #if defined(CONFIG_PHY_GIGE)
 568         u16 exsr;
 569
 570         if (miiphy_read(devname, addr, MII_ESTATUS, &exsr)) {
 571                 printf("PHY extended status read failed, assuming no "
 572                         "1000BASE-X\n");
 573                 return 0;
 574         }
 575         return 0 != (exsr & (ESTATUS_1000XF | ESTATUS_1000XH));
 576 #else
 577         return 0;
 578 #endif
 579 }
 580
 581 #ifdef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
 582 /*****************************************************************************
 583  *
 584  * Determine link status
 585  */
 586 int miiphy_link(const char *devname, unsigned char addr)
 587 {
 588         unsigned short reg;
 589
 590         /* dummy read; needed to latch some phys */
 591         (void)miiphy_read(devname, addr, MII_BMSR, &reg);
 592         if (miiphy_read(devname, addr, MII_BMSR, &reg)) {
 593                 puts("MII_BMSR read failed, assuming no link\n");
 594                 return 0;
 595         }
 596
 597         /* Determine if a link is active */
 598         if ((reg & BMSR_LSTATUS) != 0) {
 599                 return 1;
 600         } else {
 601                 return 0;
 602         }
 603 }
 604 #endif