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1 /*
2 * (C) Copyright 2001, 2002
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 *
23 * This has been changed substantially by Gerald Van Baren, Custom IDEAS,
24 * vanbaren@cideas.com. It was heavily influenced by LiMon, written by
25 * Neil Russell.
26 */
27
28 #include <common.h>
29 #ifdef CONFIG_MPC8260 /* only valid for MPC8260 */
30 #include <ioports.h>
31 #endif
32 #ifdef CONFIG_AT91RM9200DK /* need this for the at91rm9200dk */
33 #include <asm/io.h>
34 #include <asm/arch/hardware.h>
35 #endif
36 #ifdef CONFIG_IXP425 /* only valid for IXP425 */
37 #include <asm/arch/ixp425.h>
38 #endif
39 #include <i2c.h>
40
41 #if defined(CONFIG_SOFT_I2C)
42
43 /* #define DEBUG_I2C */
44
45 #ifdef DEBUG_I2C
46 DECLARE_GLOBAL_DATA_PTR;
47 #endif
48
49
50 /*-----------------------------------------------------------------------
51 * Definitions
52 */
53
54 #define RETRIES 0
55
56
57 #define I2C_ACK 0 /* PD_SDA level to ack a byte */
58 #define I2C_NOACK 1 /* PD_SDA level to noack a byte */
59
60
61 #ifdef DEBUG_I2C
62 #define PRINTD(fmt,args...) do { \
63 if (gd->have_console) \
64 printf (fmt ,##args); \
65 } while (0)
66 #else
67 #define PRINTD(fmt,args...)
68 #endif
69
70 /*-----------------------------------------------------------------------
71 * Local functions
72 */
73 static void send_reset (void);
74 static void send_start (void);
75 static void send_stop (void);
76 static void send_ack (int);
77 static int write_byte (uchar byte);
78 static uchar read_byte (int);
79
80
81 /*-----------------------------------------------------------------------
82 * Send a reset sequence consisting of 9 clocks with the data signal high
83 * to clock any confused device back into an idle state. Also send a
84 * <stop> at the end of the sequence for belts & suspenders.
85 */
86 static void send_reset(void)
87 {
88 #ifdef CONFIG_MPC8260
89 volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
90 #endif
91 #ifdef CONFIG_8xx
92 volatile immap_t *immr = (immap_t *)CFG_IMMR;
93 #endif
94 int j;
95
96 I2C_SCL(1);
97 I2C_SDA(1);
98 #ifdef I2C_INIT
99 I2C_INIT;
100 #endif
101 I2C_TRISTATE;
102 for(j = 0; j < 9; j++) {
103 I2C_SCL(0);
104 I2C_DELAY;
105 I2C_DELAY;
106 I2C_SCL(1);
107 I2C_DELAY;
108 I2C_DELAY;
109 }
110 send_stop();
111 I2C_TRISTATE;
112 }
113
114 /*-----------------------------------------------------------------------
115 * START: High -> Low on SDA while SCL is High
116 */
117 static void send_start(void)
118 {
119 #ifdef CONFIG_MPC8260
120 volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
121 #endif
122 #ifdef CONFIG_8xx
123 volatile immap_t *immr = (immap_t *)CFG_IMMR;
124 #endif
125
126 I2C_DELAY;
127 I2C_SDA(1);
128 I2C_ACTIVE;
129 I2C_DELAY;
130 I2C_SCL(1);
131 I2C_DELAY;
132 I2C_SDA(0);
133 I2C_DELAY;
134 }
135
136 /*-----------------------------------------------------------------------
137 * STOP: Low -> High on SDA while SCL is High
138 */
139 static void send_stop(void)
140 {
141 #ifdef CONFIG_MPC8260
142 volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
143 #endif
144 #ifdef CONFIG_8xx
145 volatile immap_t *immr = (immap_t *)CFG_IMMR;
146 #endif
147
148 I2C_SCL(0);
149 I2C_DELAY;
150 I2C_SDA(0);
151 I2C_ACTIVE;
152 I2C_DELAY;
153 I2C_SCL(1);
154 I2C_DELAY;
155 I2C_SDA(1);
156 I2C_DELAY;
157 I2C_TRISTATE;
158 }
159
160
161 /*-----------------------------------------------------------------------
162 * ack should be I2C_ACK or I2C_NOACK
163 */
164 static void send_ack(int ack)
165 {
166 #ifdef CONFIG_MPC8260
167 volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
168 #endif
169 #ifdef CONFIG_8xx
170 volatile immap_t *immr = (immap_t *)CFG_IMMR;
171 #endif
172
173 I2C_SCL(0);
174 I2C_DELAY;
175 I2C_ACTIVE;
176 I2C_SDA(ack);
177 I2C_DELAY;
178 I2C_SCL(1);
179 I2C_DELAY;
180 I2C_DELAY;
181 I2C_SCL(0);
182 I2C_DELAY;
183 }
184
185
186 /*-----------------------------------------------------------------------
187 * Send 8 bits and look for an acknowledgement.
188 */
189 static int write_byte(uchar data)
190 {
191 #ifdef CONFIG_MPC8260
192 volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
193 #endif
194 #ifdef CONFIG_8xx
195 volatile immap_t *immr = (immap_t *)CFG_IMMR;
196 #endif
197 int j;
198 int nack;
199
200 I2C_ACTIVE;
201 for(j = 0; j < 8; j++) {
202 I2C_SCL(0);
203 I2C_DELAY;
204 I2C_SDA(data & 0x80);
205 I2C_DELAY;
206 I2C_SCL(1);
207 I2C_DELAY;
208 I2C_DELAY;
209
210 data <<= 1;
211 }
212
213 /*
214 * Look for an <ACK>(negative logic) and return it.
215 */
216 I2C_SCL(0);
217 I2C_DELAY;
218 I2C_SDA(1);
219 I2C_TRISTATE;
220 I2C_DELAY;
221 I2C_SCL(1);
222 I2C_DELAY;
223 I2C_DELAY;
224 nack = I2C_READ;
225 I2C_SCL(0);
226 I2C_DELAY;
227 I2C_ACTIVE;
228
229 return(nack); /* not a nack is an ack */
230 }
231
232
233 /*-----------------------------------------------------------------------
234 * if ack == I2C_ACK, ACK the byte so can continue reading, else
235 * send I2C_NOACK to end the read.
236 */
237 static uchar read_byte(int ack)
238 {
239 #ifdef CONFIG_MPC8260
240 volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT);
241 #endif
242 #ifdef CONFIG_8xx
243 volatile immap_t *immr = (immap_t *)CFG_IMMR;
244 #endif
245 int data;
246 int j;
247
248 /*
249 * Read 8 bits, MSB first.
250 */
251 I2C_TRISTATE;
252 data = 0;
253 for(j = 0; j < 8; j++) {
254 I2C_SCL(0);
255 I2C_DELAY;
256 I2C_SCL(1);
257 I2C_DELAY;
258 data <<= 1;
259 data |= I2C_READ;
260 I2C_DELAY;
261 }
262 send_ack(ack);
263
264 return(data);
265 }
266
267 /*=====================================================================*/
268 /* Public Functions */
269 /*=====================================================================*/
270
271 /*-----------------------------------------------------------------------
272 * Initialization
273 */
274 void i2c_init (int speed, int slaveaddr)
275 {
276 /*
277 * WARNING: Do NOT save speed in a static variable: if the
278 * I2C routines are called before RAM is initialized (to read
279 * the DIMM SPD, for instance), RAM won't be usable and your
280 * system will crash.
281 */
282 send_reset ();
283 }
284
285 /*-----------------------------------------------------------------------
286 * Probe to see if a chip is present. Also good for checking for the
287 * completion of EEPROM writes since the chip stops responding until
288 * the write completes (typically 10mSec).
289 */
290 int i2c_probe(uchar addr)
291 {
292 int rc;
293
294 /*
295 * perform 1 byte write transaction with just address byte
296 * (fake write)
297 */
298 send_start();
299 rc = write_byte ((addr << 1) | 0);
300 send_stop();
301
302 return (rc ? 1 : 0);
303 }
304
305 /*-----------------------------------------------------------------------
306 * Read bytes
307 */
308 int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
309 {
310 int shift;
311 PRINTD("i2c_read: chip %02X addr %02X alen %d buffer %p len %d\n",
312 chip, addr, alen, buffer, len);
313
314 #ifdef CFG_I2C_EEPROM_ADDR_OVERFLOW
315 /*
316 * EEPROM chips that implement "address overflow" are ones
317 * like Catalyst 24WC04/08/16 which has 9/10/11 bits of
318 * address and the extra bits end up in the "chip address"
319 * bit slots. This makes a 24WC08 (1Kbyte) chip look like
320 * four 256 byte chips.
321 *
322 * Note that we consider the length of the address field to
323 * still be one byte because the extra address bits are
324 * hidden in the chip address.
325 */
326 chip |= ((addr >> (alen * 8)) & CFG_I2C_EEPROM_ADDR_OVERFLOW);
327
328 PRINTD("i2c_read: fix addr_overflow: chip %02X addr %02X\n",
329 chip, addr);
330 #endif
331
332 /*
333 * Do the addressing portion of a write cycle to set the
334 * chip's address pointer. If the address length is zero,
335 * don't do the normal write cycle to set the address pointer,
336 * there is no address pointer in this chip.
337 */
338 send_start();
339 if(alen > 0) {
340 if(write_byte(chip << 1)) { /* write cycle */
341 send_stop();
342 PRINTD("i2c_read, no chip responded %02X\n", chip);
343 return(1);
344 }
345 shift = (alen-1) * 8;
346 while(alen-- > 0) {
347 if(write_byte(addr >> shift)) {
348 PRINTD("i2c_read, address not <ACK>ed\n");
349 return(1);
350 }
351 shift -= 8;
352 }
353 send_stop(); /* reportedly some chips need a full stop */
354 send_start();
355 }
356 /*
357 * Send the chip address again, this time for a read cycle.
358 * Then read the data. On the last byte, we do a NACK instead
359 * of an ACK(len == 0) to terminate the read.
360 */
361 write_byte((chip << 1) | 1); /* read cycle */
362 while(len-- > 0) {
363 *buffer++ = read_byte(len == 0);
364 }
365 send_stop();
366 return(0);
367 }
368
369 /*-----------------------------------------------------------------------
370 * Write bytes
371 */
372 int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
373 {
374 int shift, failures = 0;
375
376 PRINTD("i2c_write: chip %02X addr %02X alen %d buffer %p len %d\n",
377 chip, addr, alen, buffer, len);
378
379 send_start();
380 if(write_byte(chip << 1)) { /* write cycle */
381 send_stop();
382 PRINTD("i2c_write, no chip responded %02X\n", chip);
383 return(1);
384 }
385 shift = (alen-1) * 8;
386 while(alen-- > 0) {
387 if(write_byte(addr >> shift)) {
388 PRINTD("i2c_write, address not <ACK>ed\n");
389 return(1);
390 }
391 shift -= 8;
392 }
393
394 while(len-- > 0) {
395 if(write_byte(*buffer++)) {
396 failures++;
397 }
398 }
399 send_stop();
400 return(failures);
401 }
402
403 /*-----------------------------------------------------------------------
404 * Read a register
405 */
406 uchar i2c_reg_read(uchar i2c_addr, uchar reg)
407 {
408 uchar buf;
409
410 i2c_read(i2c_addr, reg, 1, &buf, 1);
411
412 return(buf);
413 }
414
415 /*-----------------------------------------------------------------------
416 * Write a register
417 */
418 void i2c_reg_write(uchar i2c_addr, uchar reg, uchar val)
419 {
420 i2c_write(i2c_addr, reg, 1, &val, 1);
421 }
422
423
424 #endif /* CONFIG_SOFT_I2C */