cpu/arm1136/cpu.c

   1 /*
   2  * (C) Copyright 2004 Texas Insturments
   3  *
   4  * (C) Copyright 2002
   5  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
   6  * Marius Groeger <mgroeger@sysgo.de>
   7  *
   8  * (C) Copyright 2002
   9  * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
  10  *
  11  * See file CREDITS for list of people who contributed to this
  12  * project.
  13  *
  14  * This program is free software; you can redistribute it and/or
  15  * modify it under the terms of the GNU General Public License as
  16  * published by the Free Software Foundation; either version 2 of
  17  * the License, or (at your option) any later version.
  18  *
  19  * This program is distributed in the hope that it will be useful,
  20  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  22  * GNU General Public License for more details.
  23  *
  24  * You should have received a copy of the GNU General Public License
  25  * along with this program; if not, write to the Free Software
  26  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  27  * MA 02111-1307 USA
  28  */
  29
  30 /*
  31  * CPU specific code
  32  */
  33
  34 #include <common.h>
  35 #include <command.h>
  36 #include <asm/arch/omap2420.h>
  37
  38 /* read co-processor 15, register #1 (control register) */
  39 static unsigned long read_p15_c1 (void)
  40 {
  41         unsigned long value;
  42
  43         __asm__ __volatile__(
  44                                                 "mrc    p15, 0, %0, c1, c0, 0   @ read control reg\n"
  45                                                 : "=r" (value)
  46                                                 :
  47                                                 : "memory");
  48         return value;
  49 }
  50
  51 /* write to co-processor 15, register #1 (control register) */
  52 static void write_p15_c1 (unsigned long value)
  53 {
  54         __asm__ __volatile__(
  55                                                 "mcr    p15, 0, %0, c1, c0, 0   @ write it back\n"
  56                                                 :
  57                                                 : "r" (value)
  58                                                 : "memory");
  59
  60         read_p15_c1 ();
  61 }
  62
  63 static void cp_delay (void)
  64 {
  65         volatile int i;
  66
  67         /* Many OMAP regs need at least 2 nops  */
  68         for (i = 0; i < 100; i++);
  69 }
  70
  71 /* See also ARM Ref. Man. */
  72 #define C1_MMU          (1<<0)          /* mmu off/on */
  73 #define C1_ALIGN        (1<<1)          /* alignment faults off/on */
  74 #define C1_DC           (1<<2)          /* dcache off/on */
  75 #define C1_WB           (1<<3)          /* merging write buffer on/off */
  76 #define C1_BIG_ENDIAN   (1<<7)  /* big endian off/on */
  77 #define C1_SYS_PROT     (1<<8)          /* system protection */
  78 #define C1_ROM_PROT     (1<<9)          /* ROM protection */
  79 #define C1_IC           (1<<12)         /* icache off/on */
  80 #define C1_HIGH_VECTORS (1<<13) /* location of vectors: low/high addresses */
  81 #define RESERVED_1      (0xf << 3)      /* must be 111b for R/W */
  82
  83 int cpu_init (void)
  84 {
  85         /*
  86          * setup up stacks if necessary
  87          */
  88 #ifdef CONFIG_USE_IRQ
  89         DECLARE_GLOBAL_DATA_PTR;
  90
  91         IRQ_STACK_START = _armboot_start - CFG_MALLOC_LEN - CFG_GBL_DATA_SIZE - 4;
  92         FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ;
  93 #endif
  94         return 0;
  95 }
  96
  97 int cleanup_before_linux (void)
  98 {
  99         /*
 100          * this function is called just before we call linux
 101          * it prepares the processor for linux
 102          *
 103          * we turn off caches etc ...
 104          */
 105
 106         unsigned long i;
 107
 108         disable_interrupts ();
 109
 110 #ifdef CONFIG_LCD
 111         {
 112                 extern void lcd_disable(void);
 113                 extern void lcd_panel_disable(void);
 114
 115                 lcd_disable(); /* proper disable of lcd & panel */
 116                 lcd_panel_disable();
 117         }
 118 #endif
 119
 120         /* turn off I/D-cache */
 121         asm ("mrc p15, 0, %0, c1, c0, 0":"=r" (i));
 122         i &= ~(C1_DC | C1_IC);
 123         asm ("mcr p15, 0, %0, c1, c0, 0": :"r" (i));
 124
 125         /* flush I/D-cache */
 126         i = 0;
 127         asm ("mcr p15, 0, %0, c7, c7, 0": :"r" (i));  // invalidate both caches and flush btb
 128         asm ("mcr p15, 0, %0, c7, c10, 4": :"r" (i)); // mem barrier to sync things
 129         return(0);
 130 }
 131
 132 int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 133 {
 134         extern void reset_cpu (ulong addr);
 135
 136         disable_interrupts ();
 137         reset_cpu (0);
 138         /*NOTREACHED*/
 139         return(0);
 140 }
 141
 142 void icache_enable (void)
 143 {
 144         ulong reg;
 145
 146         reg = read_p15_c1 ();   /* get control reg. */
 147         cp_delay ();
 148         write_p15_c1 (reg | C1_IC);
 149 }
 150
 151 void icache_disable (void)
 152 {
 153         ulong reg;
 154
 155         reg = read_p15_c1 ();
 156         cp_delay ();
 157         write_p15_c1 (reg & ~C1_IC);
 158 }
 159
 160 int icache_status (void)
 161 {
 162         return(read_p15_c1 () & C1_IC) != 0;
 163 }