cpu/arm920t/at91/timer.c

   1 /*
   2  * (C) Copyright 2002
   3  * Lineo, Inc. <www.lineo.com>
   4  * Bernhard Kuhn <bkuhn@lineo.com>
   5  *
   6  * (C) Copyright 2002
   7  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
   8  * Marius Groeger <mgroeger@sysgo.de>
   9  *
  10  * (C) Copyright 2002
  11  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  12  * Alex Zuepke <azu@sysgo.de>
  13  *
  14  * See file CREDITS for list of people who contributed to this
  15  * project.
  16  *
  17  * This program is free software; you can redistribute it and/or
  18  * modify it under the terms of the GNU General Public License as
  19  * published by the Free Software Foundation; either version 2 of
  20  * the License, or (at your option) any later version.
  21  *
  22  * This program is distributed in the hope that it will be useful,
  23  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  25  * GNU General Public License for more details.
  26  *
  27  * You should have received a copy of the GNU General Public License
  28  * along with this program; if not, write to the Free Software
  29  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  30  * MA 02111-1307 USA
  31  */
  32
  33 #include <common.h>
  34
  35 #include <asm/io.h>
  36 #include <asm/hardware.h>
  37 #include <asm/arch/at91_tc.h>
  38 #include <asm/arch/at91_pmc.h>
  39
  40 /* the number of clocks per CONFIG_SYS_HZ */
  41 #define TIMER_LOAD_VAL (CONFIG_SYS_HZ_CLOCK/CONFIG_SYS_HZ)
  42
  43 static u32 timestamp;
  44 static u32 lastinc;
  45
  46 int timer_init(void)
  47 {
  48         at91_tc_t *tc = (at91_tc_t *) AT91_TC_BASE;
  49         at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
  50
  51         /* enables TC1.0 clock */
  52         writel(1 << AT91_ID_TC0, &pmc->pcer);   /* enable clock */
  53
  54         writel(0, &tc->bcr);
  55         writel(AT91_TC_BMR_TC0XC0S_NONE | AT91_TC_BMR_TC1XC1S_NONE |
  56                 AT91_TC_BMR_TC2XC2S_NONE , &tc->bmr);
  57
  58         writel(AT91_TC_CCR_CLKDIS, &tc->tc[0].ccr);
  59         /* set to MCLK/2 and restart the timer
  60         when the value in TC_RC is reached */
  61         writel(AT91_TC_CMR_TCCLKS_CLOCK1 | AT91_TC_CMR_CPCTRG, &tc->tc[0].cmr);
  62
  63         writel(0xFFFFFFFF, &tc->tc[0].idr); /* disable interupts */
  64         writel(TIMER_LOAD_VAL, &tc->tc[0].rc);
  65
  66         writel(AT91_TC_CCR_SWTRG | AT91_TC_CCR_CLKEN, &tc->tc[0].ccr);
  67         lastinc = 0;
  68         timestamp = 0;
  69
  70         return 0;
  71 }
  72
  73 /*
  74  * timer without interrupts
  75  */
  76
  77 void reset_timer(void)
  78 {
  79         reset_timer_masked();
  80 }
  81
  82 ulong get_timer(ulong base)
  83 {
  84         return get_timer_masked() - base;
  85 }
  86
  87 void set_timer(ulong t)
  88 {
  89         timestamp = t;
  90 }
  91
  92 void __udelay(unsigned long usec)
  93 {
  94         udelay_masked(usec);
  95 }
  96
  97 void reset_timer_masked(void)
  98 {
  99         /* reset time */
 100         at91_tc_t *tc = (at91_tc_t *) AT91_TC_BASE;
 101         lastinc = readl(&tc->tc[0].cv) & 0x0000ffff;
 102         timestamp = 0;
 103 }
 104
 105 ulong get_timer_raw(void)
 106 {
 107         at91_tc_t *tc = (at91_tc_t *) AT91_TC_BASE;
 108         u32 now;
 109
 110         now = readl(&tc->tc[0].cv) & 0x0000ffff;
 111
 112         if (now >= lastinc) {
 113                 /* normal mode */
 114                 timestamp += now - lastinc;
 115         } else {
 116                 /* we have an overflow ... */
 117                 timestamp += now + TIMER_LOAD_VAL - lastinc;
 118         }
 119         lastinc = now;
 120
 121         return timestamp;
 122 }
 123
 124 ulong get_timer_masked(void)
 125 {
 126         return get_timer_raw()/TIMER_LOAD_VAL;
 127 }
 128
 129 void udelay_masked(unsigned long usec)
 130 {
 131         u32 tmo;
 132         u32 endtime;
 133         signed long diff;
 134
 135         tmo = CONFIG_SYS_HZ_CLOCK / 1000;
 136         tmo *= usec;
 137         tmo /= 1000;
 138
 139         endtime = get_timer_raw() + tmo;
 140
 141         do {
 142                 u32 now = get_timer_raw();
 143                 diff = endtime - now;
 144         } while (diff >= 0);
 145 }
 146
 147 /*
 148  * This function is derived from PowerPC code (read timebase as long long).
 149  * On ARM it just returns the timer value.
 150  */
 151 unsigned long long get_ticks(void)
 152 {
 153         return get_timer(0);
 154 }
 155
 156 /*
 157  * This function is derived from PowerPC code (timebase clock frequency).
 158  * On ARM it returns the number of timer ticks per second.
 159  */
 160 ulong get_tbclk(void)
 161 {
 162         return CONFIG_SYS_HZ;
 163 }