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Generic udelay() with watchdog support
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1 /*
2 * (C) Copyright 2003
3 * Texas Instruments <www.ti.com>
4 *
5 * (C) Copyright 2002
6 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
7 * Marius Groeger <mgroeger@sysgo.de>
8 *
9 * (C) Copyright 2002
10 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
11 * Alex Zuepke <azu@sysgo.de>
12 *
13 * (C) Copyright 2002-2004
14 * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
15 *
16 * (C) Copyright 2004
17 * Philippe Robin, ARM Ltd. <philippe.robin@arm.com>
18 *
19 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
20 *
21 * See file CREDITS for list of people who contributed to this
22 * project.
23 *
24 * This program is free software; you can redistribute it and/or
25 * modify it under the terms of the GNU General Public License as
26 * published by the Free Software Foundation; either version 2 of
27 * the License, or (at your option) any later version.
28 *
29 * This program is distributed in the hope that it will be useful,
30 * but WITHOUT ANY WARRANTY; without even the implied warranty of
31 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
32 * GNU General Public License for more details.
33 *
34 * You should have received a copy of the GNU General Public License
35 * along with this program; if not, write to the Free Software
36 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
37 * MA 02111-1307 USA
38 */
39
40 #include <common.h>
41 #include <asm/io.h>
42
43 struct davinci_timer {
44 u_int32_t pid12;
45 u_int32_t emumgt;
46 u_int32_t na1;
47 u_int32_t na2;
48 u_int32_t tim12;
49 u_int32_t tim34;
50 u_int32_t prd12;
51 u_int32_t prd34;
52 u_int32_t tcr;
53 u_int32_t tgcr;
54 u_int32_t wdtcr;
55 };
56
57 static struct davinci_timer * const timer =
58 (struct davinci_timer *)CONFIG_SYS_TIMERBASE;
59
60 #define TIMER_LOAD_VAL (CONFIG_SYS_HZ_CLOCK / CONFIG_SYS_HZ)
61 #define TIM_CLK_DIV 16
62
63 static ulong timestamp;
64 static ulong lastinc;
65
66 int timer_init(void)
67 {
68 /* We are using timer34 in unchained 32-bit mode, full speed */
69 writel(0x0, &timer->tcr);
70 writel(0x0, &timer->tgcr);
71 writel(0x06 | ((TIM_CLK_DIV - 1) << 8), &timer->tgcr);
72 writel(0x0, &timer->tim34);
73 writel(TIMER_LOAD_VAL, &timer->prd34);
74 lastinc = 0;
75 timestamp = 0;
76 writel(2 << 22, &timer->tcr);
77
78 return(0);
79 }
80
81 void reset_timer(void)
82 {
83 writel(0x0, &timer->tcr);
84 writel(0x0, &timer->tim34);
85 lastinc = 0;
86 timestamp = 0;
87 writel(2 << 22, &timer->tcr);
88 }
89
90 static ulong get_timer_raw(void)
91 {
92 ulong now = readl(&timer->tim34);
93
94 if (now >= lastinc) {
95 /* normal mode */
96 timestamp += now - lastinc;
97 } else {
98 /* overflow ... */
99 timestamp += now + TIMER_LOAD_VAL - lastinc;
100 }
101 lastinc = now;
102 return timestamp;
103 }
104
105 ulong get_timer(ulong base)
106 {
107 return((get_timer_raw() / (TIMER_LOAD_VAL / TIM_CLK_DIV)) - base);
108 }
109
110 void set_timer(ulong t)
111 {
112 timestamp = t;
113 }
114
115 void __udelay(unsigned long usec)
116 {
117 ulong tmo;
118 ulong endtime;
119 signed long diff;
120
121 tmo = CONFIG_SYS_HZ_CLOCK / 1000;
122 tmo *= usec;
123 tmo /= (1000 * TIM_CLK_DIV);
124
125 endtime = get_timer_raw() + tmo;
126
127 do {
128 ulong now = get_timer_raw();
129 diff = endtime - now;
130 } while (diff >= 0);
131 }
132
133 /*
134 * This function is derived from PowerPC code (read timebase as long long).
135 * On ARM it just returns the timer value.
136 */
137 unsigned long long get_ticks(void)
138 {
139 return(get_timer(0));
140 }
141
142 /*
143 * This function is derived from PowerPC code (timebase clock frequency).
144 * On ARM it returns the number of timer ticks per second.
145 */
146 ulong get_tbclk(void)
147 {
148 return CONFIG_SYS_HZ;
149 }