cpu/arm926ejs/interrupts.c

   1 /*
   2  * (C) Copyright 2003
   3  * Texas Instruments <www.ti.com>
   4  *
   5  * (C) Copyright 2002
   6  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
   7  * Marius Groeger <mgroeger@sysgo.de>
   8  *
   9  * (C) Copyright 2002
  10  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  11  * Alex Zuepke <azu@sysgo.de>
  12  *
  13  * (C) Copyright 2002-2004
  14  * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
  15  *
  16  * (C) Copyright 2004
  17  * Philippe Robin, ARM Ltd. <philippe.robin@arm.com>
  18  *
  19  * See file CREDITS for list of people who contributed to this
  20  * project.
  21  *
  22  * This program is free software; you can redistribute it and/or
  23  * modify it under the terms of the GNU General Public License as
  24  * published by the Free Software Foundation; either version 2 of
  25  * the License, or (at your option) any later version.
  26  *
  27  * This program is distributed in the hope that it will be useful,
  28  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  29  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  30  * GNU General Public License for more details.
  31  *
  32  * You should have received a copy of the GNU General Public License
  33  * along with this program; if not, write to the Free Software
  34  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  35  * MA 02111-1307 USA
  36  */
  37
  38 #include <common.h>
  39 #include <arm925t.h>
  40
  41 #include <asm/proc-armv/ptrace.h>
  42
  43 extern void reset_cpu(ulong addr);
  44 #define TIMER_LOAD_VAL 0xffffffff
  45
  46 /* macro to read the 32 bit timer */
  47 #ifdef CONFIG_OMAP
  48 #define READ_TIMER (*(volatile ulong *)(CFG_TIMERBASE+8))
  49 #endif
  50 #ifdef CONFIG_INTEGRATOR
  51 #define READ_TIMER (*(volatile ulong *)(CFG_TIMERBASE+4))
  52 #endif
  53 #ifdef CONFIG_VERSATILE
  54 #define READ_TIMER (*(volatile ulong *)(CFG_TIMERBASE+4))
  55 #endif
  56
  57 #ifdef CONFIG_USE_IRQ
  58 /* enable IRQ interrupts */
  59 void enable_interrupts (void)
  60 {
  61         unsigned long temp;
  62         __asm__ __volatile__("mrs %0, cpsr\n"
  63                              "bic %0, %0, #0x80\n"
  64                              "msr cpsr_c, %0"
  65                              : "=r" (temp)
  66                              :
  67                              : "memory");
  68 }
  69
  70
  71 /*
  72  * disable IRQ/FIQ interrupts
  73  * returns true if interrupts had been enabled before we disabled them
  74  */
  75 int disable_interrupts (void)
  76 {
  77         unsigned long old,temp;
  78         __asm__ __volatile__("mrs %0, cpsr\n"
  79                              "orr %1, %0, #0xc0\n"
  80                              "msr cpsr_c, %1"
  81                              : "=r" (old), "=r" (temp)
  82                              :
  83                              : "memory");
  84         return (old & 0x80) == 0;
  85 }
  86 #else
  87 void enable_interrupts (void)
  88 {
  89         return;
  90 }
  91 int disable_interrupts (void)
  92 {
  93         return 0;
  94 }
  95 #endif
  96
  97
  98 void bad_mode (void)
  99 {
 100         panic ("Resetting CPU ...\n");
 101         reset_cpu (0);
 102 }
 103
 104 void show_regs (struct pt_regs *regs)
 105 {
 106         unsigned long flags;
 107         const char *processor_modes[] = {
 108         "USER_26",      "FIQ_26",       "IRQ_26",       "SVC_26",
 109         "UK4_26",       "UK5_26",       "UK6_26",       "UK7_26",
 110         "UK8_26",       "UK9_26",       "UK10_26",      "UK11_26",
 111         "UK12_26",      "UK13_26",      "UK14_26",      "UK15_26",
 112         "USER_32",      "FIQ_32",       "IRQ_32",       "SVC_32",
 113         "UK4_32",       "UK5_32",       "UK6_32",       "ABT_32",
 114         "UK8_32",       "UK9_32",       "UK10_32",      "UND_32",
 115         "UK12_32",      "UK13_32",      "UK14_32",      "SYS_32",
 116         };
 117
 118         flags = condition_codes (regs);
 119
 120         printf ("pc : [<%08lx>]    lr : [<%08lx>]\n"
 121                 "sp : %08lx  ip : %08lx  fp : %08lx\n",
 122                 instruction_pointer (regs),
 123                 regs->ARM_lr, regs->ARM_sp, regs->ARM_ip, regs->ARM_fp);
 124         printf ("r10: %08lx  r9 : %08lx  r8 : %08lx\n",
 125                 regs->ARM_r10, regs->ARM_r9, regs->ARM_r8);
 126         printf ("r7 : %08lx  r6 : %08lx  r5 : %08lx  r4 : %08lx\n",
 127                 regs->ARM_r7, regs->ARM_r6, regs->ARM_r5, regs->ARM_r4);
 128         printf ("r3 : %08lx  r2 : %08lx  r1 : %08lx  r0 : %08lx\n",
 129                 regs->ARM_r3, regs->ARM_r2, regs->ARM_r1, regs->ARM_r0);
 130         printf ("Flags: %c%c%c%c",
 131                 flags & CC_N_BIT ? 'N' : 'n',
 132                 flags & CC_Z_BIT ? 'Z' : 'z',
 133                 flags & CC_C_BIT ? 'C' : 'c', flags & CC_V_BIT ? 'V' : 'v');
 134         printf ("  IRQs %s  FIQs %s  Mode %s%s\n",
 135                 interrupts_enabled (regs) ? "on" : "off",
 136                 fast_interrupts_enabled (regs) ? "on" : "off",
 137                 processor_modes[processor_mode (regs)],
 138                 thumb_mode (regs) ? " (T)" : "");
 139 }
 140
 141 void do_undefined_instruction (struct pt_regs *pt_regs)
 142 {
 143         printf ("undefined instruction\n");
 144         show_regs (pt_regs);
 145         bad_mode ();
 146 }
 147
 148 void do_software_interrupt (struct pt_regs *pt_regs)
 149 {
 150         printf ("software interrupt\n");
 151         show_regs (pt_regs);
 152         bad_mode ();
 153 }
 154
 155 void do_prefetch_abort (struct pt_regs *pt_regs)
 156 {
 157         printf ("prefetch abort\n");
 158         show_regs (pt_regs);
 159         bad_mode ();
 160 }
 161
 162 void do_data_abort (struct pt_regs *pt_regs)
 163 {
 164         printf ("data abort\n");
 165         show_regs (pt_regs);
 166         bad_mode ();
 167 }
 168
 169 void do_not_used (struct pt_regs *pt_regs)
 170 {
 171         printf ("not used\n");
 172         show_regs (pt_regs);
 173         bad_mode ();
 174 }
 175
 176 void do_fiq (struct pt_regs *pt_regs)
 177 {
 178         printf ("fast interrupt request\n");
 179         show_regs (pt_regs);
 180         bad_mode ();
 181 }
 182
 183 void do_irq (struct pt_regs *pt_regs)
 184 {
 185         printf ("interrupt request\n");
 186         show_regs (pt_regs);
 187         bad_mode ();
 188 }
 189
 190 static ulong timestamp;
 191 static ulong lastdec;
 192
 193 /* nothing really to do with interrupts, just starts up a counter. */
 194 int interrupt_init (void)
 195 {
 196 #ifdef CONFIG_OMAP
 197         int32_t val;
 198
 199         /* Start the decrementer ticking down from 0xffffffff */
 200         *((int32_t *) (CFG_TIMERBASE + LOAD_TIM)) = TIMER_LOAD_VAL;
 201         val = MPUTIM_ST | MPUTIM_AR | MPUTIM_CLOCK_ENABLE | (CFG_PVT << MPUTIM_PTV_BIT);
 202         *((int32_t *) (CFG_TIMERBASE + CNTL_TIMER)) = val;
 203 #endif  /* CONFIG_OMAP */
 204 #ifdef CONFIG_INTEGRATOR
 205         /* Load timer with initial value */
 206         *(volatile ulong *)(CFG_TIMERBASE + 0) = TIMER_LOAD_VAL;
 207         /* Set timer to be enabled, free-running, no interrupts, 256 divider */
 208         *(volatile ulong *)(CFG_TIMERBASE + 8) = 0x8C;
 209 #endif  /* CONFIG_INTEGRATOR */
 210 #ifdef CONFIG_VERSATILE
 211         *(volatile ulong *)(CFG_TIMERBASE + 0) = CFG_TIMER_RELOAD;      /* TimerLoad */
 212         *(volatile ulong *)(CFG_TIMERBASE + 4) = CFG_TIMER_RELOAD;      /* TimerValue */
 213         *(volatile ulong *)(CFG_TIMERBASE + 8) = 0x8C;
 214         /* *(volatile ulong *)(CFG_TIMERBASE + 8) = CFG_TIMER_CTRL | 0x40;  Periodic */
 215 #endif  /* CONFIG_VERSATILE */
 216
 217         /* init the timestamp and lastdec value */
 218         reset_timer_masked();
 219
 220         return (0);
 221 }
 222
 223 /*
 224  * timer without interrupts
 225  */
 226
 227 void reset_timer (void)
 228 {
 229         reset_timer_masked ();
 230 }
 231
 232 ulong get_timer (ulong base)
 233 {
 234         return get_timer_masked () - base;
 235 }
 236
 237 void set_timer (ulong t)
 238 {
 239         timestamp = t;
 240 }
 241
 242 /* delay x useconds AND perserve advance timstamp value */
 243 void udelay (unsigned long usec)
 244 {
 245         ulong tmo, tmp;
 246
 247         if(usec >= 1000){               /* if "big" number, spread normalization to seconds */
 248                 tmo = usec / 1000;      /* start to normalize for usec to ticks per sec */
 249                 tmo *= CFG_HZ;          /* find number of "ticks" to wait to achieve target */
 250                 tmo /= 1000;            /* finish normalize. */
 251         }else{                          /* else small number, don't kill it prior to HZ multiply */
 252                 tmo = usec * CFG_HZ;
 253                 tmo /= (1000*1000);
 254         }
 255
 256         tmp = get_timer (0);            /* get current timestamp */
 257         if( (tmo + tmp + 1) < tmp )     /* if setting this fordward will roll time stamp */
 258                 reset_timer_masked ();  /* reset "advancing" timestamp to 0, set lastdec value */
 259         else
 260                 tmo += tmp;             /* else, set advancing stamp wake up time */
 261
 262         while (get_timer_masked () < tmo)/* loop till event */
 263                 /*NOP*/;
 264 }
 265
 266 void reset_timer_masked (void)
 267 {
 268         /* reset time */
 269         lastdec = READ_TIMER;  /* capure current decrementer value time */
 270         timestamp = 0;         /* start "advancing" time stamp from 0 */
 271 }
 272
 273 ulong get_timer_masked (void)
 274 {
 275         ulong now = READ_TIMER;         /* current tick value */
 276
 277         if (lastdec >= now) {           /* normal mode (non roll) */
 278                 /* normal mode */
 279                 timestamp += lastdec - now; /* move stamp fordward with absoulte diff ticks */
 280         } else {                        /* we have overflow of the count down timer */
 281                 /* nts = ts + ld + (TLV - now)
 282                  * ts=old stamp, ld=time that passed before passing through -1
 283                  * (TLV-now) amount of time after passing though -1
 284                  * nts = new "advancing time stamp"...it could also roll and cause problems.
 285                  */
 286                 timestamp += lastdec + TIMER_LOAD_VAL - now;
 287         }
 288         lastdec = now;
 289
 290         return timestamp;
 291 }
 292
 293 /* waits specified delay value and resets timestamp */
 294 void udelay_masked (unsigned long usec)
 295 {
 296         ulong tmo, tmp;
 297
 298         if(usec >= 1000){               /* if "big" number, spread normalization to seconds */
 299                 tmo = usec / 1000;      /* start to normalize for usec to ticks per sec */
 300                 tmo *= CFG_HZ;          /* find number of "ticks" to wait to achieve target */
 301                 tmo /= 1000;            /* finish normalize. */
 302         }else{                          /* else small number, don't kill it prior to HZ multiply */
 303                 tmo = usec * CFG_HZ;
 304                 tmo /= (1000*1000);
 305         }
 306
 307         reset_timer_masked ();  /* set "advancing" timestamp to 0, set lastdec vaule */
 308
 309         while (get_timer_masked () < tmo) /* wait for time stamp to overtake tick number.*/
 310                 /*NOP*/;
 311 }
 312
 313 /*
 314  * This function is derived from PowerPC code (read timebase as long long).
 315  * On ARM it just returns the timer value.
 316  */
 317 unsigned long long get_ticks(void)
 318 {
 319         return get_timer(0);
 320 }
 321
 322 /*
 323  * This function is derived from PowerPC code (timebase clock frequency).
 324  * On ARM it returns the number of timer ticks per second.
 325  */
 326 ulong get_tbclk (void)
 327 {
 328         ulong tbclk;
 329
 330         tbclk = CFG_HZ;
 331         return tbclk;
 332 }