cpu/arm926ejs/start.S

   1 /*
   2  *  armboot - Startup Code for ARM926EJS CPU-core
   3  *
   4  *  Copyright (c) 2003  Texas Instruments
   5  *
   6  *  ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------
   7  *
   8  *  Copyright (c) 2001  Marius Gröger <mag@sysgo.de>
   9  *  Copyright (c) 2002  Alex Züpke <azu@sysgo.de>
  10  *  Copyright (c) 2002  Gary Jennejohn <garyj@denx.de>
  11  *  Copyright (c) 2003  Richard Woodruff <r-woodruff2@ti.com>
  12  *  Copyright (c) 2003  Kshitij <kshitij@ti.com>
  13  *
  14  * See file CREDITS for list of people who contributed to this
  15  * project.
  16  *
  17  * This program is free software; you can redistribute it and/or
  18  * modify it under the terms of the GNU General Public License as
  19  * published by the Free Software Foundation; either version 2 of
  20  * the License, or (at your option) any later version.
  21  *
  22  * This program is distributed in the hope that it will be useful,
  23  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  25  * GNU General Public License for more details.
  26  *
  27  * You should have received a copy of the GNU General Public License
  28  * along with this program; if not, write to the Free Software
  29  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  30  * MA 02111-1307 USA
  31  */
  32
  33
  34 #include <config.h>
  35 #include <common.h>
  36 #include <version.h>
  37
  38 #if defined(CONFIG_OMAP1610)
  39 #include <./configs/omap1510.h>
  40 #elif defined(CONFIG_OMAP730)
  41 #include <./configs/omap730.h>
  42 #endif
  43
  44 /*
  45  *************************************************************************
  46  *
  47  * Jump vector table as in table 3.1 in [1]
  48  *
  49  *************************************************************************
  50  */
  51
  52
  53 .globl _start
  54 _start:
  55         b       reset
  56         ldr     pc, _undefined_instruction
  57         ldr     pc, _software_interrupt
  58         ldr     pc, _prefetch_abort
  59         ldr     pc, _data_abort
  60         ldr     pc, _not_used
  61         ldr     pc, _irq
  62         ldr     pc, _fiq
  63
  64 _undefined_instruction:
  65         .word undefined_instruction
  66 _software_interrupt:
  67         .word software_interrupt
  68 _prefetch_abort:
  69         .word prefetch_abort
  70 _data_abort:
  71         .word data_abort
  72 _not_used:
  73         .word not_used
  74 _irq:
  75         .word irq
  76 _fiq:
  77         .word fiq
  78
  79         .balignl 16,0xdeadbeef
  80
  81
  82 /*
  83  *************************************************************************
  84  *
  85  * Startup Code (reset vector)
  86  *
  87  * do important init only if we don't start from memory!
  88  * setup Memory and board specific bits prior to relocation.
  89  * relocate armboot to ram
  90  * setup stack
  91  *
  92  *************************************************************************
  93  */
  94
  95 _TEXT_BASE:
  96         .word   TEXT_BASE
  97
  98 .globl _armboot_start
  99 _armboot_start:
 100         .word _start
 101
 102 /*
 103  * These are defined in the board-specific linker script.
 104  */
 105 .globl _bss_start
 106 _bss_start:
 107         .word __bss_start
 108
 109 .globl _bss_end
 110 _bss_end:
 111         .word _end
 112
 113 #ifdef CONFIG_USE_IRQ
 114 /* IRQ stack memory (calculated at run-time) */
 115 .globl IRQ_STACK_START
 116 IRQ_STACK_START:
 117         .word   0x0badc0de
 118
 119 /* IRQ stack memory (calculated at run-time) */
 120 .globl FIQ_STACK_START
 121 FIQ_STACK_START:
 122         .word 0x0badc0de
 123 #endif
 124
 125
 126 /*
 127  * the actual reset code
 128  */
 129
 130 reset:
 131         /*
 132          * set the cpu to SVC32 mode
 133          */
 134         mrs     r0,cpsr
 135         bic     r0,r0,#0x1f
 136         orr     r0,r0,#0xd3
 137         msr     cpsr,r0
 138
 139         /*
 140          * we do sys-critical inits only at reboot,
 141          * not when booting from ram!
 142          */
 143 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
 144         bl      cpu_init_crit
 145 #endif
 146
 147 #ifndef CONFIG_SKIP_RELOCATE_UBOOT
 148 relocate:                               /* relocate U-Boot to RAM           */
 149         adr     r0, _start              /* r0 <- current position of code   */
 150         ldr     r1, _TEXT_BASE          /* test if we run from flash or RAM */
 151         cmp     r0, r1                  /* don't reloc during debug         */
 152         beq     stack_setup
 153
 154         ldr     r2, _armboot_start
 155         ldr     r3, _bss_start
 156         sub     r2, r3, r2              /* r2 <- size of armboot            */
 157         add     r2, r0, r2              /* r2 <- source end address         */
 158
 159 copy_loop:
 160         ldmia   r0!, {r3-r10}           /* copy from source address [r0]    */
 161         stmia   r1!, {r3-r10}           /* copy to   target address [r1]    */
 162         cmp     r0, r2                  /* until source end addreee [r2]    */
 163         ble     copy_loop
 164 #endif  /* CONFIG_SKIP_RELOCATE_UBOOT */
 165
 166         /* Set up the stack                                                 */
 167 stack_setup:
 168         ldr     r0, _TEXT_BASE          /* upper 128 KiB: relocated uboot   */
 169         sub     r0, r0, #CONFIG_SYS_MALLOC_LEN  /* malloc area                      */
 170         sub     r0, r0, #CONFIG_SYS_GBL_DATA_SIZE /* bdinfo                        */
 171 #ifdef CONFIG_USE_IRQ
 172         sub     r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
 173 #endif
 174         sub     sp, r0, #12             /* leave 3 words for abort-stack    */
 175
 176 clear_bss:
 177         ldr     r0, _bss_start          /* find start of bss segment        */
 178         ldr     r1, _bss_end            /* stop here                        */
 179         mov     r2, #0x00000000         /* clear                            */
 180
 181 clbss_l:str     r2, [r0]                /* clear loop...                    */
 182         add     r0, r0, #4
 183         cmp     r0, r1
 184         ble     clbss_l
 185
 186         bl coloured_LED_init
 187         bl red_LED_on
 188
 189         ldr     pc, _start_armboot
 190
 191 _start_armboot:
 192         .word start_armboot
 193
 194
 195 /*
 196  *************************************************************************
 197  *
 198  * CPU_init_critical registers
 199  *
 200  * setup important registers
 201  * setup memory timing
 202  *
 203  *************************************************************************
 204  */
 205 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
 206 cpu_init_crit:
 207         /*
 208          * flush v4 I/D caches
 209          */
 210         mov     r0, #0
 211         mcr     p15, 0, r0, c7, c7, 0   /* flush v3/v4 cache */
 212         mcr     p15, 0, r0, c8, c7, 0   /* flush v4 TLB */
 213
 214         /*
 215          * disable MMU stuff and caches
 216          */
 217         mrc     p15, 0, r0, c1, c0, 0
 218         bic     r0, r0, #0x00002300     /* clear bits 13, 9:8 (--V- --RS) */
 219         bic     r0, r0, #0x00000087     /* clear bits 7, 2:0 (B--- -CAM) */
 220         orr     r0, r0, #0x00000002     /* set bit 2 (A) Align */
 221         orr     r0, r0, #0x00001000     /* set bit 12 (I) I-Cache */
 222         mcr     p15, 0, r0, c1, c0, 0
 223
 224         /*
 225          * Go setup Memory and board specific bits prior to relocation.
 226          */
 227         mov     ip, lr          /* perserve link reg across call */
 228         bl      lowlevel_init   /* go setup pll,mux,memory */
 229         mov     lr, ip          /* restore link */
 230         mov     pc, lr          /* back to my caller */
 231 #endif /* CONFIG_SKIP_LOWLEVEL_INIT */
 232
 233 /*
 234  *************************************************************************
 235  *
 236  * Interrupt handling
 237  *
 238  *************************************************************************
 239  */
 240
 241 @
 242 @ IRQ stack frame.
 243 @
 244 #define S_FRAME_SIZE    72
 245
 246 #define S_OLD_R0        68
 247 #define S_PSR           64
 248 #define S_PC            60
 249 #define S_LR            56
 250 #define S_SP            52
 251
 252 #define S_IP            48
 253 #define S_FP            44
 254 #define S_R10           40
 255 #define S_R9            36
 256 #define S_R8            32
 257 #define S_R7            28
 258 #define S_R6            24
 259 #define S_R5            20
 260 #define S_R4            16
 261 #define S_R3            12
 262 #define S_R2            8
 263 #define S_R1            4
 264 #define S_R0            0
 265
 266 #define MODE_SVC 0x13
 267 #define I_BIT    0x80
 268
 269 /*
 270  * use bad_save_user_regs for abort/prefetch/undef/swi ...
 271  * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
 272  */
 273
 274         .macro  bad_save_user_regs
 275         @ carve out a frame on current user stack
 276         sub     sp, sp, #S_FRAME_SIZE
 277         stmia   sp, {r0 - r12}  @ Save user registers (now in svc mode) r0-r12
 278
 279         ldr     r2, _armboot_start
 280         sub     r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
 281         sub     r2, r2, #(CONFIG_SYS_GBL_DATA_SIZE+8)  @ set base 2 words into abort stack
 282         @ get values for "aborted" pc and cpsr (into parm regs)
 283         ldmia   r2, {r2 - r3}
 284         add     r0, sp, #S_FRAME_SIZE           @ grab pointer to old stack
 285         add     r5, sp, #S_SP
 286         mov     r1, lr
 287         stmia   r5, {r0 - r3}   @ save sp_SVC, lr_SVC, pc, cpsr
 288         mov     r0, sp          @ save current stack into r0 (param register)
 289         .endm
 290
 291         .macro  irq_save_user_regs
 292         sub     sp, sp, #S_FRAME_SIZE
 293         stmia   sp, {r0 - r12}                  @ Calling r0-r12
 294         @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
 295         add     r8, sp, #S_PC
 296         stmdb   r8, {sp, lr}^           @ Calling SP, LR
 297         str     lr, [r8, #0]            @ Save calling PC
 298         mrs     r6, spsr
 299         str     r6, [r8, #4]            @ Save CPSR
 300         str     r0, [r8, #8]            @ Save OLD_R0
 301         mov     r0, sp
 302         .endm
 303
 304         .macro  irq_restore_user_regs
 305         ldmia   sp, {r0 - lr}^                  @ Calling r0 - lr
 306         mov     r0, r0
 307         ldr     lr, [sp, #S_PC]                 @ Get PC
 308         add     sp, sp, #S_FRAME_SIZE
 309         subs    pc, lr, #4              @ return & move spsr_svc into cpsr
 310         .endm
 311
 312         .macro get_bad_stack
 313         ldr     r13, _armboot_start             @ setup our mode stack
 314         sub     r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
 315         sub     r13, r13, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
 316
 317         str     lr, [r13]       @ save caller lr in position 0 of saved stack
 318         mrs     lr, spsr        @ get the spsr
 319         str     lr, [r13, #4]   @ save spsr in position 1 of saved stack
 320         mov     r13, #MODE_SVC  @ prepare SVC-Mode
 321         @ msr   spsr_c, r13
 322         msr     spsr, r13       @ switch modes, make sure moves will execute
 323         mov     lr, pc          @ capture return pc
 324         movs    pc, lr          @ jump to next instruction & switch modes.
 325         .endm
 326
 327         .macro get_irq_stack                    @ setup IRQ stack
 328         ldr     sp, IRQ_STACK_START
 329         .endm
 330
 331         .macro get_fiq_stack                    @ setup FIQ stack
 332         ldr     sp, FIQ_STACK_START
 333         .endm
 334
 335 /*
 336  * exception handlers
 337  */
 338         .align  5
 339 undefined_instruction:
 340         get_bad_stack
 341         bad_save_user_regs
 342         bl      do_undefined_instruction
 343
 344         .align  5
 345 software_interrupt:
 346         get_bad_stack
 347         bad_save_user_regs
 348         bl      do_software_interrupt
 349
 350         .align  5
 351 prefetch_abort:
 352         get_bad_stack
 353         bad_save_user_regs
 354         bl      do_prefetch_abort
 355
 356         .align  5
 357 data_abort:
 358         get_bad_stack
 359         bad_save_user_regs
 360         bl      do_data_abort
 361
 362         .align  5
 363 not_used:
 364         get_bad_stack
 365         bad_save_user_regs
 366         bl      do_not_used
 367
 368 #ifdef CONFIG_USE_IRQ
 369
 370         .align  5
 371 irq:
 372         get_irq_stack
 373         irq_save_user_regs
 374         bl      do_irq
 375         irq_restore_user_regs
 376
 377         .align  5
 378 fiq:
 379         get_fiq_stack
 380         /* someone ought to write a more effiction fiq_save_user_regs */
 381         irq_save_user_regs
 382         bl      do_fiq
 383         irq_restore_user_regs
 384
 385 #else
 386
 387         .align  5
 388 irq:
 389         get_bad_stack
 390         bad_save_user_regs
 391         bl      do_irq
 392
 393         .align  5
 394 fiq:
 395         get_bad_stack
 396         bad_save_user_regs
 397         bl      do_fiq
 398
 399 #endif