cpu/arm_cortexa8/omap3/sys_info.c

   1 /*
   2  * (C) Copyright 2008
   3  * Texas Instruments, <www.ti.com>
   4  *
   5  * Author :
   6  *      Manikandan Pillai <mani.pillai@ti.com>
   7  *
   8  * Derived from Beagle Board and 3430 SDP code by
   9  *      Richard Woodruff <r-woodruff2@ti.com>
  10  *      Syed Mohammed Khasim <khasim@ti.com>
  11  *
  12  * This program is free software; you can redistribute it and/or
  13  * modify it under the terms of the GNU General Public License as
  14  * published by the Free Software Foundation; either version 2 of
  15  * the License, or (at your option) any later version.
  16  *
  17  * This program is distributed in the hope that it will be useful,
  18  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19  * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE.  See the
  20  * GNU General Public License for more details.
  21  *
  22  * You should have received a copy of the GNU General Public License
  23  * along with this program; if not, write to the Free Software
  24  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  25  * MA 02111-1307 USA
  26  */
  27
  28 #include <common.h>
  29 #include <asm/io.h>
  30 #include <asm/arch/mem.h>       /* get mem tables */
  31 #include <asm/arch/sys_proto.h>
  32 #include <i2c.h>
  33
  34 extern omap3_sysinfo sysinfo;
  35 static gpmc_csx_t *gpmc_cs_base = (gpmc_csx_t *)GPMC_CONFIG_CS0_BASE;
  36 static sdrc_t *sdrc_base = (sdrc_t *)OMAP34XX_SDRC_BASE;
  37 static ctrl_t *ctrl_base = (ctrl_t *)OMAP34XX_CTRL_BASE;
  38
  39 /*****************************************************************
  40  * dieid_num_r(void) - read and set die ID
  41  *****************************************************************/
  42 void dieid_num_r(void)
  43 {
  44         ctrl_id_t *id_base = (ctrl_id_t *)OMAP34XX_ID_L4_IO_BASE;
  45         char *uid_s, die_id[34];
  46         u32 id[4];
  47
  48         memset(die_id, 0, sizeof(die_id));
  49
  50         uid_s = getenv("dieid#");
  51
  52         if (uid_s == NULL) {
  53                 id[3] = readl(&id_base->die_id_0);
  54                 id[2] = readl(&id_base->die_id_1);
  55                 id[1] = readl(&id_base->die_id_2);
  56                 id[0] = readl(&id_base->die_id_3);
  57                 sprintf(die_id, "%08x%08x%08x%08x", id[0], id[1], id[2], id[3]);
  58                 setenv("dieid#", die_id);
  59                 uid_s = die_id;
  60         }
  61
  62         printf("Die ID #%s\n", uid_s);
  63 }
  64
  65 /******************************************
  66  * get_cpu_type(void) - extract cpu info
  67  ******************************************/
  68 u32 get_cpu_type(void)
  69 {
  70         return readl(&ctrl_base->ctrl_omap_stat);
  71 }
  72
  73 /******************************************
  74  * get_cpu_rev(void) - extract version info
  75  ******************************************/
  76 u32 get_cpu_rev(void)
  77 {
  78         u32 cpuid = 0;
  79
  80         /*
  81          * On ES1.0 the IDCODE register is not exposed on L4
  82          * so using CPU ID to differentiate
  83          * between ES2.0 and ES1.0.
  84          */
  85         __asm__ __volatile__("mrc p15, 0, %0, c0, c0, 0":"=r"(cpuid));
  86         if ((cpuid & 0xf) == 0x0)
  87                 return CPU_3430_ES1;
  88         else
  89                 return CPU_3430_ES2;
  90
  91 }
  92
  93 /****************************************************
  94  * is_mem_sdr() - return 1 if mem type in use is SDR
  95  ****************************************************/
  96 u32 is_mem_sdr(void)
  97 {
  98         if (readl(&sdrc_base->cs[CS0].mr) == SDP_SDRC_MR_0_SDR)
  99                 return 1;
 100         return 0;
 101 }
 102
 103 /***********************************************************************
 104  * get_cs0_size() - get size of chip select 0/1
 105  ************************************************************************/
 106 u32 get_sdr_cs_size(u32 cs)
 107 {
 108         u32 size;
 109
 110         /* get ram size field */
 111         size = readl(&sdrc_base->cs[cs].mcfg) >> 8;
 112         size &= 0x3FF;          /* remove unwanted bits */
 113         size *= SZ_2M;          /* find size in MB */
 114         return size;
 115 }
 116
 117 /***********************************************************************
 118  * get_sdr_cs_offset() - get offset of cs from cs0 start
 119  ************************************************************************/
 120 u32 get_sdr_cs_offset(u32 cs)
 121 {
 122         u32 offset;
 123
 124         if (!cs)
 125                 return 0;
 126
 127         offset = readl(&sdrc_base->cs_cfg);
 128         offset = (offset & 15) << 27 | (offset & 0x30) >> 17;
 129
 130         return offset;
 131 }
 132
 133 /***********************************************************************
 134  * get_board_type() - get board type based on current production stats.
 135  *  - NOTE-1-: 2 I2C EEPROMs will someday be populated with proper info.
 136  *    when they are available we can get info from there.  This should
 137  *    be correct of all known boards up until today.
 138  *  - NOTE-2- EEPROMs are populated but they are updated very slowly.  To
 139  *    avoid waiting on them we will use ES version of the chip to get info.
 140  *    A later version of the FPGA migth solve their speed issue.
 141  ************************************************************************/
 142 u32 get_board_type(void)
 143 {
 144         if (get_cpu_rev() == CPU_3430_ES2)
 145                 return sysinfo.board_type_v2;
 146         else
 147                 return sysinfo.board_type_v1;
 148 }
 149
 150 /***************************************************************************
 151  *  get_gpmc0_base() - Return current address hardware will be
 152  *     fetching from. The below effectively gives what is correct, its a bit
 153  *   mis-leading compared to the TRM.  For the most general case the mask
 154  *   needs to be also taken into account this does work in practice.
 155  *   - for u-boot we currently map:
 156  *       -- 0 to nothing,
 157  *       -- 4 to flash
 158  *       -- 8 to enent
 159  *       -- c to wifi
 160  ****************************************************************************/
 161 u32 get_gpmc0_base(void)
 162 {
 163         u32 b;
 164
 165         b = readl(&gpmc_cs_base->config7);
 166         b &= 0x1F;              /* keep base [5:0] */
 167         b = b << 24;            /* ret 0x0b000000 */
 168         return b;
 169 }
 170
 171 /*******************************************************************
 172  * get_gpmc0_width() - See if bus is in x8 or x16 (mainly for nand)
 173  *******************************************************************/
 174 u32 get_gpmc0_width(void)
 175 {
 176         return WIDTH_16BIT;
 177 }
 178
 179 /*************************************************************************
 180  * get_board_rev() - setup to pass kernel board revision information
 181  * returns:(bit[0-3] sub version, higher bit[7-4] is higher version)
 182  *************************************************************************/
 183 u32 get_board_rev(void)
 184 {
 185         return 0x20;
 186 }
 187
 188 /********************************************************
 189  *  get_base(); get upper addr of current execution
 190  *******************************************************/
 191 u32 get_base(void)
 192 {
 193         u32 val;
 194
 195         __asm__ __volatile__("mov %0, pc \n":"=r"(val)::"memory");
 196         val &= 0xF0000000;
 197         val >>= 28;
 198         return val;
 199 }
 200
 201 /********************************************************
 202  *  is_running_in_flash() - tell if currently running in
 203  *  FLASH.
 204  *******************************************************/
 205 u32 is_running_in_flash(void)
 206 {
 207         if (get_base() < 4)
 208                 return 1;       /* in FLASH */
 209
 210         return 0;               /* running in SRAM or SDRAM */
 211 }
 212
 213 /********************************************************
 214  *  is_running_in_sram() - tell if currently running in
 215  *  SRAM.
 216  *******************************************************/
 217 u32 is_running_in_sram(void)
 218 {
 219         if (get_base() == 4)
 220                 return 1;       /* in SRAM */
 221
 222         return 0;               /* running in FLASH or SDRAM */
 223 }
 224
 225 /********************************************************
 226  *  is_running_in_sdram() - tell if currently running in
 227  *  SDRAM.
 228  *******************************************************/
 229 u32 is_running_in_sdram(void)
 230 {
 231         if (get_base() > 4)
 232                 return 1;       /* in SDRAM */
 233
 234         return 0;               /* running in SRAM or FLASH */
 235 }
 236
 237 /***************************************************************
 238  *  get_boot_type() - Is this an XIP type device or a stream one
 239  *  bits 4-0 specify type. Bit 5 says mem/perif
 240  ***************************************************************/
 241 u32 get_boot_type(void)
 242 {
 243         return (readl(&ctrl_base->status) & SYSBOOT_MASK);
 244 }
 245
 246 /*************************************************************
 247  *  get_device_type(): tell if GP/HS/EMU/TST
 248  *************************************************************/
 249 u32 get_device_type(void)
 250 {
 251         return ((readl(&ctrl_base->status) & (DEVICE_MASK)) >> 8);
 252 }
 253
 254 #ifdef CONFIG_DISPLAY_CPUINFO
 255 /**
 256  * Print CPU information
 257  */
 258 int print_cpuinfo (void)
 259 {
 260         char *cpu_s, *sec_s;
 261
 262         switch (get_cpu_type()) {
 263         case OMAP3503:
 264                 cpu_s = "3503";
 265                 break;
 266         case OMAP3515:
 267                 cpu_s = "3515";
 268                 break;
 269         case OMAP3525:
 270                 cpu_s = "3525";
 271                 break;
 272         case OMAP3530:
 273                 cpu_s = "3530";
 274                 break;
 275         default:
 276                 cpu_s = "35XX";
 277                 break;
 278         }
 279
 280         switch (get_device_type()) {
 281         case TST_DEVICE:
 282                 sec_s = "TST";
 283                 break;
 284         case EMU_DEVICE:
 285                 sec_s = "EMU";
 286                 break;
 287         case HS_DEVICE:
 288                 sec_s = "HS";
 289                 break;
 290         case GP_DEVICE:
 291                 sec_s = "GP";
 292                 break;
 293         default:
 294                 sec_s = "?";
 295         }
 296
 297         printf("OMAP%s-%s rev %d, CPU-OPP2 L3-165MHz\n", cpu_s,
 298                sec_s, get_cpu_rev());
 299
 300         return 0;
 301 }
 302 #endif  /* CONFIG_DISPLAY_CPUINFO */