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1 /*
2 * (C) Copyright 2003
3 * Texas Instruments <www.ti.com>
4 *
5 * (C) Copyright 2002
6 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
7 * Marius Groeger <mgroeger@sysgo.de>
8 *
9 * (C) Copyright 2002
10 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
11 * Alex Zuepke <azu@sysgo.de>
12 *
13 * (C) Copyright 2002-2004
14 * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
15 *
16 * (C) Copyright 2004
17 * Philippe Robin, ARM Ltd. <philippe.robin@arm.com>
18 *
19 * See file CREDITS for list of people who contributed to this
20 * project.
21 *
22 * This program is free software; you can redistribute it and/or
23 * modify it under the terms of the GNU General Public License as
24 * published by the Free Software Foundation; either version 2 of
25 * the License, or (at your option) any later version.
26 *
27 * This program is distributed in the hope that it will be useful,
28 * but WITHOUT ANY WARRANTY; without even the implied warranty of
29 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
30 * GNU General Public License for more details.
31 *
32 * You should have received a copy of the GNU General Public License
33 * along with this program; if not, write to the Free Software
34 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
35 * MA 02111-1307 USA
36 */
37
38 #include <common.h>
39 #include <asm/proc-armv/ptrace.h>
40
41 #ifndef CONFIG_INTEGRATOR
42 /* Only to be used for integrator/AP or /CP */
43 /* Allows U-Boot to be used with any ARM supplied core module (CM),
44 * provided the ARM boot monitor, or similar software,
45 * runs first to set up the platform e.g. map writeable memory to 0x00000000
46 * - see Integrator User Guides
47 * Versatile has a supported cpu - arm926ejs
48 * Some integrator CMs cpus are supported
49 * CM926EJ-S, CM946E-S
50 * For platforms with supported cpus U-Boot can be used as the sole boot
51 * monitor/loader - it will configure the platform itself
52 * Also U-Boot may be faster/smaller in those cases since specific
53 * qualities of the cpu and/or CM can be used e.g i and/or d caches etc.
54 */
55 #endif
56 extern void reset_cpu(ulong addr);
57
58 #ifdef CONFIG_USE_IRQ
59 /* enable IRQ interrupts */
60 void enable_interrupts (void)
61 {
62 unsigned long temp;
63 __asm__ __volatile__("mrs %0, cpsr\n"
64 "bic %0, %0, #0x80\n"
65 "msr cpsr_c, %0"
66 : "=r" (temp)
67 :
68 : "memory");
69 }
70
71
72 /*
73 * disable IRQ/FIQ interrupts
74 * returns true if interrupts had been enabled before we disabled them
75 */
76 int disable_interrupts (void)
77 {
78 unsigned long old,temp;
79 __asm__ __volatile__("mrs %0, cpsr\n"
80 "orr %1, %0, #0xc0\n"
81 "msr cpsr_c, %1"
82 : "=r" (old), "=r" (temp)
83 :
84 : "memory");
85 return (old & 0x80) == 0;
86 }
87 #else
88 void enable_interrupts (void)
89 {
90 return;
91 }
92 int disable_interrupts (void)
93 {
94 return 0;
95 }
96 #endif
97
98
99 void bad_mode (void)
100 {
101 panic ("Resetting CPU ...\n");
102 reset_cpu (0);
103 }
104
105 void show_regs (struct pt_regs *regs)
106 {
107 unsigned long flags;
108 const char *processor_modes[] = {
109 "USER_26", "FIQ_26", "IRQ_26", "SVC_26",
110 "UK4_26", "UK5_26", "UK6_26", "UK7_26",
111 "UK8_26", "UK9_26", "UK10_26", "UK11_26",
112 "UK12_26", "UK13_26", "UK14_26", "UK15_26",
113 "USER_32", "FIQ_32", "IRQ_32", "SVC_32",
114 "UK4_32", "UK5_32", "UK6_32", "ABT_32",
115 "UK8_32", "UK9_32", "UK10_32", "UND_32",
116 "UK12_32", "UK13_32", "UK14_32", "SYS_32",
117 };
118
119 flags = condition_codes (regs);
120
121 printf ("pc : [<%08lx>] lr : [<%08lx>]\n"
122 "sp : %08lx ip : %08lx fp : %08lx\n",
123 instruction_pointer (regs),
124 regs->ARM_lr, regs->ARM_sp, regs->ARM_ip, regs->ARM_fp);
125 printf ("r10: %08lx r9 : %08lx r8 : %08lx\n",
126 regs->ARM_r10, regs->ARM_r9, regs->ARM_r8);
127 printf ("r7 : %08lx r6 : %08lx r5 : %08lx r4 : %08lx\n",
128 regs->ARM_r7, regs->ARM_r6, regs->ARM_r5, regs->ARM_r4);
129 printf ("r3 : %08lx r2 : %08lx r1 : %08lx r0 : %08lx\n",
130 regs->ARM_r3, regs->ARM_r2, regs->ARM_r1, regs->ARM_r0);
131 printf ("Flags: %c%c%c%c",
132 flags & CC_N_BIT ? 'N' : 'n',
133 flags & CC_Z_BIT ? 'Z' : 'z',
134 flags & CC_C_BIT ? 'C' : 'c', flags & CC_V_BIT ? 'V' : 'v');
135 printf (" IRQs %s FIQs %s Mode %s%s\n",
136 interrupts_enabled (regs) ? "on" : "off",
137 fast_interrupts_enabled (regs) ? "on" : "off",
138 processor_modes[processor_mode (regs)],
139 thumb_mode (regs) ? " (T)" : "");
140 }
141
142 void do_undefined_instruction (struct pt_regs *pt_regs)
143 {
144 printf ("undefined instruction\n");
145 show_regs (pt_regs);
146 bad_mode ();
147 }
148
149 void do_software_interrupt (struct pt_regs *pt_regs)
150 {
151 printf ("software interrupt\n");
152 show_regs (pt_regs);
153 bad_mode ();
154 }
155
156 void do_prefetch_abort (struct pt_regs *pt_regs)
157 {
158 printf ("prefetch abort\n");
159 show_regs (pt_regs);
160 bad_mode ();
161 }
162
163 void do_data_abort (struct pt_regs *pt_regs)
164 {
165 printf ("data abort\n");
166 show_regs (pt_regs);
167 bad_mode ();
168 }
169
170 void do_not_used (struct pt_regs *pt_regs)
171 {
172 printf ("not used\n");
173 show_regs (pt_regs);
174 bad_mode ();
175 }
176
177 void do_fiq (struct pt_regs *pt_regs)
178 {
179 printf ("fast interrupt request\n");
180 show_regs (pt_regs);
181 bad_mode ();
182 }
183
184 void do_irq (struct pt_regs *pt_regs)
185 {
186 printf ("interrupt request\n");
187 show_regs (pt_regs);
188 bad_mode ();
189 }
190
191 /* The timer functionality is supplied by the Integrator board */
192 /* - see board/integrator<>.c */