cpu/at91rm9200/interrupts.c

   1 /*
   2  * (C) Copyright 2002
   3  * Lineo, Inc. <www.lineo.com>
   4  * Bernhard Kuhn <bkuhn@lineo.com>
   5  *
   6  * (C) Copyright 2002
   7  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
   8  * Marius Groeger <mgroeger@sysgo.de>
   9  *
  10  * (C) Copyright 2002
  11  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  12  * Alex Zuepke <azu@sysgo.de>
  13  *
  14  * See file CREDITS for list of people who contributed to this
  15  * project.
  16  *
  17  * This program is free software; you can redistribute it and/or
  18  * modify it under the terms of the GNU General Public License as
  19  * published by the Free Software Foundation; either version 2 of
  20  * the License, or (at your option) any later version.
  21  *
  22  * This program is distributed in the hope that it will be useful,
  23  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  25  * GNU General Public License for more details.
  26  *
  27  * You should have received a copy of the GNU General Public License
  28  * along with this program; if not, write to the Free Software
  29  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  30  * MA 02111-1307 USA
  31  */
  32
  33 #include <common.h>
  34 #include <asm/io.h>
  35 #include <asm/arch/hardware.h>
  36 #include <asm/proc/ptrace.h>
  37
  38 /* the number of clocks per CFG_HZ */
  39 #define TIMER_LOAD_VAL (CFG_HZ_CLOCK/CFG_HZ)
  40
  41 /* macro to read the 16 bit timer */
  42 #define READ_TIMER (tmr->TC_CV & 0x0000ffff)
  43 AT91PS_TC tmr;
  44
  45 #ifdef CONFIG_USE_IRQ
  46 #error There is no IRQ support for AT91RM9200 in U-Boot yet.
  47 #else
  48 void enable_interrupts (void)
  49 {
  50         return;
  51 }
  52 int disable_interrupts (void)
  53 {
  54         return 0;
  55 }
  56 #endif
  57
  58
  59 void bad_mode (void)
  60 {
  61         panic ("Resetting CPU ...\n");
  62         reset_cpu (0);
  63 }
  64
  65 void show_regs (struct pt_regs *regs)
  66 {
  67         unsigned long flags;
  68         const char *processor_modes[] = {
  69         "USER_26",      "FIQ_26",       "IRQ_26",       "SVC_26",
  70         "UK4_26",       "UK5_26",       "UK6_26",       "UK7_26",
  71         "UK8_26",       "UK9_26",       "UK10_26",      "UK11_26",
  72         "UK12_26",      "UK13_26",      "UK14_26",      "UK15_26",
  73         "USER_32",      "FIQ_32",       "IRQ_32",       "SVC_32",
  74         "UK4_32",       "UK5_32",       "UK6_32",       "ABT_32",
  75         "UK8_32",       "UK9_32",       "UK10_32",      "UND_32",
  76         "UK12_32",      "UK13_32",      "UK14_32",      "SYS_32",
  77         };
  78
  79         flags = condition_codes (regs);
  80
  81         printf ("pc : [<%08lx>]    lr : [<%08lx>]\n"
  82                 "sp : %08lx  ip : %08lx  fp : %08lx\n",
  83                 instruction_pointer (regs),
  84                 regs->ARM_lr, regs->ARM_sp, regs->ARM_ip, regs->ARM_fp);
  85         printf ("r10: %08lx  r9 : %08lx  r8 : %08lx\n",
  86                 regs->ARM_r10, regs->ARM_r9, regs->ARM_r8);
  87         printf ("r7 : %08lx  r6 : %08lx  r5 : %08lx  r4 : %08lx\n",
  88                 regs->ARM_r7, regs->ARM_r6, regs->ARM_r5, regs->ARM_r4);
  89         printf ("r3 : %08lx  r2 : %08lx  r1 : %08lx  r0 : %08lx\n",
  90                 regs->ARM_r3, regs->ARM_r2, regs->ARM_r1, regs->ARM_r0);
  91         printf ("Flags: %c%c%c%c",
  92                 flags & CC_N_BIT ? 'N' : 'n',
  93                 flags & CC_Z_BIT ? 'Z' : 'z',
  94                 flags & CC_C_BIT ? 'C' : 'c',
  95                 flags & CC_V_BIT ? 'V' : 'v');
  96         printf ("  IRQs %s  FIQs %s  Mode %s%s\n",
  97                 interrupts_enabled (regs) ? "on" : "off",
  98                 fast_interrupts_enabled (regs) ? "on" : "off",
  99                 processor_modes[processor_mode (regs)],
 100                 thumb_mode (regs) ? " (T)" : "");
 101 }
 102
 103 void do_undefined_instruction (struct pt_regs *pt_regs)
 104 {
 105         printf ("undefined instruction\n");
 106         show_regs (pt_regs);
 107         bad_mode ();
 108 }
 109
 110 void do_software_interrupt (struct pt_regs *pt_regs)
 111 {
 112         printf ("software interrupt\n");
 113         show_regs (pt_regs);
 114         bad_mode ();
 115 }
 116
 117 void do_prefetch_abort (struct pt_regs *pt_regs)
 118 {
 119         printf ("prefetch abort\n");
 120         show_regs (pt_regs);
 121         bad_mode ();
 122 }
 123
 124 void do_data_abort (struct pt_regs *pt_regs)
 125 {
 126         printf ("data abort\n");
 127         show_regs (pt_regs);
 128         bad_mode ();
 129 }
 130
 131 void do_not_used (struct pt_regs *pt_regs)
 132 {
 133         printf ("not used\n");
 134         show_regs (pt_regs);
 135         bad_mode ();
 136 }
 137
 138 void do_fiq (struct pt_regs *pt_regs)
 139 {
 140         printf ("fast interrupt request\n");
 141         show_regs (pt_regs);
 142         bad_mode ();
 143 }
 144
 145 void do_irq (struct pt_regs *pt_regs)
 146 {
 147         printf ("interrupt request\n");
 148         show_regs (pt_regs);
 149         bad_mode ();
 150 }
 151
 152 static ulong timestamp;
 153 static ulong lastinc;
 154
 155 int interrupt_init (void)
 156 {
 157
 158         tmr = AT91C_BASE_TC0;
 159
 160         /* enables TC1.0 clock */
 161         *AT91C_PMC_PCER = 1 << AT91C_ID_TC0;  /* enable clock */
 162
 163         *AT91C_TCB0_BCR = 0;
 164         *AT91C_TCB0_BMR = AT91C_TCB_TC0XC0S_NONE | AT91C_TCB_TC1XC1S_NONE | AT91C_TCB_TC2XC2S_NONE;
 165         tmr->TC_CCR = AT91C_TC_CLKDIS;
 166 #define AT91C_TC_CMR_CPCTRG (1 << 14)
 167         /* set to MCLK/2 and restart the timer when the vlaue in TC_RC is reached */
 168         tmr->TC_CMR = AT91C_TC_TIMER_DIV1_CLOCK | AT91C_TC_CMR_CPCTRG;
 169
 170         tmr->TC_IDR = ~0ul;
 171         tmr->TC_RC = TIMER_LOAD_VAL;
 172         lastinc = 0;
 173         tmr->TC_CCR = AT91C_TC_SWTRG | AT91C_TC_CLKEN;
 174         timestamp = 0;
 175
 176         return (0);
 177 }
 178
 179 /*
 180  * timer without interrupts
 181  */
 182
 183 void reset_timer (void)
 184 {
 185         reset_timer_masked ();
 186 }
 187
 188 ulong get_timer (ulong base)
 189 {
 190         return get_timer_masked () - base;
 191 }
 192
 193 void set_timer (ulong t)
 194 {
 195         timestamp = t;
 196 }
 197
 198 void udelay (unsigned long usec)
 199 {
 200         udelay_masked(usec);
 201 }
 202
 203 void reset_timer_masked (void)
 204 {
 205         /* reset time */
 206         lastinc = READ_TIMER;
 207         timestamp = 0;
 208 }
 209
 210 ulong get_timer_raw (void)
 211 {
 212         ulong now = READ_TIMER;
 213
 214         if (now >= lastinc) {
 215                 /* normal mode */
 216                 timestamp += now - lastinc;
 217         } else {
 218                 /* we have an overflow ... */
 219                 timestamp += now + TIMER_LOAD_VAL - lastinc;
 220         }
 221         lastinc = now;
 222
 223         return timestamp;
 224 }
 225
 226 ulong get_timer_masked (void)
 227 {
 228         return get_timer_raw()/TIMER_LOAD_VAL;
 229 }
 230
 231 void udelay_masked (unsigned long usec)
 232 {
 233         ulong tmo;
 234
 235 #if 0 /* doesn't work for usec < 1000 */
 236         tmo = usec / 1000;
 237         tmo *= CFG_HZ_CLOCK;
 238 #else
 239         tmo = CFG_HZ_CLOCK / 1000;
 240         tmo *= usec;
 241 #endif
 242         tmo /= 1000;
 243
 244         reset_timer_masked ();
 245
 246         while (get_timer_raw () < tmo)
 247                 /*NOP*/;
 248 }
 249
 250 /*
 251  * This function is derived from PowerPC code (read timebase as long long).
 252  * On ARM it just returns the timer value.
 253  */
 254 unsigned long long get_ticks(void)
 255 {
 256         return get_timer(0);
 257 }
 258
 259 /*
 260  * This function is derived from PowerPC code (timebase clock frequency).
 261  * On ARM it returns the number of timer ticks per second.
 262  */
 263 ulong get_tbclk (void)
 264 {
 265         ulong tbclk;
 266
 267         tbclk = CFG_HZ;
 268         return tbclk;
 269 }