cpu/mcf52x2/cpu.c

   1 /*
   2  * (C) Copyright 2003
   3  * Josef Baumgartner <josef.baumgartner@telex.de>
   4  *
   5  * MCF5282 additionals
   6  * (C) Copyright 2005
   7  * BuS Elektronik GmbH & Co. KG <esw@bus-elektronik.de>
   8  *
   9  * See file CREDITS for list of people who contributed to this
  10  * project.
  11  *
  12  * This program is free software; you can redistribute it and/or
  13  * modify it under the terms of the GNU General Public License as
  14  * published by the Free Software Foundation; either version 2 of
  15  * the License, or (at your option) any later version.
  16  *
  17  * This program is distributed in the hope that it will be useful,
  18  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  20  * GNU General Public License for more details.
  21  *
  22  * You should have received a copy of the GNU General Public License
  23  * along with this program; if not, write to the Free Software
  24  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  25  * MA 02111-1307 USA
  26  */
  27
  28 #include <common.h>
  29 #include <watchdog.h>
  30 #include <command.h>
  31 #include <asm/immap.h>
  32
  33 #ifdef  CONFIG_M5271
  34 /*
  35  * Both MCF5270 and MCF5271 are members of the MPC5271 family. Try to
  36  * determine which one we are running on, based on the Chip Identification
  37  * Register (CIR).
  38  */
  39 int checkcpu(void)
  40 {
  41         char buf[32];
  42         unsigned short cir;     /* Chip Identification Register */
  43         unsigned short pin;     /* Part identification number */
  44         unsigned char prn;      /* Part revision number */
  45         char *cpu_model;
  46
  47         cir = mbar_readShort(MCF_CCM_CIR);
  48         pin = cir >> MCF_CCM_CIR_PIN_LEN;
  49         prn = cir & MCF_CCM_CIR_PRN_MASK;
  50
  51         switch (pin) {
  52         case MCF_CCM_CIR_PIN_MCF5270:
  53                 cpu_model = "5270";
  54                 break;
  55         case MCF_CCM_CIR_PIN_MCF5271:
  56                 cpu_model = "5271";
  57                 break;
  58         default:
  59                 cpu_model = NULL;
  60                 break;
  61         }
  62
  63         if (cpu_model)
  64                 printf("CPU:   Freescale ColdFire MCF%s rev. %hu, at %s MHz\n",
  65                        cpu_model, prn, strmhz(buf, CFG_CLK));
  66         else
  67                 printf("CPU:   Unknown - Freescale ColdFire MCF5271 family"
  68                        " (PIN: 0x%x) rev. %hu, at %s MHz\n",
  69                        pin, prn, strmhz(buf, CFG_CLK));
  70
  71         return 0;
  72 }
  73
  74 int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
  75 {
  76         mbar_writeByte(MCF_RCM_RCR,
  77                        MCF_RCM_RCR_SOFTRST | MCF_RCM_RCR_FRCRSTOUT);
  78         return 0;
  79 };
  80
  81 #if defined(CONFIG_WATCHDOG)
  82 void watchdog_reset(void)
  83 {
  84         mbar_writeShort(MCF_WTM_WSR, 0x5555);
  85         mbar_writeShort(MCF_WTM_WSR, 0xAAAA);
  86 }
  87
  88 int watchdog_disable(void)
  89 {
  90         mbar_writeShort(MCF_WTM_WCR, 0);
  91         return (0);
  92 }
  93
  94 int watchdog_init(void)
  95 {
  96         mbar_writeShort(MCF_WTM_WCR, MCF_WTM_WCR_EN);
  97         return (0);
  98 }
  99 #endif                          /* #ifdef CONFIG_WATCHDOG */
 100
 101 #endif
 102
 103 #ifdef  CONFIG_M5272
 104 int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
 105 {
 106         volatile wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
 107
 108         wdp->wdog_wrrr = 0;
 109         udelay(1000);
 110
 111         /* enable watchdog, set timeout to 0 and wait */
 112         wdp->wdog_wrrr = 1;
 113         while (1) ;
 114
 115         /* we don't return! */
 116         return 0;
 117 };
 118
 119 int checkcpu(void)
 120 {
 121         volatile sysctrl_t *sysctrl = (sysctrl_t *) (MMAP_CFG);
 122         uchar msk;
 123         char *suf;
 124
 125         puts("CPU:   ");
 126         msk = (sysctrl->sc_dir > 28) & 0xf;
 127         switch (msk) {
 128         case 0x2:
 129                 suf = "1K75N";
 130                 break;
 131         case 0x4:
 132                 suf = "3K75N";
 133                 break;
 134         default:
 135                 suf = NULL;
 136                 printf("Freescale MCF5272 (Mask:%01x)\n", msk);
 137                 break;
 138         }
 139
 140         if (suf)
 141                 printf("Freescale MCF5272 %s\n", suf);
 142         return 0;
 143 };
 144
 145 #if defined(CONFIG_WATCHDOG)
 146 /* Called by macro WATCHDOG_RESET */
 147 void watchdog_reset(void)
 148 {
 149         volatile wdog_t *wdt = (volatile wdog_t *)(MMAP_WDOG);
 150         wdt->wdog_wcr = 0;
 151 }
 152
 153 int watchdog_disable(void)
 154 {
 155         volatile wdog_t *wdt = (volatile wdog_t *)(MMAP_WDOG);
 156
 157         wdt->wdog_wcr = 0;      /* reset watchdog counter */
 158         wdt->wdog_wirr = 0;     /* disable watchdog interrupt */
 159         wdt->wdog_wrrr = 0;     /* disable watchdog timer */
 160
 161         puts("WATCHDOG:disabled\n");
 162         return (0);
 163 }
 164
 165 int watchdog_init(void)
 166 {
 167         volatile wdog_t *wdt = (volatile wdog_t *)(MMAP_WDOG);
 168
 169         wdt->wdog_wirr = 0;     /* disable watchdog interrupt */
 170
 171         /* set timeout and enable watchdog */
 172         wdt->wdog_wrrr =
 173             ((CONFIG_WATCHDOG_TIMEOUT * CFG_HZ) / (32768 * 1000)) - 1;
 174         wdt->wdog_wcr = 0;      /* reset watchdog counter */
 175
 176         puts("WATCHDOG:enabled\n");
 177         return (0);
 178 }
 179 #endif                          /* #ifdef CONFIG_WATCHDOG */
 180
 181 #endif                          /* #ifdef CONFIG_M5272 */
 182
 183 #ifdef  CONFIG_M5282
 184 int checkcpu(void)
 185 {
 186         unsigned char resetsource = MCFRESET_RSR;
 187
 188         printf("CPU:   Freescale Coldfire MCF5282 (PIN: %2.2x REV: %2.2x)\n",
 189                MCFCCM_CIR >> 8, MCFCCM_CIR & MCFCCM_CIR_PRN_MASK);
 190         printf("Reset:%s%s%s%s%s%s%s\n",
 191                (resetsource & MCFRESET_RSR_LOL) ? " Loss of Lock" : "",
 192                (resetsource & MCFRESET_RSR_LOC) ? " Loss of Clock" : "",
 193                (resetsource & MCFRESET_RSR_EXT) ? " External" : "",
 194                (resetsource & MCFRESET_RSR_POR) ? " Power On" : "",
 195                (resetsource & MCFRESET_RSR_WDR) ? " Watchdog" : "",
 196                (resetsource & MCFRESET_RSR_SOFT) ? " Software" : "",
 197                (resetsource & MCFRESET_RSR_LVD) ? " Low Voltage" : "");
 198         return 0;
 199 }
 200
 201 int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
 202 {
 203         MCFRESET_RCR = MCFRESET_RCR_SOFTRST;
 204         return 0;
 205 };
 206 #endif
 207
 208 #ifdef CONFIG_M5249
 209 int checkcpu(void)
 210 {
 211         char buf[32];
 212
 213         printf("CPU:   Freescale Coldfire MCF5249 at %s MHz\n",
 214                strmhz(buf, CFG_CLK));
 215         return 0;
 216 }
 217
 218 int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
 219 {
 220         /* enable watchdog, set timeout to 0 and wait */
 221         mbar_writeByte(MCFSIM_SYPCR, 0xc0);
 222         while (1) ;
 223
 224         /* we don't return! */
 225         return 0;
 226 };
 227 #endif
 228
 229 #ifdef CONFIG_M5253
 230 int checkcpu(void)
 231 {
 232         char buf[32];
 233
 234         unsigned char resetsource = mbar_readLong(SIM_RSR);
 235         printf("CPU:   Freescale Coldfire MCF5253 at %s MHz\n",
 236                strmhz(buf, CFG_CLK));
 237
 238         if ((resetsource & SIM_RSR_HRST) || (resetsource & SIM_RSR_SWTR)) {
 239                 printf("Reset:%s%s\n",
 240                        (resetsource & SIM_RSR_HRST) ? " Hardware/ System Reset"
 241                        : "",
 242                        (resetsource & SIM_RSR_SWTR) ? " Software Watchdog" :
 243                        "");
 244         }
 245         return 0;
 246 }
 247
 248 int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
 249 {
 250         /* enable watchdog, set timeout to 0 and wait */
 251         mbar_writeByte(SIM_SYPCR, 0xc0);
 252         while (1) ;
 253
 254         /* we don't return! */
 255         return 0;
 256 };
 257 #endif