]> git.ipfire.org Git - people/ms/u-boot.git/blob - cpu/mcf532x/start.S
ColdFire: Add MCF5301x CPU and M53017EVB support
[people/ms/u-boot.git] / cpu / mcf532x / start.S
1 /*
2 * Copyright (C) 2003 Josef Baumgartner <josef.baumgartner@telex.de>
3 * Based on code from Bernhard Kuhn <bkuhn@metrowerks.com>
4 *
5 * (C) Copyright 2004-2008 Freescale Semiconductor, Inc.
6 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
7 *
8 * See file CREDITS for list of people who contributed to this
9 * project.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * MA 02111-1307 USA
25 */
26
27 #include <config.h>
28 #include "version.h"
29
30 #ifndef CONFIG_IDENT_STRING
31 #define CONFIG_IDENT_STRING ""
32 #endif
33
34 #define _START _start
35 #define _FAULT _fault
36
37 #define SAVE_ALL \
38 move.w #0x2700,%sr; /* disable intrs */ \
39 subl #60,%sp; /* space for 15 regs */ \
40 moveml %d0-%d7/%a0-%a6,%sp@;
41
42 #define RESTORE_ALL \
43 moveml %sp@,%d0-%d7/%a0-%a6; \
44 addl #60,%sp; /* space for 15 regs */ \
45 rte;
46
47 .text
48 /*
49 * Vector table. This is used for initial platform startup.
50 * These vectors are to catch any un-intended traps.
51 */
52 _vectors:
53
54 INITSP: .long 0x00000000 /* Initial SP */
55 INITPC: .long _START /* Initial PC */
56 vector02: .long _FAULT /* Access Error */
57 vector03: .long _FAULT /* Address Error */
58 vector04: .long _FAULT /* Illegal Instruction */
59 vector05: .long _FAULT /* Reserved */
60 vector06: .long _FAULT /* Reserved */
61 vector07: .long _FAULT /* Reserved */
62 vector08: .long _FAULT /* Privilege Violation */
63 vector09: .long _FAULT /* Trace */
64 vector0A: .long _FAULT /* Unimplemented A-Line */
65 vector0B: .long _FAULT /* Unimplemented F-Line */
66 vector0C: .long _FAULT /* Debug Interrupt */
67 vector0D: .long _FAULT /* Reserved */
68 vector0E: .long _FAULT /* Format Error */
69 vector0F: .long _FAULT /* Unitialized Int. */
70
71 /* Reserved */
72 vector10_17:
73 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
74
75 vector18: .long _FAULT /* Spurious Interrupt */
76 vector19: .long _FAULT /* Autovector Level 1 */
77 vector1A: .long _FAULT /* Autovector Level 2 */
78 vector1B: .long _FAULT /* Autovector Level 3 */
79 vector1C: .long _FAULT /* Autovector Level 4 */
80 vector1D: .long _FAULT /* Autovector Level 5 */
81 vector1E: .long _FAULT /* Autovector Level 6 */
82 vector1F: .long _FAULT /* Autovector Level 7 */
83
84 /* TRAP #0 - #15 */
85 vector20_2F:
86 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
87 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
88
89 /* Reserved */
90 vector30_3F:
91 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
92 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
93
94 vector64_127:
95 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
96 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
97 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
98 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
99 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
100 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
101 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
102 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
103
104 vector128_191:
105 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
106 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
107 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
108 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
109 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
110 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
111 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
112 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
113
114 vector192_255:
115 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
116 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
117 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
118 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
119 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
120 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
121 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
122 .long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
123
124 .text
125
126 .globl _start
127 _start:
128 nop
129 nop
130 move.w #0x2700,%sr /* Mask off Interrupt */
131
132 /* Set vector base register at the beginning of the Flash */
133 move.l #CONFIG_SYS_FLASH_BASE, %d0
134 movec %d0, %VBR
135
136 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0
137 movec %d0, %RAMBAR1
138
139 /* invalidate and disable cache */
140 move.l #0x01000000, %d0 /* Invalidate cache cmd */
141 movec %d0, %CACR /* Invalidate cache */
142 move.l #0, %d0
143 movec %d0, %ACR0
144 movec %d0, %ACR1
145
146 #ifdef CONFIG_MCF5301x
147 move.l #(0xFC0a0010), %a0
148 move.w (%a0), %d0
149 and.l %d0, 0xEFFF
150
151 move.w %d0, (%a0)
152 #endif
153
154 /* initialize general use internal ram */
155 move.l #0, %d0
156 move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-8), %a1
157 move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-4), %a2
158 move.l %d0, (%a1)
159 move.l %d0, (%a2)
160
161 /* set stackpointer to end of internal ram to get some stackspace for the
162 first c-code */
163 move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET), %sp
164 clr.l %sp@-
165
166 move.l #__got_start, %a5 /* put relocation table address to a5 */
167
168 bsr cpu_init_f /* run low-level CPU init code (from flash) */
169 bsr board_init_f /* run low-level board init code (from flash) */
170
171 /* board_init_f() does not return */
172
173 /*------------------------------------------------------------------------------*/
174
175 /*
176 * void relocate_code (addr_sp, gd, addr_moni)
177 *
178 * This "function" does not return, instead it continues in RAM
179 * after relocating the monitor code.
180 *
181 * r3 = dest
182 * r4 = src
183 * r5 = length in bytes
184 * r6 = cachelinesize
185 */
186 .globl relocate_code
187 relocate_code:
188 link.w %a6,#0
189 move.l 8(%a6), %sp /* set new stack pointer */
190
191 move.l 12(%a6), %d0 /* Save copy of Global Data pointer */
192 move.l 16(%a6), %a0 /* Save copy of Destination Address */
193
194 move.l #CONFIG_SYS_MONITOR_BASE, %a1
195 move.l #__init_end, %a2
196 move.l %a0, %a3
197
198 /* copy the code to RAM */
199 1:
200 move.l (%a1)+, (%a3)+
201 cmp.l %a1,%a2
202 bgt.s 1b
203
204 /*
205 * We are done. Do not return, instead branch to second part of board
206 * initialization, now running from RAM.
207 */
208 move.l %a0, %a1
209 add.l #(in_ram - CONFIG_SYS_MONITOR_BASE), %a1
210 jmp (%a1)
211
212 in_ram:
213
214 clear_bss:
215 /*
216 * Now clear BSS segment
217 */
218 move.l %a0, %a1
219 add.l #(_sbss - CONFIG_SYS_MONITOR_BASE),%a1
220 move.l %a0, %d1
221 add.l #(_ebss - CONFIG_SYS_MONITOR_BASE),%d1
222 6:
223 clr.l (%a1)+
224 cmp.l %a1,%d1
225 bgt.s 6b
226
227 /*
228 * fix got table in RAM
229 */
230 move.l %a0, %a1
231 add.l #(__got_start - CONFIG_SYS_MONITOR_BASE),%a1
232 move.l %a1,%a5 /* * fix got pointer register a5 */
233
234 move.l %a0, %a2
235 add.l #(__got_end - CONFIG_SYS_MONITOR_BASE),%a2
236
237 7:
238 move.l (%a1),%d1
239 sub.l #_start,%d1
240 add.l %a0,%d1
241 move.l %d1,(%a1)+
242 cmp.l %a2, %a1
243 bne 7b
244
245 /* calculate relative jump to board_init_r in ram */
246 move.l %a0, %a1
247 add.l #(board_init_r - CONFIG_SYS_MONITOR_BASE), %a1
248
249 /* set parameters for board_init_r */
250 move.l %a0,-(%sp) /* dest_addr */
251 move.l %d0,-(%sp) /* gd */
252 jsr (%a1)
253
254 /*------------------------------------------------------------------------------*/
255 /* exception code */
256 .globl _fault
257 _fault:
258 jmp _fault
259 .globl _exc_handler
260
261 _exc_handler:
262 SAVE_ALL
263 movel %sp,%sp@-
264 bsr exc_handler
265 addql #4,%sp
266 RESTORE_ALL
267
268 .globl _int_handler
269 _int_handler:
270 SAVE_ALL
271 movel %sp,%sp@-
272 bsr int_handler
273 addql #4,%sp
274 RESTORE_ALL
275
276 /*------------------------------------------------------------------------------*/
277 /* cache functions */
278 .globl icache_enable
279 icache_enable:
280 move.l #0x01000000, %d0 /* Invalidate cache cmd */
281 movec %d0, %CACR /* Invalidate cache */
282 move.l #(CONFIG_SYS_SDRAM_BASE + 0x1c000), %d0
283 movec %d0, %ACR0 /* Enable cache */
284
285 move.l #0x80000200, %d0 /* Setup cache mask */
286 movec %d0, %CACR /* Enable cache */
287 nop
288
289 move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-8), %a1
290 moveq #1, %d0
291 move.l %d0, (%a1)
292 rts
293
294 .globl icache_disable
295 icache_disable:
296 move.l #0x01000000, %d0 /* Setup cache mask */
297 movec %d0, %CACR /* Disable cache */
298 clr.l %d0 /* Setup cache mask */
299 movec %d0, %ACR0
300 movec %d0, %ACR1
301
302 move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-8), %a1
303 moveq #0, %d0
304 move.l %d0, (%a1)
305 rts
306
307 .globl icache_status
308 icache_status:
309 move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-8), %a1
310 move.l (%a1), %d0
311 rts
312
313 .globl icache_invalid
314 icache_invalid:
315 move.l #0x81000200, %d0 /* Setup cache mask */
316 movec %d0, %CACR /* Enable cache */
317 rts
318
319 .globl dcache_enable
320 dcache_enable:
321 move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-4), %a1
322 moveq #1, %d0
323 move.l %d0, (%a1)
324 rts
325
326 /* No dcache, just a dummy function */
327 .globl dcache_disable
328 dcache_disable:
329 move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-4), %a1
330 moveq #0, %d0
331 move.l %d0, (%a1)
332 rts
333
334 .globl dcache_status
335 dcache_status:
336 move.l #(CONFIG_SYS_INIT_RAM_ADDR+CONFIG_SYS_INIT_RAM_END-4), %a1
337 move.l (%a1), %d0
338 rts
339
340 /*------------------------------------------------------------------------------*/
341
342 .globl version_string
343 version_string:
344 .ascii U_BOOT_VERSION
345 .ascii " (", __DATE__, " - ", __TIME__, ")"
346 .ascii CONFIG_IDENT_STRING, "\0"
347 .align 4