cpu/mpc5xx/start.S

   1 /*
   2  *  Copyright (C) 1998  Dan Malek <dmalek@jlc.net>
   3  *  Copyright (C) 1999  Magnus Damm <kieraypc01.p.y.kie.era.ericsson.se>
   4  *  Copyright (C) 2000, 2001, 2002 Wolfgang Denk <wd@denx.de>
   5  *  Copyright (C) 2003  Martin Winistoerfer, martinwinistoerfer@gmx.ch.
   6  *
   7  * See file CREDITS for list of people who contributed to this
   8  * project.
   9  *
  10  * This program is free software; you can redistribute it and/or
  11  * modify it under the terms of the GNU General Public License as
  12  * published by the Free Software Foundation; either version 2 of
  13  * the License, or (at your option) any later version.
  14  *
  15  * This program is distributed in the hope that it will be useful,
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18  * GNU General Public License for more details.
  19  *
  20  * You should have received a copy of the GNU General Public License
  21  * along with this program; if not, write to the Free Software
  22  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  23  * MA 02111-1307 USA
  24  */
  25
  26 /*
  27  * File:                start.S
  28  *
  29  * Discription:         startup code
  30  *
  31  */
  32
  33 #include <config.h>
  34 #include <mpc5xx.h>
  35 #include <version.h>
  36
  37 #define CONFIG_5xx 1            /* needed for Linux kernel header files */
  38 #define _LINUX_CONFIG_H 1       /* avoid reading Linux autoconf.h file  */
  39
  40 #include <ppc_asm.tmpl>
  41 #include <ppc_defs.h>
  42
  43 #include <linux/config.h>
  44 #include <asm/processor.h>
  45
  46 #ifndef  CONFIG_IDENT_STRING
  47 #define  CONFIG_IDENT_STRING ""
  48 #endif
  49
  50 /* We don't have a MMU.
  51 */
  52 #undef  MSR_KERNEL
  53 #define MSR_KERNEL ( MSR_ME | MSR_RI )          /* Machine Check and Recoverable Interr. */
  54
  55 /*
  56  * Set up GOT: Global Offset Table
  57  *
  58  * Use r14 to access the GOT
  59  */
  60         START_GOT
  61         GOT_ENTRY(_GOT2_TABLE_)
  62         GOT_ENTRY(_FIXUP_TABLE_)
  63
  64         GOT_ENTRY(_start)
  65         GOT_ENTRY(_start_of_vectors)
  66         GOT_ENTRY(_end_of_vectors)
  67         GOT_ENTRY(transfer_to_handler)
  68
  69         GOT_ENTRY(__init_end)
  70         GOT_ENTRY(_end)
  71         GOT_ENTRY(__bss_start)
  72         END_GOT
  73
  74 /*
  75  * r3 - 1st arg to board_init(): IMMP pointer
  76  * r4 - 2nd arg to board_init(): boot flag
  77  */
  78         .text
  79         .long   0x27051956                      /* U-Boot Magic Number */
  80         .globl  version_string
  81 version_string:
  82         .ascii U_BOOT_VERSION
  83         .ascii " (", __DATE__, " - ", __TIME__, ")"
  84         .ascii CONFIG_IDENT_STRING, "\0"
  85
  86         . = EXC_OFF_SYS_RESET
  87         .globl  _start
  88 _start:
  89         mfspr   r3, 638
  90         li      r4, CFG_ISB                     /* Set ISB bit */
  91         or      r3, r3, r4
  92         mtspr   638, r3
  93         li      r21, BOOTFLAG_COLD              /* Normal Power-On: Boot from FLASH     */
  94         b       boot_cold
  95
  96         . = EXC_OFF_SYS_RESET + 0x20
  97
  98         .globl  _start_warm
  99 _start_warm:
 100         li      r21, BOOTFLAG_WARM              /* Software reboot */
 101         b       boot_warm
 102
 103 boot_cold:
 104 boot_warm:
 105
 106         /* Initialize machine status; enable machine check interrupt            */
 107         /*----------------------------------------------------------------------*/
 108         li      r3, MSR_KERNEL                  /* Set ME, RI flags */
 109         mtmsr   r3
 110         mtspr   SRR1, r3                        /* Make SRR1 match MSR */
 111
 112         /* Initialize debug port registers                                      */
 113         /*----------------------------------------------------------------------*/
 114         xor     r0, r0, r0                      /* Clear R0 */
 115         mtspr   LCTRL1, r0                      /* Initialize debug port regs */
 116         mtspr   LCTRL2, r0
 117         mtspr   COUNTA, r0
 118         mtspr   COUNTB, r0
 119
 120         /*
 121          * Calculate absolute address in FLASH and jump there
 122          *----------------------------------------------------------------------*/
 123
 124         lis     r3, CFG_MONITOR_BASE@h
 125         ori     r3, r3, CFG_MONITOR_BASE@l
 126         addi    r3, r3, in_flash - _start + EXC_OFF_SYS_RESET
 127         mtlr    r3
 128         blr
 129
 130 in_flash:
 131
 132         /* Initialize some SPRs that are hard to access from C                  */
 133         /*----------------------------------------------------------------------*/
 134
 135         lis     r3, CFG_IMMR@h                  /* Pass IMMR as arg1 to C routine */
 136         lis     r2, CFG_INIT_SP_ADDR@h
 137         ori     r1, r2, CFG_INIT_SP_ADDR@l      /* Set up the stack in internal SRAM */
 138         /* Note: R0 is still 0 here */
 139         stwu    r0, -4(r1)                      /* Clear final stack frame so that      */
 140         stwu    r0, -4(r1)                      /* stack backtraces terminate cleanly   */
 141
 142         /*
 143          * Disable serialized ifetch and show cycles
 144          * (i.e. set processor to normal mode) for maximum
 145          * performance.
 146          */
 147
 148         li      r2, 0x0007
 149         mtspr   ICTRL, r2
 150
 151         /* Set up debug mode entry */
 152
 153         lis     r2, CFG_DER@h
 154         ori     r2, r2, CFG_DER@l
 155         mtspr   DER, r2
 156
 157         /* Let the C-code set up the rest                                       */
 158         /*                                                                      */
 159         /* Be careful to keep code relocatable !                                */
 160         /*----------------------------------------------------------------------*/
 161
 162         GET_GOT                 /* initialize GOT access                        */
 163
 164         /* r3: IMMR */
 165         bl      cpu_init_f      /* run low-level CPU init code     (from Flash) */
 166
 167         mr      r3, r21
 168         /* r3: BOOTFLAG */
 169         bl      board_init_f    /* run 1st part of board init code (from Flash) */
 170
 171
 172         .globl  _start_of_vectors
 173 _start_of_vectors:
 174
 175 /* Machine check */
 176         STD_EXCEPTION(0x200, MachineCheck, MachineCheckException)
 177
 178 /* Data Storage exception.  "Never" generated on the 860. */
 179         STD_EXCEPTION(0x300, DataStorage, UnknownException)
 180
 181 /* Instruction Storage exception.  "Never" generated on the 860. */
 182         STD_EXCEPTION(0x400, InstStorage, UnknownException)
 183
 184 /* External Interrupt exception. */
 185         STD_EXCEPTION(0x500, ExtInterrupt, external_interrupt)
 186
 187 /* Alignment exception. */
 188         . = 0x600
 189 Alignment:
 190         EXCEPTION_PROLOG
 191         mfspr   r4,DAR
 192         stw     r4,_DAR(r21)
 193         mfspr   r5,DSISR
 194         stw     r5,_DSISR(r21)
 195         addi    r3,r1,STACK_FRAME_OVERHEAD
 196         li      r20,MSR_KERNEL
 197         rlwimi  r20,r23,0,16,16         /* copy EE bit from saved MSR */
 198         lwz     r6,GOT(transfer_to_handler)
 199         mtlr    r6
 200         blrl
 201 .L_Alignment:
 202         .long   AlignmentException - _start + EXC_OFF_SYS_RESET
 203         .long   int_return - _start + EXC_OFF_SYS_RESET
 204
 205 /* Program check exception */
 206         . = 0x700
 207 ProgramCheck:
 208         EXCEPTION_PROLOG
 209         addi    r3,r1,STACK_FRAME_OVERHEAD
 210         li      r20,MSR_KERNEL
 211         rlwimi  r20,r23,0,16,16         /* copy EE bit from saved MSR */
 212         lwz     r6,GOT(transfer_to_handler)
 213         mtlr    r6
 214         blrl
 215 .L_ProgramCheck:
 216         .long   ProgramCheckException - _start + EXC_OFF_SYS_RESET
 217         .long   int_return - _start + EXC_OFF_SYS_RESET
 218
 219         /* FPU on MPC5xx available. We will use it later.
 220         */
 221         STD_EXCEPTION(0x800, FPUnavailable, UnknownException)
 222
 223         /* I guess we could implement decrementer, and may have
 224          * to someday for timekeeping.
 225          */
 226         STD_EXCEPTION(0x900, Decrementer, timer_interrupt)
 227         STD_EXCEPTION(0xa00, Trap_0a, UnknownException)
 228         STD_EXCEPTION(0xb00, Trap_0b, UnknownException)
 229
 230         . = 0xc00
 231 /*
 232  * r0 - SYSCALL number
 233  * r3-... arguments
 234  */
 235 SystemCall:
 236         addis   r11,r0,0                /* get functions table addr */
 237         ori     r11,r11,0               /* Note: this code is patched in trap_init */
 238         addis   r12,r0,0                /* get number of functions */
 239         ori     r12,r12,0
 240
 241         cmplw   0, r0, r12
 242         bge     1f
 243
 244         rlwinm  r0,r0,2,0,31            /* fn_addr = fn_tbl[r0] */
 245         add     r11,r11,r0
 246         lwz     r11,0(r11)
 247
 248         li      r20,0xd00-4             /* Get stack pointer */
 249         lwz     r12,0(r20)
 250         subi    r12,r12,12              /* Adjust stack pointer */
 251         li      r0,0xc00+_end_back-SystemCall
 252         cmplw   0, r0, r12              /* Check stack overflow */
 253         bgt     1f
 254         stw     r12,0(r20)
 255
 256         mflr    r0
 257         stw     r0,0(r12)
 258         mfspr   r0,SRR0
 259         stw     r0,4(r12)
 260         mfspr   r0,SRR1
 261         stw     r0,8(r12)
 262
 263         li      r12,0xc00+_back-SystemCall
 264         mtlr    r12
 265         mtspr   SRR0,r11
 266
 267 1:      SYNC
 268         rfi
 269
 270 _back:
 271
 272         mfmsr   r11                     /* Disable interrupts */
 273         li      r12,0
 274         ori     r12,r12,MSR_EE
 275         andc    r11,r11,r12
 276         SYNC                            /* Some chip revs need this... */
 277         mtmsr   r11
 278         SYNC
 279
 280         li      r12,0xd00-4             /* restore regs */
 281         lwz     r12,0(r12)
 282
 283         lwz     r11,0(r12)
 284         mtlr    r11
 285         lwz     r11,4(r12)
 286         mtspr   SRR0,r11
 287         lwz     r11,8(r12)
 288         mtspr   SRR1,r11
 289
 290         addi    r12,r12,12              /* Adjust stack pointer */
 291         li      r20,0xd00-4
 292         stw     r12,0(r20)
 293
 294         SYNC
 295         rfi
 296 _end_back:
 297
 298         STD_EXCEPTION(0xd00, SingleStep, UnknownException)
 299
 300         STD_EXCEPTION(0xe00, Trap_0e, UnknownException)
 301         STD_EXCEPTION(0xf00, Trap_0f, UnknownException)
 302
 303         /* On the MPC8xx, this is a software emulation interrupt.  It occurs
 304          * for all unimplemented and illegal instructions.
 305          */
 306         STD_EXCEPTION(0x1000, SoftEmu, SoftEmuException)
 307         STD_EXCEPTION(0x1100, InstructionTLBMiss, UnknownException)
 308         STD_EXCEPTION(0x1200, DataTLBMiss, UnknownException)
 309         STD_EXCEPTION(0x1300, InstructionTLBError, UnknownException)
 310         STD_EXCEPTION(0x1400, DataTLBError, UnknownException)
 311
 312         STD_EXCEPTION(0x1500, Reserved5, UnknownException)
 313         STD_EXCEPTION(0x1600, Reserved6, UnknownException)
 314         STD_EXCEPTION(0x1700, Reserved7, UnknownException)
 315         STD_EXCEPTION(0x1800, Reserved8, UnknownException)
 316         STD_EXCEPTION(0x1900, Reserved9, UnknownException)
 317         STD_EXCEPTION(0x1a00, ReservedA, UnknownException)
 318         STD_EXCEPTION(0x1b00, ReservedB, UnknownException)
 319
 320         STD_EXCEPTION(0x1c00, DataBreakpoint, UnknownException)
 321         STD_EXCEPTION(0x1d00, InstructionBreakpoint, DebugException)
 322         STD_EXCEPTION(0x1e00, PeripheralBreakpoint, UnknownException)
 323         STD_EXCEPTION(0x1f00, DevPortBreakpoint, UnknownException)
 324
 325
 326         .globl  _end_of_vectors
 327 _end_of_vectors:
 328
 329
 330         . = 0x2000
 331
 332 /*
 333  * This code finishes saving the registers to the exception frame
 334  * and jumps to the appropriate handler for the exception.
 335  * Register r21 is pointer into trap frame, r1 has new stack pointer.
 336  */
 337         .globl  transfer_to_handler
 338 transfer_to_handler:
 339         stw     r22,_NIP(r21)
 340         lis     r22,MSR_POW@h
 341         andc    r23,r23,r22
 342         stw     r23,_MSR(r21)
 343         SAVE_GPR(7, r21)
 344         SAVE_4GPRS(8, r21)
 345         SAVE_8GPRS(12, r21)
 346         SAVE_8GPRS(24, r21)
 347         mflr    r23
 348         andi.   r24,r23,0x3f00          /* get vector offset */
 349         stw     r24,TRAP(r21)
 350         li      r22,0
 351         stw     r22,RESULT(r21)
 352         mtspr   SPRG2,r22               /* r1 is now kernel sp */
 353         lwz     r24,0(r23)              /* virtual address of handler */
 354         lwz     r23,4(r23)              /* where to go when done */
 355         mtspr   SRR0,r24
 356         mtspr   SRR1,r20
 357         mtlr    r23
 358         SYNC
 359         rfi                             /* jump to handler, enable MMU */
 360
 361 int_return:
 362         mfmsr   r28                     /* Disable interrupts */
 363         li      r4,0
 364         ori     r4,r4,MSR_EE
 365         andc    r28,r28,r4
 366         SYNC                            /* Some chip revs need this... */
 367         mtmsr   r28
 368         SYNC
 369         lwz     r2,_CTR(r1)
 370         lwz     r0,_LINK(r1)
 371         mtctr   r2
 372         mtlr    r0
 373         lwz     r2,_XER(r1)
 374         lwz     r0,_CCR(r1)
 375         mtspr   XER,r2
 376         mtcrf   0xFF,r0
 377         REST_10GPRS(3, r1)
 378         REST_10GPRS(13, r1)
 379         REST_8GPRS(23, r1)
 380         REST_GPR(31, r1)
 381         lwz     r2,_NIP(r1)             /* Restore environment */
 382         lwz     r0,_MSR(r1)
 383         mtspr   SRR0,r2
 384         mtspr   SRR1,r0
 385         lwz     r0,GPR0(r1)
 386         lwz     r2,GPR2(r1)
 387         lwz     r1,GPR1(r1)
 388         SYNC
 389         rfi
 390
 391
 392 /*
 393  * unsigned int get_immr (unsigned int mask)
 394  *
 395  * return (mask ? (IMMR & mask) : IMMR);
 396  */
 397         .globl  get_immr
 398 get_immr:
 399         mr      r4,r3           /* save mask */
 400         mfspr   r3, IMMR        /* IMMR */
 401         cmpwi   0,r4,0          /* mask != 0 ? */
 402         beq     4f
 403         and     r3,r3,r4        /* IMMR & mask */
 404 4:
 405         blr
 406
 407         .globl get_pvr
 408 get_pvr:
 409         mfspr   r3, PVR
 410         blr
 411
 412
 413 /*------------------------------------------------------------------------------*/
 414
 415 /*
 416  * void relocate_code (addr_sp, gd, addr_moni)
 417  *
 418  * This "function" does not return, instead it continues in RAM
 419  * after relocating the monitor code.
 420  *
 421  * r3 = dest
 422  * r4 = src
 423  * r5 = length in bytes
 424  * r6 = cachelinesize
 425  */
 426         .globl  relocate_code
 427 relocate_code:
 428         mr      r1,  r3         /* Set new stack pointer in SRAM        */
 429         mr      r9,  r4         /* Save copy of global data pointer in SRAM */
 430         mr      r10, r5         /* Save copy of monitor destination Address in SRAM */
 431
 432         mr      r3,  r5                         /* Destination Address  */
 433         lis     r4, CFG_MONITOR_BASE@h          /* Source      Address  */
 434         ori     r4, r4, CFG_MONITOR_BASE@l
 435         lwz     r5, GOT(__init_end)
 436         sub     r5, r5, r4
 437
 438         /*
 439          * Fix GOT pointer:
 440          *
 441          * New GOT-PTR = (old GOT-PTR - CFG_MONITOR_BASE) + Destination Address
 442          *
 443          * Offset:
 444          */
 445         sub     r15, r10, r4
 446
 447         /* First our own GOT */
 448         add     r14, r14, r15
 449         /* the the one used by the C code */
 450         add     r30, r30, r15
 451
 452         /*
 453          * Now relocate code
 454          */
 455
 456         cmplw   cr1,r3,r4
 457         addi    r0,r5,3
 458         srwi.   r0,r0,2
 459         beq     cr1,4f          /* In place copy is not necessary       */
 460         beq     4f              /* Protect against 0 count              */
 461         mtctr   r0
 462         bge     cr1,2f
 463
 464         la      r8,-4(r4)
 465         la      r7,-4(r3)
 466 1:      lwzu    r0,4(r8)
 467         stwu    r0,4(r7)
 468         bdnz    1b
 469         b       4f
 470
 471 2:      slwi    r0,r0,2
 472         add     r8,r4,r0
 473         add     r7,r3,r0
 474 3:      lwzu    r0,-4(r8)
 475         stwu    r0,-4(r7)
 476         bdnz    3b
 477
 478 4:      sync
 479         isync
 480
 481 /*
 482  * We are done. Do not return, instead branch to second part of board
 483  * initialization, now running from RAM.
 484  */
 485
 486         addi    r0, r10, in_ram - _start + EXC_OFF_SYS_RESET
 487         mtlr    r0
 488         blr
 489
 490 in_ram:
 491
 492         /*
 493          * Relocation Function, r14 point to got2+0x8000
 494          *
 495          * Adjust got2 pointers, no need to check for 0, this code
 496          * already puts a few entries in the table.
 497          */
 498         li      r0,__got2_entries@sectoff@l
 499         la      r3,GOT(_GOT2_TABLE_)
 500         lwz     r11,GOT(_GOT2_TABLE_)
 501         mtctr   r0
 502         sub     r11,r3,r11
 503         addi    r3,r3,-4
 504 1:      lwzu    r0,4(r3)
 505         add     r0,r0,r11
 506         stw     r0,0(r3)
 507         bdnz    1b
 508
 509         /*
 510          * Now adjust the fixups and the pointers to the fixups
 511          * in case we need to move ourselves again.
 512          */
 513 2:      li      r0,__fixup_entries@sectoff@l
 514         lwz     r3,GOT(_FIXUP_TABLE_)
 515         cmpwi   r0,0
 516         mtctr   r0
 517         addi    r3,r3,-4
 518         beq     4f
 519 3:      lwzu    r4,4(r3)
 520         lwzux   r0,r4,r11
 521         add     r0,r0,r11
 522         stw     r10,0(r3)
 523         stw     r0,0(r4)
 524         bdnz    3b
 525 4:
 526 clear_bss:
 527         /*
 528          * Now clear BSS segment
 529          */
 530         lwz     r3,GOT(__bss_start)
 531         lwz     r4,GOT(_end)
 532         cmplw   0, r3, r4
 533         beq     6f
 534
 535         li      r0, 0
 536 5:
 537         stw     r0, 0(r3)
 538         addi    r3, r3, 4
 539         cmplw   0, r3, r4
 540         bne     5b
 541 6:
 542
 543         mr      r3, r9          /* Global Data pointer          */
 544         mr      r4, r10         /* Destination Address          */
 545         bl      board_init_r
 546
 547         /*
 548          * Copy exception vector code to low memory
 549          *
 550          * r3: dest_addr
 551          * r7: source address, r8: end address, r9: target address
 552          */
 553         .globl  trap_init
 554 trap_init:
 555         lwz     r7, GOT(_start)
 556         lwz     r8, GOT(_end_of_vectors)
 557
 558         li      r9, 0x100               /* reset vector always at 0x100 */
 559
 560         cmplw   0, r7, r8
 561         bgelr                           /* return if r7>=r8 - just in case */
 562
 563         mflr    r4                      /* save link register           */
 564 1:
 565         lwz     r0, 0(r7)
 566         stw     r0, 0(r9)
 567         addi    r7, r7, 4
 568         addi    r9, r9, 4
 569         cmplw   0, r7, r8
 570         bne     1b
 571
 572         /*
 573          * relocate `hdlr' and `int_return' entries
 574          */
 575         li      r7, .L_MachineCheck - _start + EXC_OFF_SYS_RESET
 576         li      r8, Alignment - _start + EXC_OFF_SYS_RESET
 577 2:
 578         bl      trap_reloc
 579         addi    r7, r7, 0x100           /* next exception vector        */
 580         cmplw   0, r7, r8
 581         blt     2b
 582
 583         li      r7, .L_Alignment - _start + EXC_OFF_SYS_RESET
 584         bl      trap_reloc
 585
 586         li      r7, .L_ProgramCheck - _start + EXC_OFF_SYS_RESET
 587         bl      trap_reloc
 588
 589         li      r7, .L_FPUnavailable - _start + EXC_OFF_SYS_RESET
 590         li      r8, SystemCall - _start + EXC_OFF_SYS_RESET
 591 3:
 592         bl      trap_reloc
 593         addi    r7, r7, 0x100           /* next exception vector        */
 594         cmplw   0, r7, r8
 595         blt     3b
 596
 597         li      r7, .L_SingleStep - _start + EXC_OFF_SYS_RESET
 598         li      r8, _end_of_vectors - _start + EXC_OFF_SYS_RESET
 599 4:
 600         bl      trap_reloc
 601         addi    r7, r7, 0x100           /* next exception vector        */
 602         cmplw   0, r7, r8
 603         blt     4b
 604
 605         mtlr    r4                      /* restore link register        */
 606         blr
 607
 608         /*
 609          * Function: relocate entries for one exception vector
 610          */
 611 trap_reloc:
 612         lwz     r0, 0(r7)               /* hdlr ...                     */
 613         add     r0, r0, r3              /*  ... += dest_addr            */
 614         stw     r0, 0(r7)
 615
 616         lwz     r0, 4(r7)               /* int_return ...               */
 617         add     r0, r0, r3              /*  ... += dest_addr            */
 618         stw     r0, 4(r7)
 619
 620         sync
 621         isync
 622
 623         blr