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git.ipfire.org Git - people/ms/u-boot.git/blob - cpu/mpc5xxx/cpu_init.c
2 * (C) Copyright 2000-2003
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27 DECLARE_GLOBAL_DATA_PTR
;
30 * Breath some life into the CPU...
32 * Set up the memory map,
33 * initialize a bunch of registers.
35 void cpu_init_f (void)
37 unsigned long addecr
= (1 << 25); /* Boot_CS */
38 #if defined(CFG_RAMBOOT) && defined(CONFIG_MGT5100)
39 addecr
|= (1 << 22); /* SDRAM enable */
41 /* Pointer is writable since we allocated a register for it */
42 gd
= (gd_t
*) (CFG_INIT_RAM_ADDR
+ CFG_GBL_DATA_OFFSET
);
44 /* Clear initial global data */
45 memset ((void *) gd
, 0, sizeof (gd_t
));
48 * Memory Controller: configure chip selects and enable them
50 #if defined(CFG_BOOTCS_START) && defined(CFG_BOOTCS_SIZE)
51 *(vu_long
*)MPC5XXX_BOOTCS_START
= START_REG(CFG_BOOTCS_START
);
52 *(vu_long
*)MPC5XXX_BOOTCS_STOP
= STOP_REG(CFG_BOOTCS_START
,
55 #if defined(CFG_BOOTCS_CFG)
56 *(vu_long
*)MPC5XXX_BOOTCS_CFG
= CFG_BOOTCS_CFG
;
59 #if defined(CFG_CS0_START) && defined(CFG_CS0_SIZE)
60 *(vu_long
*)MPC5XXX_CS0_START
= START_REG(CFG_CS0_START
);
61 *(vu_long
*)MPC5XXX_CS0_STOP
= STOP_REG(CFG_CS0_START
, CFG_CS0_SIZE
);
62 /* CS0 and BOOT_CS cannot be enabled at once. */
63 /* addecr |= (1 << 16); */
65 #if defined(CFG_CS0_CFG)
66 *(vu_long
*)MPC5XXX_CS0_CFG
= CFG_CS0_CFG
;
69 #if defined(CFG_CS1_START) && defined(CFG_CS1_SIZE)
70 *(vu_long
*)MPC5XXX_CS1_START
= START_REG(CFG_CS1_START
);
71 *(vu_long
*)MPC5XXX_CS1_STOP
= STOP_REG(CFG_CS1_START
, CFG_CS1_SIZE
);
74 #if defined(CFG_CS1_CFG)
75 *(vu_long
*)MPC5XXX_CS1_CFG
= CFG_CS1_CFG
;
78 #if defined(CFG_CS2_START) && defined(CFG_CS2_SIZE)
79 *(vu_long
*)MPC5XXX_CS2_START
= START_REG(CFG_CS2_START
);
80 *(vu_long
*)MPC5XXX_CS2_STOP
= STOP_REG(CFG_CS2_START
, CFG_CS2_SIZE
);
83 #if defined(CFG_CS2_CFG)
84 *(vu_long
*)MPC5XXX_CS2_CFG
= CFG_CS2_CFG
;
87 #if defined(CFG_CS3_START) && defined(CFG_CS3_SIZE)
88 *(vu_long
*)MPC5XXX_CS3_START
= START_REG(CFG_CS3_START
);
89 *(vu_long
*)MPC5XXX_CS3_STOP
= STOP_REG(CFG_CS3_START
, CFG_CS3_SIZE
);
92 #if defined(CFG_CS3_CFG)
93 *(vu_long
*)MPC5XXX_CS3_CFG
= CFG_CS3_CFG
;
96 #if defined(CFG_CS4_START) && defined(CFG_CS4_SIZE)
97 *(vu_long
*)MPC5XXX_CS4_START
= START_REG(CFG_CS4_START
);
98 *(vu_long
*)MPC5XXX_CS4_STOP
= STOP_REG(CFG_CS4_START
, CFG_CS4_SIZE
);
101 #if defined(CFG_CS4_CFG)
102 *(vu_long
*)MPC5XXX_CS4_CFG
= CFG_CS4_CFG
;
105 #if defined(CFG_CS5_START) && defined(CFG_CS5_SIZE)
106 *(vu_long
*)MPC5XXX_CS5_START
= START_REG(CFG_CS5_START
);
107 *(vu_long
*)MPC5XXX_CS5_STOP
= STOP_REG(CFG_CS5_START
, CFG_CS5_SIZE
);
110 #if defined(CFG_CS5_CFG)
111 *(vu_long
*)MPC5XXX_CS5_CFG
= CFG_CS5_CFG
;
114 #if defined(CONFIG_MPC5200)
116 #if defined(CFG_CS6_START) && defined(CFG_CS6_SIZE)
117 *(vu_long
*)MPC5XXX_CS6_START
= START_REG(CFG_CS6_START
);
118 *(vu_long
*)MPC5XXX_CS6_STOP
= STOP_REG(CFG_CS6_START
, CFG_CS6_SIZE
);
121 #if defined(CFG_CS6_CFG)
122 *(vu_long
*)MPC5XXX_CS6_CFG
= CFG_CS6_CFG
;
125 #if defined(CFG_CS7_START) && defined(CFG_CS7_SIZE)
126 *(vu_long
*)MPC5XXX_CS7_START
= START_REG(CFG_CS7_START
);
127 *(vu_long
*)MPC5XXX_CS7_STOP
= STOP_REG(CFG_CS7_START
, CFG_CS7_SIZE
);
130 #if defined(CFG_CS7_CFG)
131 *(vu_long
*)MPC5XXX_CS7_CFG
= CFG_CS7_CFG
;
134 #if defined(CFG_CS_BURST)
135 *(vu_long
*)MPC5XXX_CS_BURST
= CFG_CS_BURST
;
137 #if defined(CFG_CS_DEADCYCLE)
138 *(vu_long
*)MPC5XXX_CS_DEADCYCLE
= CFG_CS_DEADCYCLE
;
140 #endif /* CONFIG_MPC5200 */
142 /* Enable chip selects */
143 *(vu_long
*)MPC5XXX_ADDECR
= addecr
;
144 *(vu_long
*)MPC5XXX_CS_CTRL
= (1 << 24);
146 /* Setup pin multiplexing */
147 #if defined(CFG_GPS_PORT_CONFIG)
148 *(vu_long
*)MPC5XXX_GPS_PORT_CONFIG
= CFG_GPS_PORT_CONFIG
;
151 #if defined(CONFIG_MPC5200)
152 /* enable timebase */
153 *(vu_long
*)(MPC5XXX_XLBARB
+ 0x40) |= (1 << 13);
155 /* Enable snooping for RAM */
156 *(vu_long
*)(MPC5XXX_XLBARB
+ 0x40) |= (1 << 15);
157 *(vu_long
*)(MPC5XXX_XLBARB
+ 0x70) = CFG_SDRAM_BASE
| 0x1d;
159 # if defined(CFG_IPBCLK_EQUALS_XLBCLK)
160 /* Motorola reports IPB should better run at 133 MHz. */
161 *(vu_long
*)MPC5XXX_ADDECR
|= 1;
162 /* pci_clk_sel = 0x02, ipb_clk_sel = 0x00; */
163 addecr
= *(vu_long
*)MPC5XXX_CDM_CFG
;
165 # if defined(CFG_PCICLK_EQUALS_IPBCLK_DIV2)
166 /* pci_clk_sel = 0x01 -> IPB_CLK/2 */
169 /* pci_clk_sel = 0x02 -> XLB_CLK/4 = IPB_CLK/4 */
171 # endif /* CFG_PCICLK_EQUALS_IPBCLK_DIV2 */
172 *(vu_long
*)MPC5XXX_CDM_CFG
= addecr
;
173 # endif /* CFG_IPBCLK_EQUALS_XLBCLK */
174 /* Configure the XLB Arbiter */
175 *(vu_long
*)MPC5XXX_XLBARB_MPRIEN
= 0xff;
176 *(vu_long
*)MPC5XXX_XLBARB_MPRIVAL
= 0x11111111;
178 # if defined(CFG_XLB_PIPELINING)
179 /* Enable piplining */
180 *(vu_long
*)(MPC5XXX_XLBARB
+ 0x40) &= ~(1 << 31);
182 #endif /* CONFIG_MPC5200 */
186 * initialize higher level parts of CPU like time base and timers
188 int cpu_init_r (void)
190 /* mask all interrupts */
191 #if defined(CONFIG_MGT5100)
192 *(vu_long
*)MPC5XXX_ICTL_PER_MASK
= 0xfffffc00;
193 #elif defined(CONFIG_MPC5200)
194 *(vu_long
*)MPC5XXX_ICTL_PER_MASK
= 0xffffff00;
196 *(vu_long
*)MPC5XXX_ICTL_CRIT
|= 0x0001ffff;
197 *(vu_long
*)MPC5XXX_ICTL_EXT
&= ~0x00000f00;
198 /* route critical ints to normal ints */
199 *(vu_long
*)MPC5XXX_ICTL_EXT
|= 0x00000001;
201 #if defined(CONFIG_CMD_NET) && defined(CONFIG_MPC5xxx_FEC)
202 /* load FEC microcode */