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1 /*
2 * (C) Copyright 2000-2002
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * (C) Copyright 2002 (440 port)
6 * Scott McNutt, Artesyn Communication Producs, smcnutt@artsyncp.com
7 *
8 * (C) Copyright 2003 Motorola Inc. (MPC85xx port)
9 * Xianghua Xiao (X.Xiao@motorola.com)
10 *
11 * See file CREDITS for list of people who contributed to this
12 * project.
13 *
14 * This program is free software; you can redistribute it and/or
15 * modify it under the terms of the GNU General Public License as
16 * published by the Free Software Foundation; either version 2 of
17 * the License, or (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software
26 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27 * MA 02111-1307 USA
28 */
29
30 #include <common.h>
31 #include <watchdog.h>
32 #include <command.h>
33 #include <asm/processor.h>
34 #include <ppc_asm.tmpl>
35
36 unsigned decrementer_count; /* count value for 1e6/HZ microseconds */
37
38 static __inline__ unsigned long get_msr(void)
39 {
40 unsigned long msr;
41
42 asm volatile("mfmsr %0" : "=r" (msr) :);
43 return msr;
44 }
45
46 static __inline__ void set_msr(unsigned long msr)
47 {
48 asm volatile("mtmsr %0" : : "r" (msr));
49 asm volatile("isync");
50 }
51
52 static __inline__ unsigned long get_dec (void)
53 {
54 unsigned long val;
55
56 asm volatile ("mfdec %0":"=r" (val):);
57
58 return val;
59 }
60
61
62 static __inline__ void set_dec (unsigned long val)
63 {
64 if (val)
65 asm volatile ("mtdec %0"::"r" (val));
66 }
67
68 void enable_interrupts (void)
69 {
70 set_msr (get_msr() | MSR_EE);
71 }
72
73 /* returns flag if MSR_EE was set before */
74 int disable_interrupts (void)
75 {
76 ulong msr = get_msr();
77 set_msr (msr & ~MSR_EE);
78 return ((msr & MSR_EE) != 0);
79 }
80
81 int interrupt_init (void)
82 {
83 volatile ccsr_pic_t *pic = (void *)(CFG_MPC85xx_PIC_ADDR);
84
85 pic->gcr = MPC85xx_PICGCR_RST;
86 while (pic->gcr & MPC85xx_PICGCR_RST);
87 pic->gcr = MPC85xx_PICGCR_M;
88 decrementer_count = get_tbclk() / CFG_HZ;
89 mtspr(SPRN_TCR, TCR_PIE);
90 set_dec (decrementer_count);
91 set_msr (get_msr () | MSR_EE);
92
93 #ifdef CONFIG_INTERRUPTS
94 pic->iivpr1 = 0x810002; /* 50220 enable ecm interrupts */
95 debug("iivpr1@%x = %x\n",&pic->iivpr1, pic->iivpr1);
96
97 pic->iivpr2 = 0x810002; /* 50240 enable ddr interrupts */
98 debug("iivpr2@%x = %x\n",&pic->iivpr2, pic->iivpr2);
99
100 pic->iivpr3 = 0x810003; /* 50260 enable lbc interrupts */
101 debug("iivpr3@%x = %x\n",&pic->iivpr3, pic->iivpr3);
102
103 #ifdef CONFIG_PCI1
104 pic->iivpr8 = 0x810008; /* enable pci1 interrupts */
105 debug("iivpr8@%x = %x\n",&pic->iivpr8, pic->iivpr8);
106 #endif
107 #if defined(CONFIG_PCI2) || defined(CONFIG_PCIE2)
108 pic->iivpr9 = 0x810009; /* enable pci1 interrupts */
109 debug("iivpr9@%x = %x\n",&pic->iivpr9, pic->iivpr9);
110 #endif
111 #ifdef CONFIG_PCIE1
112 pic->iivpr10 = 0x81000a; /* enable pcie1 interrupts */
113 debug("iivpr10@%x = %x\n",&pic->iivpr10, pic->iivpr10);
114 #endif
115 #ifdef CONFIG_PCIE3
116 pic->iivpr11 = 0x81000b; /* enable pcie3 interrupts */
117 debug("iivpr11@%x = %x\n",&pic->iivpr11, pic->iivpr11);
118 #endif
119
120 pic->ctpr=0; /* 40080 clear current task priority register */
121 #endif
122
123 return (0);
124 }
125
126 /*
127 * Install and free a interrupt handler. Not implemented yet.
128 */
129
130 void
131 irq_install_handler(int vec, interrupt_handler_t *handler, void *arg)
132 {
133 return;
134 }
135
136 void
137 irq_free_handler(int vec)
138 {
139 return;
140 }
141
142 /****************************************************************************/
143
144
145 volatile ulong timestamp = 0;
146
147 /*
148 * timer_interrupt - gets called when the decrementer overflows,
149 * with interrupts disabled.
150 * Trivial implementation - no need to be really accurate.
151 */
152 void timer_interrupt(struct pt_regs *regs)
153 {
154 timestamp++;
155 set_dec (decrementer_count);
156 mtspr(SPRN_TSR, TSR_PIS);
157 #if defined(CONFIG_WATCHDOG)
158 if ((timestamp % 1000) == 0)
159 reset_85xx_watchdog();
160 #endif /* CONFIG_WATCHDOG */
161 }
162
163 void reset_timer (void)
164 {
165 timestamp = 0;
166 }
167
168 ulong get_timer (ulong base)
169 {
170 return (timestamp - base);
171 }
172
173 void set_timer (ulong t)
174 {
175 timestamp = t;
176 }
177
178 #if defined(CONFIG_CMD_IRQ)
179
180 /*******************************************************************************
181 *
182 * irqinfo - print information about PCI devices,not implemented.
183 *
184 */
185 int
186 do_irqinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
187 {
188 printf ("\nInterrupt-unsupported:\n");
189
190 return 0;
191 }
192
193 #endif