]>
git.ipfire.org Git - people/ms/u-boot.git/blob - cpu/mpc85xx/speed.c
2 * Copyright 2004 Freescale Semiconductor.
3 * (C) Copyright 2003 Motorola Inc.
4 * Xianghua Xiao, (X.Xiao@motorola.com)
7 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
9 * See file CREDITS for list of people who contributed to this
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29 #include <ppc_asm.tmpl>
30 #include <asm/processor.h>
32 DECLARE_GLOBAL_DATA_PTR
;
34 /* --------------------------------------------------------------- */
36 void get_sys_info (sys_info_t
* sysInfo
)
38 volatile ccsr_gur_t
*gur
= (void *)(CFG_MPC85xx_GUTS_ADDR
);
39 uint plat_ratio
,e500_ratio
,half_freqSystemBus
;
41 plat_ratio
= (gur
->porpllsr
) & 0x0000003e;
43 sysInfo
->freqSystemBus
= plat_ratio
* CONFIG_SYS_CLK_FREQ
;
44 e500_ratio
= (gur
->porpllsr
) & 0x003f0000;
47 /* Divide before multiply to avoid integer
48 * overflow for processor speeds above 2GHz */
49 half_freqSystemBus
= sysInfo
->freqSystemBus
/2;
50 sysInfo
->freqProcessor
= e500_ratio
*half_freqSystemBus
;
51 sysInfo
->freqDDRBus
= sysInfo
->freqSystemBus
;
53 #ifdef CONFIG_DDR_CLK_FREQ
55 u32 ddr_ratio
= ((gur
->porpllsr
) & 0x00003e00) >> 9;
57 sysInfo
->freqDDRBus
= ddr_ratio
* CONFIG_DDR_CLK_FREQ
;
66 #if defined(CONFIG_CPM2)
67 volatile ccsr_cpm_t
*cpm
= (ccsr_cpm_t
*)CFG_MPC85xx_CPM_ADDR
;
70 /* set VCO = 4 * BRG */
71 cpm
->im_cpm_intctl
.sccr
&= 0xfffffffc;
72 sccr
= cpm
->im_cpm_intctl
.sccr
;
73 dfbrg
= (sccr
& SCCR_DFBRG_MSK
) >> SCCR_DFBRG_SHIFT
;
75 get_sys_info (&sys_info
);
76 gd
->cpu_clk
= sys_info
.freqProcessor
;
77 gd
->bus_clk
= sys_info
.freqSystemBus
;
78 #if defined(CONFIG_CPM2)
79 gd
->vco_out
= 2*sys_info
.freqSystemBus
;
80 gd
->cpm_clk
= gd
->vco_out
/ 2;
81 gd
->scc_clk
= gd
->vco_out
/ 4;
82 gd
->brg_clk
= gd
->vco_out
/ (1 << (2 * (dfbrg
+ 1)));
85 if(gd
->cpu_clk
!= 0) return (0);
90 /********************************************
92 * return system bus freq in Hz
93 *********************************************/
94 ulong
get_bus_freq (ulong dummy
)
100 get_sys_info (&sys_info
);
101 val
= sys_info
.freqSystemBus
;
106 /********************************************
108 * return ddr bus freq in Hz
109 *********************************************/
110 ulong
get_ddr_freq (ulong dummy
)
116 get_sys_info (&sys_info
);
117 val
= sys_info
.freqDDRBus
;