cpu/sa1100/interrupts.c

   1 /*
   2  * (C) Copyright 2002
   3  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
   4  * Marius Groeger <mgroeger@sysgo.de>
   5  *
   6  * (C) Copyright 2002
   7  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
   8  * Alex Zuepke <azu@sysgo.de>
   9  *
  10  * See file CREDITS for list of people who contributed to this
  11  * project.
  12  *
  13  * This program is free software; you can redistribute it and/or
  14  * modify it under the terms of the GNU General Public License as
  15  * published by the Free Software Foundation; either version 2 of
  16  * the License, or (at your option) any later version.
  17  *
  18  * This program is distributed in the hope that it will be useful,
  19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  21  * GNU General Public License for more details.
  22  *
  23  * You should have received a copy of the GNU General Public License
  24  * along with this program; if not, write to the Free Software
  25  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  26  * MA 02111-1307 USA
  27  */
  28
  29 #include <common.h>
  30 #include <SA-1100.h>
  31
  32 #include <asm/proc-armv/ptrace.h>
  33
  34 #ifdef CONFIG_USE_IRQ
  35 /* enable IRQ/FIQ interrupts */
  36 void enable_interrupts (void)
  37 {
  38         unsigned long temp;
  39         __asm__ __volatile__ ("mrs %0, cpsr\n"
  40                               "bic %0, %0, #0x80\n"
  41                               "msr cpsr_c, %0"
  42                               : "=r" (temp)
  43                               :
  44                               : "memory");
  45 }
  46
  47
  48 /*
  49  * disable IRQ/FIQ interrupts
  50  * returns true if interrupts had been enabled before we disabled them
  51  */
  52 int disable_interrupts (void)
  53 {
  54         unsigned long old, temp;
  55         __asm__ __volatile__ ("mrs %0, cpsr\n"
  56                               "orr %1, %0, #0x80\n"
  57                               "msr cpsr_c, %1"
  58                               : "=r" (old), "=r" (temp)
  59                               :
  60                               : "memory");
  61
  62         return (old & 0x80) == 0;
  63 }
  64 #else
  65 void enable_interrupts (void)
  66 {
  67         return;
  68 }
  69 int disable_interrupts (void)
  70 {
  71         return 0;
  72 }
  73 #endif
  74
  75
  76 void bad_mode (void)
  77 {
  78         panic ("Resetting CPU ...\n");
  79         reset_cpu (0);
  80 }
  81
  82 void show_regs (struct pt_regs *regs)
  83 {
  84         unsigned long flags;
  85         const char *processor_modes[] = {
  86         "USER_26",      "FIQ_26",       "IRQ_26",       "SVC_26",
  87         "UK4_26",       "UK5_26",       "UK6_26",       "UK7_26",
  88         "UK8_26",       "UK9_26",       "UK10_26",      "UK11_26",
  89         "UK12_26",      "UK13_26",      "UK14_26",      "UK15_26",
  90         "USER_32",      "FIQ_32",       "IRQ_32",       "SVC_32",
  91         "UK4_32",       "UK5_32",       "UK6_32",       "ABT_32",
  92         "UK8_32",       "UK9_32",       "UK10_32",      "UND_32",
  93         "UK12_32",      "UK13_32",      "UK14_32",      "SYS_32"
  94         };
  95
  96         flags = condition_codes (regs);
  97
  98         printf ("pc : [<%08lx>]    lr : [<%08lx>]\n"
  99                 "sp : %08lx  ip : %08lx  fp : %08lx\n",
 100                 instruction_pointer (regs),
 101                 regs->ARM_lr, regs->ARM_sp, regs->ARM_ip, regs->ARM_fp);
 102         printf ("r10: %08lx  r9 : %08lx  r8 : %08lx\n",
 103                 regs->ARM_r10, regs->ARM_r9, regs->ARM_r8);
 104         printf ("r7 : %08lx  r6 : %08lx  r5 : %08lx  r4 : %08lx\n",
 105                 regs->ARM_r7, regs->ARM_r6, regs->ARM_r5, regs->ARM_r4);
 106         printf ("r3 : %08lx  r2 : %08lx  r1 : %08lx  r0 : %08lx\n",
 107                 regs->ARM_r3, regs->ARM_r2, regs->ARM_r1, regs->ARM_r0);
 108         printf ("Flags: %c%c%c%c",
 109                 flags & CC_N_BIT ? 'N' : 'n',
 110                 flags & CC_Z_BIT ? 'Z' : 'z',
 111                 flags & CC_C_BIT ? 'C' : 'c', flags & CC_V_BIT ? 'V' : 'v');
 112         printf ("  IRQs %s  FIQs %s  Mode %s%s\n",
 113                 interrupts_enabled (regs) ? "on" : "off",
 114                 fast_interrupts_enabled (regs) ? "on" : "off",
 115                 processor_modes[processor_mode (regs)],
 116                 thumb_mode (regs) ? " (T)" : "");
 117 }
 118
 119 void do_undefined_instruction (struct pt_regs *pt_regs)
 120 {
 121         printf ("undefined instruction\n");
 122         show_regs (pt_regs);
 123         bad_mode ();
 124 }
 125
 126 void do_software_interrupt (struct pt_regs *pt_regs)
 127 {
 128         printf ("software interrupt\n");
 129         show_regs (pt_regs);
 130         bad_mode ();
 131 }
 132
 133 void do_prefetch_abort (struct pt_regs *pt_regs)
 134 {
 135         printf ("prefetch abort\n");
 136         show_regs (pt_regs);
 137         bad_mode ();
 138 }
 139
 140 void do_data_abort (struct pt_regs *pt_regs)
 141 {
 142         printf ("data abort\n");
 143         show_regs (pt_regs);
 144         bad_mode ();
 145 }
 146
 147 void do_not_used (struct pt_regs *pt_regs)
 148 {
 149         printf ("not used\n");
 150         show_regs (pt_regs);
 151         bad_mode ();
 152 }
 153
 154 void do_fiq (struct pt_regs *pt_regs)
 155 {
 156         printf ("fast interrupt request\n");
 157         show_regs (pt_regs);
 158         bad_mode ();
 159 }
 160
 161 void do_irq (struct pt_regs *pt_regs)
 162 {
 163         printf ("interrupt request\n");
 164         show_regs (pt_regs);
 165         bad_mode ();
 166 }
 167
 168
 169 int interrupt_init (void)
 170 {
 171         /* nothing happens here - we don't setup any IRQs */
 172         return (0);
 173 }
 174
 175 void reset_timer (void)
 176 {
 177         reset_timer_masked ();
 178 }
 179
 180 ulong get_timer (ulong base)
 181 {
 182         return get_timer_masked ();
 183 }
 184
 185 void set_timer (ulong t)
 186 {
 187         /* nop */
 188 }
 189
 190 void udelay (unsigned long usec)
 191 {
 192         udelay_masked (usec);
 193 }
 194
 195
 196 void reset_timer_masked (void)
 197 {
 198         OSCR = 0;
 199 }
 200
 201 ulong get_timer_masked (void)
 202 {
 203         return OSCR;
 204 }
 205
 206 void udelay_masked (unsigned long usec)
 207 {
 208         ulong tmo;
 209
 210         tmo = usec / 1000;
 211         tmo *= CFG_HZ;
 212         tmo /= 1000;
 213
 214         reset_timer_masked ();
 215
 216         while (tmo >= get_timer_masked ())
 217                 /*NOP*/;
 218 }
 219
 220 /*
 221  * This function is derived from PowerPC code (read timebase as long long).
 222  * On ARM it just returns the timer value.
 223  */
 224 unsigned long long get_ticks(void)
 225 {
 226         return get_timer(0);
 227 }
 228
 229 /*
 230  * This function is derived from PowerPC code (timebase clock frequency).
 231  * On ARM it returns the number of timer ticks per second.
 232  */
 233 ulong get_tbclk (void)
 234 {
 235         ulong tbclk;
 236
 237         tbclk = CFG_HZ;
 238         return tbclk;
 239 }