disas.c

   1 /* General "disassemble this chunk" code.  Used for debugging. */
   2 #include "config.h"
   3 #include "qemu-common.h"
   4 #include "disas/bfd.h"
   5 #include "elf.h"
   6 #include <errno.h>
   7
   8 #include "cpu.h"
   9 #include "disas/disas.h"
  10
  11 typedef struct CPUDebug {
  12     struct disassemble_info info;
  13     CPUState *cpu;
  14 } CPUDebug;
  15
  16 /* Filled in by elfload.c.  Simplistic, but will do for now. */
  17 struct syminfo *syminfos = NULL;
  18
  19 /* Get LENGTH bytes from info's buffer, at target address memaddr.
  20    Transfer them to myaddr.  */
  21 int
  22 buffer_read_memory(bfd_vma memaddr, bfd_byte *myaddr, int length,
  23                    struct disassemble_info *info)
  24 {
  25     if (memaddr < info->buffer_vma
  26         || memaddr + length > info->buffer_vma + info->buffer_length)
  27         /* Out of bounds.  Use EIO because GDB uses it.  */
  28         return EIO;
  29     memcpy (myaddr, info->buffer + (memaddr - info->buffer_vma), length);
  30     return 0;
  31 }
  32
  33 /* Get LENGTH bytes from info's buffer, at target address memaddr.
  34    Transfer them to myaddr.  */
  35 static int
  36 target_read_memory (bfd_vma memaddr,
  37                     bfd_byte *myaddr,
  38                     int length,
  39                     struct disassemble_info *info)
  40 {
  41     CPUDebug *s = container_of(info, CPUDebug, info);
  42
  43     cpu_memory_rw_debug(s->cpu, memaddr, myaddr, length, 0);
  44     return 0;
  45 }
  46
  47 /* Print an error message.  We can assume that this is in response to
  48    an error return from buffer_read_memory.  */
  49 void
  50 perror_memory (int status, bfd_vma memaddr, struct disassemble_info *info)
  51 {
  52   if (status != EIO)
  53     /* Can't happen.  */
  54     (*info->fprintf_func) (info->stream, "Unknown error %d\n", status);
  55   else
  56     /* Actually, address between memaddr and memaddr + len was
  57        out of bounds.  */
  58     (*info->fprintf_func) (info->stream,
  59                            "Address 0x%" PRIx64 " is out of bounds.\n", memaddr);
  60 }
  61
  62 /* This could be in a separate file, to save minuscule amounts of space
  63    in statically linked executables.  */
  64
  65 /* Just print the address is hex.  This is included for completeness even
  66    though both GDB and objdump provide their own (to print symbolic
  67    addresses).  */
  68
  69 void
  70 generic_print_address (bfd_vma addr, struct disassemble_info *info)
  71 {
  72     (*info->fprintf_func) (info->stream, "0x%" PRIx64, addr);
  73 }
  74
  75 /* Print address in hex, truncated to the width of a target virtual address. */
  76 static void
  77 generic_print_target_address(bfd_vma addr, struct disassemble_info *info)
  78 {
  79     uint64_t mask = ~0ULL >> (64 - TARGET_VIRT_ADDR_SPACE_BITS);
  80     generic_print_address(addr & mask, info);
  81 }
  82
  83 /* Print address in hex, truncated to the width of a host virtual address. */
  84 static void
  85 generic_print_host_address(bfd_vma addr, struct disassemble_info *info)
  86 {
  87     uint64_t mask = ~0ULL >> (64 - (sizeof(void *) * 8));
  88     generic_print_address(addr & mask, info);
  89 }
  90
  91 /* Just return the given address.  */
  92
  93 int
  94 generic_symbol_at_address (bfd_vma addr, struct disassemble_info *info)
  95 {
  96   return 1;
  97 }
  98
  99 bfd_vma bfd_getl64 (const bfd_byte *addr)
 100 {
 101   unsigned long long v;
 102
 103   v = (unsigned long long) addr[0];
 104   v |= (unsigned long long) addr[1] << 8;
 105   v |= (unsigned long long) addr[2] << 16;
 106   v |= (unsigned long long) addr[3] << 24;
 107   v |= (unsigned long long) addr[4] << 32;
 108   v |= (unsigned long long) addr[5] << 40;
 109   v |= (unsigned long long) addr[6] << 48;
 110   v |= (unsigned long long) addr[7] << 56;
 111   return (bfd_vma) v;
 112 }
 113
 114 bfd_vma bfd_getl32 (const bfd_byte *addr)
 115 {
 116   unsigned long v;
 117
 118   v = (unsigned long) addr[0];
 119   v |= (unsigned long) addr[1] << 8;
 120   v |= (unsigned long) addr[2] << 16;
 121   v |= (unsigned long) addr[3] << 24;
 122   return (bfd_vma) v;
 123 }
 124
 125 bfd_vma bfd_getb32 (const bfd_byte *addr)
 126 {
 127   unsigned long v;
 128
 129   v = (unsigned long) addr[0] << 24;
 130   v |= (unsigned long) addr[1] << 16;
 131   v |= (unsigned long) addr[2] << 8;
 132   v |= (unsigned long) addr[3];
 133   return (bfd_vma) v;
 134 }
 135
 136 bfd_vma bfd_getl16 (const bfd_byte *addr)
 137 {
 138   unsigned long v;
 139
 140   v = (unsigned long) addr[0];
 141   v |= (unsigned long) addr[1] << 8;
 142   return (bfd_vma) v;
 143 }
 144
 145 bfd_vma bfd_getb16 (const bfd_byte *addr)
 146 {
 147   unsigned long v;
 148
 149   v = (unsigned long) addr[0] << 24;
 150   v |= (unsigned long) addr[1] << 16;
 151   return (bfd_vma) v;
 152 }
 153
 154 #ifdef TARGET_ARM
 155 static int
 156 print_insn_thumb1(bfd_vma pc, disassemble_info *info)
 157 {
 158   return print_insn_arm(pc | 1, info);
 159 }
 160 #endif
 161
 162 static int print_insn_objdump(bfd_vma pc, disassemble_info *info,
 163                               const char *prefix)
 164 {
 165     int i, n = info->buffer_length;
 166     uint8_t *buf = g_malloc(n);
 167
 168     info->read_memory_func(pc, buf, n, info);
 169
 170     for (i = 0; i < n; ++i) {
 171         if (i % 32 == 0) {
 172             info->fprintf_func(info->stream, "\n%s: ", prefix);
 173         }
 174         info->fprintf_func(info->stream, "%02x", buf[i]);
 175     }
 176
 177     g_free(buf);
 178     return n;
 179 }
 180
 181 static int print_insn_od_host(bfd_vma pc, disassemble_info *info)
 182 {
 183     return print_insn_objdump(pc, info, "OBJD-H");
 184 }
 185
 186 static int print_insn_od_target(bfd_vma pc, disassemble_info *info)
 187 {
 188     return print_insn_objdump(pc, info, "OBJD-T");
 189 }
 190
 191 /* Disassemble this for me please... (debugging). 'flags' has the following
 192    values:
 193     i386 - 1 means 16 bit code, 2 means 64 bit code
 194     arm  - bit 0 = thumb, bit 1 = reverse endian, bit 2 = A64
 195     ppc  - bits 0:15 specify (optionally) the machine instruction set;
 196            bit 16 indicates little endian.
 197     other targets - unused
 198  */
 199 void target_disas(FILE *out, CPUState *cpu, target_ulong code,
 200                   target_ulong size, int flags)
 201 {
 202     CPUClass *cc = CPU_GET_CLASS(cpu);
 203     target_ulong pc;
 204     int count;
 205     CPUDebug s;
 206
 207     INIT_DISASSEMBLE_INFO(s.info, out, fprintf);
 208
 209     s.cpu = cpu;
 210     s.info.read_memory_func = target_read_memory;
 211     s.info.buffer_vma = code;
 212     s.info.buffer_length = size;
 213     s.info.print_address_func = generic_print_target_address;
 214
 215 #ifdef TARGET_WORDS_BIGENDIAN
 216     s.info.endian = BFD_ENDIAN_BIG;
 217 #else
 218     s.info.endian = BFD_ENDIAN_LITTLE;
 219 #endif
 220
 221     if (cc->disas_set_info) {
 222         cc->disas_set_info(cpu, &s.info);
 223     }
 224
 225 #if defined(TARGET_I386)
 226     if (flags == 2) {
 227         s.info.mach = bfd_mach_x86_64;
 228     } else if (flags == 1) {
 229         s.info.mach = bfd_mach_i386_i8086;
 230     } else {
 231         s.info.mach = bfd_mach_i386_i386;
 232     }
 233     s.info.print_insn = print_insn_i386;
 234 #elif defined(TARGET_ARM)
 235     if (flags & 4) {
 236         /* We might not be compiled with the A64 disassembler
 237          * because it needs a C++ compiler; in that case we will
 238          * fall through to the default print_insn_od case.
 239          */
 240 #if defined(CONFIG_ARM_A64_DIS)
 241         s.info.print_insn = print_insn_arm_a64;
 242 #endif
 243     } else if (flags & 1) {
 244         s.info.print_insn = print_insn_thumb1;
 245     } else {
 246         s.info.print_insn = print_insn_arm;
 247     }
 248     if (flags & 2) {
 249 #ifdef TARGET_WORDS_BIGENDIAN
 250         s.info.endian = BFD_ENDIAN_LITTLE;
 251 #else
 252         s.info.endian = BFD_ENDIAN_BIG;
 253 #endif
 254     }
 255 #elif defined(TARGET_SPARC)
 256     s.info.print_insn = print_insn_sparc;
 257 #ifdef TARGET_SPARC64
 258     s.info.mach = bfd_mach_sparc_v9b;
 259 #endif
 260 #elif defined(TARGET_PPC)
 261     if ((flags >> 16) & 1) {
 262         s.info.endian = BFD_ENDIAN_LITTLE;
 263     }
 264     if (flags & 0xFFFF) {
 265         /* If we have a precise definition of the instruction set, use it. */
 266         s.info.mach = flags & 0xFFFF;
 267     } else {
 268 #ifdef TARGET_PPC64
 269         s.info.mach = bfd_mach_ppc64;
 270 #else
 271         s.info.mach = bfd_mach_ppc;
 272 #endif
 273     }
 274     s.info.disassembler_options = (char *)"any";
 275     s.info.print_insn = print_insn_ppc;
 276 #elif defined(TARGET_M68K)
 277     s.info.print_insn = print_insn_m68k;
 278 #elif defined(TARGET_MIPS)
 279 #ifdef TARGET_WORDS_BIGENDIAN
 280     s.info.print_insn = print_insn_big_mips;
 281 #else
 282     s.info.print_insn = print_insn_little_mips;
 283 #endif
 284 #elif defined(TARGET_SH4)
 285     s.info.mach = bfd_mach_sh4;
 286     s.info.print_insn = print_insn_sh;
 287 #elif defined(TARGET_ALPHA)
 288     s.info.mach = bfd_mach_alpha_ev6;
 289     s.info.print_insn = print_insn_alpha;
 290 #elif defined(TARGET_CRIS)
 291     if (flags != 32) {
 292         s.info.mach = bfd_mach_cris_v0_v10;
 293         s.info.print_insn = print_insn_crisv10;
 294     } else {
 295         s.info.mach = bfd_mach_cris_v32;
 296         s.info.print_insn = print_insn_crisv32;
 297     }
 298 #elif defined(TARGET_S390X)
 299     s.info.mach = bfd_mach_s390_64;
 300     s.info.print_insn = print_insn_s390;
 301 #elif defined(TARGET_MICROBLAZE)
 302     s.info.mach = bfd_arch_microblaze;
 303     s.info.print_insn = print_insn_microblaze;
 304 #elif defined(TARGET_MOXIE)
 305     s.info.mach = bfd_arch_moxie;
 306     s.info.print_insn = print_insn_moxie;
 307 #elif defined(TARGET_LM32)
 308     s.info.mach = bfd_mach_lm32;
 309     s.info.print_insn = print_insn_lm32;
 310 #endif
 311     if (s.info.print_insn == NULL) {
 312         s.info.print_insn = print_insn_od_target;
 313     }
 314
 315     for (pc = code; size > 0; pc += count, size -= count) {
 316         fprintf(out, "0x" TARGET_FMT_lx ":  ", pc);
 317         count = s.info.print_insn(pc, &s.info);
 318 #if 0
 319         {
 320             int i;
 321             uint8_t b;
 322             fprintf(out, " {");
 323             for(i = 0; i < count; i++) {
 324                 target_read_memory(pc + i, &b, 1, &s.info);
 325                 fprintf(out, " %02x", b);
 326             }
 327             fprintf(out, " }");
 328         }
 329 #endif
 330         fprintf(out, "\n");
 331         if (count < 0)
 332             break;
 333         if (size < count) {
 334             fprintf(out,
 335                     "Disassembler disagrees with translator over instruction "
 336                     "decoding\n"
 337                     "Please report this to qemu-devel@nongnu.org\n");
 338             break;
 339         }
 340     }
 341 }
 342
 343 /* Disassemble this for me please... (debugging). */
 344 void disas(FILE *out, void *code, unsigned long size)
 345 {
 346     uintptr_t pc;
 347     int count;
 348     CPUDebug s;
 349     int (*print_insn)(bfd_vma pc, disassemble_info *info) = NULL;
 350
 351     INIT_DISASSEMBLE_INFO(s.info, out, fprintf);
 352     s.info.print_address_func = generic_print_host_address;
 353
 354     s.info.buffer = code;
 355     s.info.buffer_vma = (uintptr_t)code;
 356     s.info.buffer_length = size;
 357
 358 #ifdef HOST_WORDS_BIGENDIAN
 359     s.info.endian = BFD_ENDIAN_BIG;
 360 #else
 361     s.info.endian = BFD_ENDIAN_LITTLE;
 362 #endif
 363 #if defined(CONFIG_TCG_INTERPRETER)
 364     print_insn = print_insn_tci;
 365 #elif defined(__i386__)
 366     s.info.mach = bfd_mach_i386_i386;
 367     print_insn = print_insn_i386;
 368 #elif defined(__x86_64__)
 369     s.info.mach = bfd_mach_x86_64;
 370     print_insn = print_insn_i386;
 371 #elif defined(_ARCH_PPC)
 372     s.info.disassembler_options = (char *)"any";
 373     print_insn = print_insn_ppc;
 374 #elif defined(__aarch64__) && defined(CONFIG_ARM_A64_DIS)
 375     print_insn = print_insn_arm_a64;
 376 #elif defined(__alpha__)
 377     print_insn = print_insn_alpha;
 378 #elif defined(__sparc__)
 379     print_insn = print_insn_sparc;
 380     s.info.mach = bfd_mach_sparc_v9b;
 381 #elif defined(__arm__)
 382     print_insn = print_insn_arm;
 383 #elif defined(__MIPSEB__)
 384     print_insn = print_insn_big_mips;
 385 #elif defined(__MIPSEL__)
 386     print_insn = print_insn_little_mips;
 387 #elif defined(__m68k__)
 388     print_insn = print_insn_m68k;
 389 #elif defined(__s390__)
 390     print_insn = print_insn_s390;
 391 #elif defined(__hppa__)
 392     print_insn = print_insn_hppa;
 393 #elif defined(__ia64__)
 394     print_insn = print_insn_ia64;
 395 #endif
 396     if (print_insn == NULL) {
 397         print_insn = print_insn_od_host;
 398     }
 399     for (pc = (uintptr_t)code; size > 0; pc += count, size -= count) {
 400         fprintf(out, "0x%08" PRIxPTR ":  ", pc);
 401         count = print_insn(pc, &s.info);
 402         fprintf(out, "\n");
 403         if (count < 0)
 404             break;
 405     }
 406 }
 407
 408 /* Look up symbol for debugging purpose.  Returns "" if unknown. */
 409 const char *lookup_symbol(target_ulong orig_addr)
 410 {
 411     const char *symbol = "";
 412     struct syminfo *s;
 413
 414     for (s = syminfos; s; s = s->next) {
 415         symbol = s->lookup_symbol(s, orig_addr);
 416         if (symbol[0] != '\0') {
 417             break;
 418         }
 419     }
 420
 421     return symbol;
 422 }
 423
 424 #if !defined(CONFIG_USER_ONLY)
 425
 426 #include "monitor/monitor.h"
 427
 428 static int monitor_disas_is_physical;
 429
 430 static int
 431 monitor_read_memory (bfd_vma memaddr, bfd_byte *myaddr, int length,
 432                      struct disassemble_info *info)
 433 {
 434     CPUDebug *s = container_of(info, CPUDebug, info);
 435
 436     if (monitor_disas_is_physical) {
 437         cpu_physical_memory_read(memaddr, myaddr, length);
 438     } else {
 439         cpu_memory_rw_debug(s->cpu, memaddr, myaddr, length, 0);
 440     }
 441     return 0;
 442 }
 443
 444 static int GCC_FMT_ATTR(2, 3)
 445 monitor_fprintf(FILE *stream, const char *fmt, ...)
 446 {
 447     va_list ap;
 448     va_start(ap, fmt);
 449     monitor_vprintf((Monitor *)stream, fmt, ap);
 450     va_end(ap);
 451     return 0;
 452 }
 453
 454 /* Disassembler for the monitor.
 455    See target_disas for a description of flags. */
 456 void monitor_disas(Monitor *mon, CPUState *cpu,
 457                    target_ulong pc, int nb_insn, int is_physical, int flags)
 458 {
 459     CPUClass *cc = CPU_GET_CLASS(cpu);
 460     int count, i;
 461     CPUDebug s;
 462
 463     INIT_DISASSEMBLE_INFO(s.info, (FILE *)mon, monitor_fprintf);
 464
 465     s.cpu = cpu;
 466     monitor_disas_is_physical = is_physical;
 467     s.info.read_memory_func = monitor_read_memory;
 468     s.info.print_address_func = generic_print_target_address;
 469
 470     s.info.buffer_vma = pc;
 471
 472 #ifdef TARGET_WORDS_BIGENDIAN
 473     s.info.endian = BFD_ENDIAN_BIG;
 474 #else
 475     s.info.endian = BFD_ENDIAN_LITTLE;
 476 #endif
 477
 478     if (cc->disas_set_info) {
 479         cc->disas_set_info(cpu, &s.info);
 480     }
 481
 482 #if defined(TARGET_I386)
 483     if (flags == 2) {
 484         s.info.mach = bfd_mach_x86_64;
 485     } else if (flags == 1) {
 486         s.info.mach = bfd_mach_i386_i8086;
 487     } else {
 488         s.info.mach = bfd_mach_i386_i386;
 489     }
 490     s.info.print_insn = print_insn_i386;
 491 #elif defined(TARGET_ARM)
 492     s.info.print_insn = print_insn_arm;
 493 #elif defined(TARGET_ALPHA)
 494     s.info.print_insn = print_insn_alpha;
 495 #elif defined(TARGET_SPARC)
 496     s.info.print_insn = print_insn_sparc;
 497 #ifdef TARGET_SPARC64
 498     s.info.mach = bfd_mach_sparc_v9b;
 499 #endif
 500 #elif defined(TARGET_PPC)
 501     if (flags & 0xFFFF) {
 502         /* If we have a precise definition of the instruction set, use it. */
 503         s.info.mach = flags & 0xFFFF;
 504     } else {
 505 #ifdef TARGET_PPC64
 506         s.info.mach = bfd_mach_ppc64;
 507 #else
 508         s.info.mach = bfd_mach_ppc;
 509 #endif
 510     }
 511     if ((flags >> 16) & 1) {
 512         s.info.endian = BFD_ENDIAN_LITTLE;
 513     }
 514     s.info.print_insn = print_insn_ppc;
 515 #elif defined(TARGET_M68K)
 516     s.info.print_insn = print_insn_m68k;
 517 #elif defined(TARGET_MIPS)
 518 #ifdef TARGET_WORDS_BIGENDIAN
 519     s.info.print_insn = print_insn_big_mips;
 520 #else
 521     s.info.print_insn = print_insn_little_mips;
 522 #endif
 523 #elif defined(TARGET_SH4)
 524     s.info.mach = bfd_mach_sh4;
 525     s.info.print_insn = print_insn_sh;
 526 #elif defined(TARGET_S390X)
 527     s.info.mach = bfd_mach_s390_64;
 528     s.info.print_insn = print_insn_s390;
 529 #elif defined(TARGET_MOXIE)
 530     s.info.mach = bfd_arch_moxie;
 531     s.info.print_insn = print_insn_moxie;
 532 #elif defined(TARGET_LM32)
 533     s.info.mach = bfd_mach_lm32;
 534     s.info.print_insn = print_insn_lm32;
 535 #endif
 536     if (!s.info.print_insn) {
 537         monitor_printf(mon, "0x" TARGET_FMT_lx
 538                        ": Asm output not supported on this arch\n", pc);
 539         return;
 540     }
 541
 542     for(i = 0; i < nb_insn; i++) {
 543         monitor_printf(mon, "0x" TARGET_FMT_lx ":  ", pc);
 544         count = s.info.print_insn(pc, &s.info);
 545         monitor_printf(mon, "\n");
 546         if (count < 0)
 547             break;
 548         pc += count;
 549     }
 550 }
 551 #endif