]> git.ipfire.org Git - people/ms/u-boot.git/blob - doc/README.cfi
powerpc/mpc85xx: SECURE BOOT- corrected CSPR settings for BSC9132QDS NAND
[people/ms/u-boot.git] / doc / README.cfi
1 The common CFI driver provides this weak default implementation for
2 flash_cmd_reset():
3
4 void __flash_cmd_reset(flash_info_t *info)
5 {
6 /*
7 * We do not yet know what kind of commandset to use, so we issue
8 * the reset command in both Intel and AMD variants, in the hope
9 * that AMD flash roms ignore the Intel command.
10 */
11 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
12 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
13 }
14 void flash_cmd_reset(flash_info_t *info)
15 __attribute__((weak,alias("__flash_cmd_reset")));
16
17
18 Some flash chips seems to have trouble with this reset sequence. In this case
19 the board specific code can override this weak default version with a board
20 specific function. For example the digsy_mtc board equipped with the M29W128GH
21 from Numonyx needs this version to function properly:
22
23 void flash_cmd_reset(flash_info_t *info)
24 {
25 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
26 }
27
28 see also:
29 http://www.mail-archive.com/u-boot@lists.denx.de/msg24368.html