doc/README.uniphier

   1 U-Boot for UniPhier SoC family
   2 ==============================
   3
   4
   5 Tested toolchains
   6 -----------------
   7
   8  (a) Ubuntu packages  (CROSS_COMPILE=arm-linux-gnueabi-)
   9
  10   If you are building U-Boot on Ubuntu, its standard package is recommended.
  11   You can install it as follows:
  12
  13     $ sudo apt-get install gcc-arm-linux-gnueabi-
  14
  15  (b) Linaro compilers  (CROSS_COMPILE=arm-linux-gnueabihf-)
  16
  17   You can download pre-built toolchains from:
  18
  19     http://www.linaro.org/downloads/
  20
  21  (c) kernel.org compilers  (CROSS_COMPILE=arm-unknown-linux-gnueabi-)
  22
  23   You can download pre-built toolchains from:
  24
  25     ftp://www.kernel.org/pub/tools/crosstool/files/bin/
  26
  27
  28 Compile the source
  29 ------------------
  30
  31 PH1-sLD3:
  32     $ make ph1_sld3_defconfig
  33     $ make CROSS_COMPILE=arm-linux-gnueabi-
  34
  35 PH1-LD4:
  36     $ make ph1_ld4_defconfig
  37     $ make CROSS_COMPILE=arm-linux-gnueabi-
  38
  39 PH1-Pro4:
  40     $ make ph1_pro4_defconfig
  41     $ make CROSS_COMPILE=arm-linux-gnueabi-
  42
  43 PH1-sLD8:
  44     $ make ph1_sld8_defconfig
  45     $ make CROSS_COMPILE=arm-linux-gnueabi-
  46
  47 PH1-Pro5:
  48     $ make ph1_pro5_defconfig
  49     $ make CROSS_COMPILE=arm-linux-gnueabi-
  50
  51 You may wish to change the "CROSS_COMPILE=arm-linux-gnueabi-"
  52 to use your favorite compiler.
  53
  54
  55 Burn U-Boot images to NAND
  56 --------------------------
  57
  58 Write two files to the NAND device as follows:
  59  - spl/u-boot-spl-dtb.bin at the offset address 0x00000000
  60  - u-boot-dtb.img         at the offset address 0x00010000
  61
  62 If a TFTP server is available, the images can be easily updated.
  63 Just copy the u-boot-spl-dtb.bin and u-boot-dtb.img to the TFTP public
  64 directory, and then run the following command at the U-Boot command line:
  65
  66   => run nandupdate
  67
  68
  69 UniPhier specific commands
  70 --------------------------
  71
  72  - pinmon (enabled by CONFIG_CMD_PINMON)
  73      shows the boot mode pins that has been latched at the power-on reset
  74
  75  - ddrphy (enabled by CONFIG_CMD_DDRPHY_DUMP)
  76      shows the DDR PHY parameters set by the PHY training
  77
  78
  79 Supported devices
  80 -----------------
  81
  82  - UART (on-chip)
  83  - NAND
  84  - USB 2.0 (EHCI)
  85  - USB 3.0 (xHCI)
  86  - LAN (on-board SMSC9118)
  87  - I2C
  88  - EEPROM (connected to the on-board I2C bus)
  89  - Support card (SRAM, NOR flash, some peripherals)
  90
  91
  92 Micro Support Card
  93 ------------------
  94
  95 The recommended bit switch settings are as follows:
  96
  97  SW2    OFF(1)/ON(0)   Description
  98  ------------------------------------------
  99  bit 1   <----         BKSZ[0]
 100  bit 2   ---->         BKSZ[1]
 101  bit 3   <----         SoC Bus Width 16/32
 102  bit 4   <----         SERIAL_SEL[0]
 103  bit 5   ---->         SERIAL_SEL[1]
 104  bit 6   ---->         BOOTSWAP_EN
 105  bit 7   <----         CS1/CS5
 106  bit 8   <----         SOC_SERIAL_DISABLE
 107
 108  SW8    OFF(1)/ON(0)   Description
 109  ------------------------------------------
 110  bit 1    ---->        CS1_SPLIT
 111  bit 2    <----        CASE9_ON
 112  bit 3    <----        CASE10_ON
 113  bit 4  Don't Care     Reserve
 114  bit 5  Don't Care     Reserve
 115  bit 6  Don't Care     Reserve
 116  bit 7    ---->        BURST_EN
 117  bit 8    ---->        FLASHBUS32_16
 118
 119 The BKSZ[1:0] specifies the address range of memory slot and peripherals
 120 as follows:
 121
 122  BKSZ    Description              RAM slot            Peripherals
 123  --------------------------------------------------------------------
 124  0b00   15MB RAM / 1MB Peri    00000000-0effffff    0f000000-0fffffff
 125  0b01   31MB RAM / 1MB Peri    00000000-1effffff    1f000000-1fffffff
 126  0b10   64MB RAM / 1MB Peri    00000000-3effffff    3f000000-3fffffff
 127  0b11  127MB RAM / 1MB Peri    00000000-7effffff    7f000000-7fffffff
 128
 129 Set BSKZ[1:0] to 0b01 for U-Boot.
 130 This mode is the most handy because EA[24] is always supported by the save pin
 131 mode of the system bus.  On the other hand, EA[25] is not supported for some
 132 newer SoCs.  Even if it is, EA[25] is not connected on most of the boards.
 133
 134 --
 135 Masahiro Yamada <yamada.masahiro@socionext.com>
 136 Aug. 2015