2 * Copyright (C) 2008,2010 Freescale Semiconductor, Inc.
3 * Dave Liu <daveliu@freescale.com>
5 * SPDX-License-Identifier: GPL-2.0+
12 #include <asm/processor.h>
13 #include <asm/fsl_serdes.h>
20 #ifndef CONFIG_SYS_SATA1_FLAGS
21 #define CONFIG_SYS_SATA1_FLAGS FLAGS_DMA
23 #ifndef CONFIG_SYS_SATA2_FLAGS
24 #define CONFIG_SYS_SATA2_FLAGS FLAGS_DMA
27 static struct fsl_sata_info fsl_sata_info
[] = {
29 {CONFIG_SYS_SATA1
, CONFIG_SYS_SATA1_FLAGS
},
34 {CONFIG_SYS_SATA2
, CONFIG_SYS_SATA2_FLAGS
},
40 static inline void sdelay(unsigned long sec
)
43 for (i
= 0; i
< sec
; i
++)
47 static void fsl_sata_dump_sfis(struct sata_fis_d2h
*s
)
49 printf("Status FIS dump:\n\r");
50 printf("fis_type: %02x\n\r", s
->fis_type
);
51 printf("pm_port_i: %02x\n\r", s
->pm_port_i
);
52 printf("status: %02x\n\r", s
->status
);
53 printf("error: %02x\n\r", s
->error
);
54 printf("lba_low: %02x\n\r", s
->lba_low
);
55 printf("lba_mid: %02x\n\r", s
->lba_mid
);
56 printf("lba_high: %02x\n\r", s
->lba_high
);
57 printf("device: %02x\n\r", s
->device
);
58 printf("lba_low_exp: %02x\n\r", s
->lba_low_exp
);
59 printf("lba_mid_exp: %02x\n\r", s
->lba_mid_exp
);
60 printf("lba_high_exp: %02x\n\r", s
->lba_high_exp
);
61 printf("res1: %02x\n\r", s
->res1
);
62 printf("sector_count: %02x\n\r", s
->sector_count
);
63 printf("sector_count_exp: %02x\n\r", s
->sector_count_exp
);
66 static int ata_wait_register(unsigned __iomem
*addr
, u32 mask
,
67 u32 val
, u32 timeout_msec
)
72 for (i
= 0; (((temp
= in_le32(addr
)) & mask
) != val
)
73 && i
< timeout_msec
; i
++)
75 return (i
< timeout_msec
) ? 0 : -1;
78 int init_sata(int dev
)
81 cmd_hdr_tbl_t
*cmd_hdr
;
84 fsl_sata_reg_t __iomem
*reg
;
89 if (dev
< 0 || dev
> (CONFIG_SYS_SATA_MAX_DEVICE
- 1)) {
90 printf("the sata index %d is out of ranges\n\r", dev
);
95 if ((dev
== 0) && (!is_serdes_configured(SATA1
))) {
96 printf("SATA%d [dev = %d] is not enabled\n", dev
+1, dev
);
99 if ((dev
== 1) && (!is_serdes_configured(SATA2
))) {
100 printf("SATA%d [dev = %d] is not enabled\n", dev
+1, dev
);
105 /* Allocate SATA device driver struct */
106 sata
= (fsl_sata_t
*)malloc(sizeof(fsl_sata_t
));
108 printf("alloc the sata device struct failed\n\r");
111 /* Zero all of the device driver struct */
112 memset((void *)sata
, 0, sizeof(fsl_sata_t
));
114 /* Save the private struct to block device struct */
115 sata_dev_desc
[dev
].priv
= (void *)sata
;
117 snprintf(sata
->name
, 12, "SATA%d", dev
);
119 /* Set the controller register base address to device struct */
120 reg
= (fsl_sata_reg_t
*)(fsl_sata_info
[dev
].sata_reg_base
);
121 sata
->reg_base
= reg
;
123 /* Allocate the command header table, 4 bytes aligned */
124 length
= sizeof(struct cmd_hdr_tbl
);
125 align
= SATA_HC_CMD_HDR_TBL_ALIGN
;
126 sata
->cmd_hdr_tbl_offset
= (void *)malloc(length
+ align
);
127 if (!sata
->cmd_hdr_tbl_offset
) {
128 printf("alloc the command header failed\n\r");
132 cmd_hdr
= (cmd_hdr_tbl_t
*)(((u32
)sata
->cmd_hdr_tbl_offset
+ align
)
134 sata
->cmd_hdr
= cmd_hdr
;
136 /* Zero all of the command header table */
137 memset((void *)sata
->cmd_hdr_tbl_offset
, 0, length
+ align
);
139 /* Allocate command descriptor for all command */
140 length
= sizeof(struct cmd_desc
) * SATA_HC_MAX_CMD
;
141 align
= SATA_HC_CMD_DESC_ALIGN
;
142 sata
->cmd_desc_offset
= (void *)malloc(length
+ align
);
143 if (!sata
->cmd_desc_offset
) {
144 printf("alloc the command descriptor failed\n\r");
147 sata
->cmd_desc
= (cmd_desc_t
*)(((u32
)sata
->cmd_desc_offset
+ align
)
149 /* Zero all of command descriptor */
150 memset((void *)sata
->cmd_desc_offset
, 0, length
+ align
);
152 /* Link the command descriptor to command header */
153 for (i
= 0; i
< SATA_HC_MAX_CMD
; i
++) {
154 cda
= ((u32
)sata
->cmd_desc
+ SATA_HC_CMD_DESC_SIZE
* i
)
155 & ~(CMD_HDR_CDA_ALIGN
- 1);
156 cmd_hdr
->cmd_slot
[i
].cda
= cpu_to_le32(cda
);
159 /* To have safe state, force the controller offline */
160 val32
= in_le32(®
->hcontrol
);
161 val32
&= ~HCONTROL_ONOFF
;
162 val32
|= HCONTROL_FORCE_OFFLINE
;
163 out_le32(®
->hcontrol
, val32
);
165 /* Wait the controller offline */
166 ata_wait_register(®
->hstatus
, HSTATUS_ONOFF
, 0, 1000);
168 /* Set the command header base address to CHBA register to tell DMA */
169 out_le32(®
->chba
, (u32
)cmd_hdr
& ~0x3);
171 /* Snoop for the command header */
172 val32
= in_le32(®
->hcontrol
);
173 val32
|= HCONTROL_HDR_SNOOP
;
174 out_le32(®
->hcontrol
, val32
);
176 /* Disable all of interrupts */
177 val32
= in_le32(®
->hcontrol
);
178 val32
&= ~HCONTROL_INT_EN_ALL
;
179 out_le32(®
->hcontrol
, val32
);
181 /* Clear all of interrupts */
182 val32
= in_le32(®
->hstatus
);
183 out_le32(®
->hstatus
, val32
);
185 /* Set the ICC, no interrupt coalescing */
186 out_le32(®
->icc
, 0x01000000);
188 /* No PM attatched, the SATA device direct connect */
189 out_le32(®
->cqpmp
, 0);
191 /* Clear SError register */
192 val32
= in_le32(®
->serror
);
193 out_le32(®
->serror
, val32
);
195 /* Clear CER register */
196 val32
= in_le32(®
->cer
);
197 out_le32(®
->cer
, val32
);
199 /* Clear DER register */
200 val32
= in_le32(®
->der
);
201 out_le32(®
->der
, val32
);
203 /* No device detection or initialization action requested */
204 out_le32(®
->scontrol
, 0x00000300);
206 /* Configure the transport layer, default value */
207 out_le32(®
->transcfg
, 0x08000016);
209 /* Configure the link layer, default value */
210 out_le32(®
->linkcfg
, 0x0000ff34);
212 /* Bring the controller online */
213 val32
= in_le32(®
->hcontrol
);
214 val32
|= HCONTROL_ONOFF
;
215 out_le32(®
->hcontrol
, val32
);
219 /* print sata device name */
221 printf("%s ", sata
->name
);
223 printf(" %s ", sata
->name
);
225 /* Wait PHY RDY signal changed for 500ms */
226 ata_wait_register(®
->hstatus
, HSTATUS_PHY_RDY
,
227 HSTATUS_PHY_RDY
, 500);
230 val32
= in_le32(®
->hstatus
);
231 if (val32
& HSTATUS_PHY_RDY
) {
235 printf("(No RDY)\n\r");
239 /* Wait for signature updated, which is 1st D2H */
240 ata_wait_register(®
->hstatus
, HSTATUS_SIGNATURE
,
241 HSTATUS_SIGNATURE
, 10000);
243 if (val32
& HSTATUS_SIGNATURE
) {
244 sig
= in_le32(®
->sig
);
245 debug("Signature updated, the sig =%08x\n\r", sig
);
246 sata
->ata_device_type
= ata_dev_classify(sig
);
249 /* Check the speed */
250 val32
= in_le32(®
->sstatus
);
251 if ((val32
& SSTATUS_SPD_MASK
) == SSTATUS_SPD_GEN1
)
252 printf("(1.5 Gbps)\n\r");
253 else if ((val32
& SSTATUS_SPD_MASK
) == SSTATUS_SPD_GEN2
)
254 printf("(3 Gbps)\n\r");
259 int reset_sata(int dev
)
264 static void fsl_sata_dump_regs(fsl_sata_reg_t __iomem
*reg
)
266 printf("\n\rSATA: %08x\n\r", (u32
)reg
);
267 printf("CQR: %08x\n\r", in_le32(®
->cqr
));
268 printf("CAR: %08x\n\r", in_le32(®
->car
));
269 printf("CCR: %08x\n\r", in_le32(®
->ccr
));
270 printf("CER: %08x\n\r", in_le32(®
->cer
));
271 printf("CQR: %08x\n\r", in_le32(®
->cqr
));
272 printf("DER: %08x\n\r", in_le32(®
->der
));
273 printf("CHBA: %08x\n\r", in_le32(®
->chba
));
274 printf("HStatus: %08x\n\r", in_le32(®
->hstatus
));
275 printf("HControl: %08x\n\r", in_le32(®
->hcontrol
));
276 printf("CQPMP: %08x\n\r", in_le32(®
->cqpmp
));
277 printf("SIG: %08x\n\r", in_le32(®
->sig
));
278 printf("ICC: %08x\n\r", in_le32(®
->icc
));
279 printf("SStatus: %08x\n\r", in_le32(®
->sstatus
));
280 printf("SError: %08x\n\r", in_le32(®
->serror
));
281 printf("SControl: %08x\n\r", in_le32(®
->scontrol
));
282 printf("SNotification: %08x\n\r", in_le32(®
->snotification
));
283 printf("TransCfg: %08x\n\r", in_le32(®
->transcfg
));
284 printf("TransStatus: %08x\n\r", in_le32(®
->transstatus
));
285 printf("LinkCfg: %08x\n\r", in_le32(®
->linkcfg
));
286 printf("LinkCfg1: %08x\n\r", in_le32(®
->linkcfg1
));
287 printf("LinkCfg2: %08x\n\r", in_le32(®
->linkcfg2
));
288 printf("LinkStatus: %08x\n\r", in_le32(®
->linkstatus
));
289 printf("LinkStatus1: %08x\n\r", in_le32(®
->linkstatus1
));
290 printf("PhyCtrlCfg: %08x\n\r", in_le32(®
->phyctrlcfg
));
291 printf("SYSPR: %08x\n\r", in_be32(®
->syspr
));
294 static int fsl_ata_exec_ata_cmd(struct fsl_sata
*sata
, struct sata_fis_h2d
*cfis
,
295 int is_ncq
, int tag
, u8
*buffer
, u32 len
)
297 cmd_hdr_entry_t
*cmd_hdr
;
298 cmd_desc_t
*cmd_desc
;
305 fsl_sata_reg_t __iomem
*reg
= sata
->reg_base
;
308 /* Check xfer length */
309 if (len
> SATA_HC_MAX_XFER_LEN
) {
310 printf("max transfer length is 64MB\n\r");
314 /* Setup the command descriptor */
315 cmd_desc
= sata
->cmd_desc
+ tag
;
317 /* Get the pointer cfis of command descriptor */
318 h2d
= (sata_fis_h2d_t
*)cmd_desc
->cfis
;
320 /* Zero the cfis of command descriptor */
321 memset((void *)h2d
, 0, SATA_HC_CMD_DESC_CFIS_SIZE
);
323 /* Copy the cfis from user to command descriptor */
324 h2d
->fis_type
= cfis
->fis_type
;
325 h2d
->pm_port_c
= cfis
->pm_port_c
;
326 h2d
->command
= cfis
->command
;
328 h2d
->features
= cfis
->features
;
329 h2d
->features_exp
= cfis
->features_exp
;
331 h2d
->lba_low
= cfis
->lba_low
;
332 h2d
->lba_mid
= cfis
->lba_mid
;
333 h2d
->lba_high
= cfis
->lba_high
;
334 h2d
->lba_low_exp
= cfis
->lba_low_exp
;
335 h2d
->lba_mid_exp
= cfis
->lba_mid_exp
;
336 h2d
->lba_high_exp
= cfis
->lba_high_exp
;
339 h2d
->sector_count
= cfis
->sector_count
;
340 h2d
->sector_count_exp
= cfis
->sector_count_exp
;
342 h2d
->sector_count
= (u8
)(tag
<< 3);
345 h2d
->device
= cfis
->device
;
346 h2d
->control
= cfis
->control
;
348 /* Setup the PRD table */
349 prde
= (prd_entry_t
*)cmd_desc
->prdt
;
350 memset((void *)prde
, 0, sizeof(struct prdt
));
354 for (i
= 0; i
< SATA_HC_MAX_PRD_DIRECT
; i
++) {
357 prde
->dba
= cpu_to_le32((u32
)buffer
& ~0x3);
358 debug("dba = %08x\n\r", (u32
)buffer
);
360 if (len
< PRD_ENTRY_MAX_XFER_SZ
) {
361 ext_c_ddc
= PRD_ENTRY_DATA_SNOOP
| len
;
362 debug("ext_c_ddc1 = %08x, len = %08x\n\r", ext_c_ddc
, len
);
363 prde
->ext_c_ddc
= cpu_to_le32(ext_c_ddc
);
368 ext_c_ddc
= PRD_ENTRY_DATA_SNOOP
; /* 4M bytes */
369 debug("ext_c_ddc2 = %08x, len = %08x\n\r", ext_c_ddc
, len
);
370 prde
->ext_c_ddc
= cpu_to_le32(ext_c_ddc
);
371 buffer
+= PRD_ENTRY_MAX_XFER_SZ
;
372 len
-= PRD_ENTRY_MAX_XFER_SZ
;
378 /* Setup the command slot of cmd hdr */
379 cmd_hdr
= (cmd_hdr_entry_t
*)&sata
->cmd_hdr
->cmd_slot
[tag
];
381 cmd_hdr
->cda
= cpu_to_le32((u32
)cmd_desc
& ~0x3);
383 val32
= prde_count
<< CMD_HDR_PRD_ENTRY_SHIFT
;
384 val32
|= sizeof(sata_fis_h2d_t
);
385 cmd_hdr
->prde_fis_len
= cpu_to_le32(val32
);
387 cmd_hdr
->ttl
= cpu_to_le32(ttl
);
390 val32
= CMD_HDR_ATTR_RES
| CMD_HDR_ATTR_SNOOP
;
392 val32
= CMD_HDR_ATTR_RES
| CMD_HDR_ATTR_SNOOP
| CMD_HDR_ATTR_FPDMA
;
395 tag
&= CMD_HDR_ATTR_TAG
;
398 debug("attribute = %08x\n\r", val32
);
399 cmd_hdr
->attribute
= cpu_to_le32(val32
);
401 /* Make sure cmd desc and cmd slot valid before command issue */
405 val32
= (u32
)(h2d
->pm_port_c
& 0x0f);
406 out_le32(®
->cqpmp
, val32
);
409 if (ata_wait_register(®
->car
, (1 << tag
), 0, 10000))
410 printf("Wait no active time out\n\r");
413 if (!(in_le32(®
->cqr
) & (1 << tag
))) {
415 out_le32(®
->cqr
, val32
);
418 /* Wait command completed for 10s */
419 if (ata_wait_register(®
->ccr
, (1 << tag
), (1 << tag
), 10000)) {
421 printf("Non-NCQ command time out\n\r");
423 printf("NCQ command time out\n\r");
426 val32
= in_le32(®
->cer
);
430 fsl_sata_dump_sfis((struct sata_fis_d2h
*)cmd_desc
->sfis
);
431 printf("CE at device\n\r");
432 fsl_sata_dump_regs(reg
);
433 der
= in_le32(®
->der
);
434 out_le32(®
->cer
, val32
);
435 out_le32(®
->der
, der
);
438 /* Clear complete flags */
439 val32
= in_le32(®
->ccr
);
440 out_le32(®
->ccr
, val32
);
445 static int fsl_ata_exec_reset_cmd(struct fsl_sata
*sata
, struct sata_fis_h2d
*cfis
,
446 int tag
, u8
*buffer
, u32 len
)
451 static int fsl_sata_exec_cmd(struct fsl_sata
*sata
, struct sata_fis_h2d
*cfis
,
452 enum cmd_type command_type
, int tag
, u8
*buffer
, u32 len
)
456 if (tag
> SATA_HC_MAX_CMD
|| tag
< 0) {
457 printf("tag is out of range, tag=%d\n\r", tag
);
461 switch (command_type
) {
463 rc
= fsl_ata_exec_ata_cmd(sata
, cfis
, 0, tag
, buffer
, len
);
466 rc
= fsl_ata_exec_reset_cmd(sata
, cfis
, tag
, buffer
, len
);
469 rc
= fsl_ata_exec_ata_cmd(sata
, cfis
, 1, tag
, buffer
, len
);
472 case CMD_VENDOR_BIST
:
474 printf("not support now\n\r");
483 static void fsl_sata_identify(int dev
, u16
*id
)
485 fsl_sata_t
*sata
= (fsl_sata_t
*)sata_dev_desc
[dev
].priv
;
486 struct sata_fis_h2d h2d
, *cfis
= &h2d
;
488 memset(cfis
, 0, sizeof(struct sata_fis_h2d
));
490 cfis
->fis_type
= SATA_FIS_TYPE_REGISTER_H2D
;
491 cfis
->pm_port_c
= 0x80; /* is command */
492 cfis
->command
= ATA_CMD_ID_ATA
;
494 fsl_sata_exec_cmd(sata
, cfis
, CMD_ATA
, 0, (u8
*)id
, ATA_ID_WORDS
* 2);
495 ata_swap_buf_le16(id
, ATA_ID_WORDS
);
498 static void fsl_sata_xfer_mode(int dev
, u16
*id
)
500 fsl_sata_t
*sata
= (fsl_sata_t
*)sata_dev_desc
[dev
].priv
;
502 sata
->pio
= id
[ATA_ID_PIO_MODES
];
503 sata
->mwdma
= id
[ATA_ID_MWDMA_MODES
];
504 sata
->udma
= id
[ATA_ID_UDMA_MODES
];
505 debug("pio %04x, mwdma %04x, udma %04x\n\r", sata
->pio
, sata
->mwdma
, sata
->udma
);
508 static void fsl_sata_set_features(int dev
)
510 fsl_sata_t
*sata
= (fsl_sata_t
*)sata_dev_desc
[dev
].priv
;
511 struct sata_fis_h2d h2d
, *cfis
= &h2d
;
514 memset(cfis
, 0, sizeof(struct sata_fis_h2d
));
516 cfis
->fis_type
= SATA_FIS_TYPE_REGISTER_H2D
;
517 cfis
->pm_port_c
= 0x80; /* is command */
518 cfis
->command
= ATA_CMD_SET_FEATURES
;
519 cfis
->features
= SETFEATURES_XFER
;
521 /* First check the device capablity */
522 udma_cap
= (u8
)(sata
->udma
& 0xff);
523 debug("udma_cap %02x\n\r", udma_cap
);
525 if (udma_cap
== ATA_UDMA6
)
526 cfis
->sector_count
= XFER_UDMA_6
;
527 if (udma_cap
== ATA_UDMA5
)
528 cfis
->sector_count
= XFER_UDMA_5
;
529 if (udma_cap
== ATA_UDMA4
)
530 cfis
->sector_count
= XFER_UDMA_4
;
531 if (udma_cap
== ATA_UDMA3
)
532 cfis
->sector_count
= XFER_UDMA_3
;
534 fsl_sata_exec_cmd(sata
, cfis
, CMD_ATA
, 0, NULL
, 0);
537 static u32
fsl_sata_rw_cmd(int dev
, u32 start
, u32 blkcnt
, u8
*buffer
, int is_write
)
539 fsl_sata_t
*sata
= (fsl_sata_t
*)sata_dev_desc
[dev
].priv
;
540 struct sata_fis_h2d h2d
, *cfis
= &h2d
;
545 memset(cfis
, 0, sizeof(struct sata_fis_h2d
));
547 cfis
->fis_type
= SATA_FIS_TYPE_REGISTER_H2D
;
548 cfis
->pm_port_c
= 0x80; /* is command */
549 cfis
->command
= (is_write
) ? ATA_CMD_WRITE
: ATA_CMD_READ
;
550 cfis
->device
= ATA_LBA
;
552 cfis
->device
|= (block
>> 24) & 0xf;
553 cfis
->lba_high
= (block
>> 16) & 0xff;
554 cfis
->lba_mid
= (block
>> 8) & 0xff;
555 cfis
->lba_low
= block
& 0xff;
556 cfis
->sector_count
= (u8
)(blkcnt
& 0xff);
558 fsl_sata_exec_cmd(sata
, cfis
, CMD_ATA
, 0, buffer
, ATA_SECT_SIZE
* blkcnt
);
562 static void fsl_sata_flush_cache(int dev
)
564 fsl_sata_t
*sata
= (fsl_sata_t
*)sata_dev_desc
[dev
].priv
;
565 struct sata_fis_h2d h2d
, *cfis
= &h2d
;
567 memset(cfis
, 0, sizeof(struct sata_fis_h2d
));
569 cfis
->fis_type
= SATA_FIS_TYPE_REGISTER_H2D
;
570 cfis
->pm_port_c
= 0x80; /* is command */
571 cfis
->command
= ATA_CMD_FLUSH
;
573 fsl_sata_exec_cmd(sata
, cfis
, CMD_ATA
, 0, NULL
, 0);
576 static u32
fsl_sata_rw_cmd_ext(int dev
, u32 start
, u32 blkcnt
, u8
*buffer
, int is_write
)
578 fsl_sata_t
*sata
= (fsl_sata_t
*)sata_dev_desc
[dev
].priv
;
579 struct sata_fis_h2d h2d
, *cfis
= &h2d
;
584 memset(cfis
, 0, sizeof(struct sata_fis_h2d
));
586 cfis
->fis_type
= SATA_FIS_TYPE_REGISTER_H2D
;
587 cfis
->pm_port_c
= 0x80; /* is command */
589 cfis
->command
= (is_write
) ? ATA_CMD_WRITE_EXT
592 cfis
->lba_high_exp
= (block
>> 40) & 0xff;
593 cfis
->lba_mid_exp
= (block
>> 32) & 0xff;
594 cfis
->lba_low_exp
= (block
>> 24) & 0xff;
595 cfis
->lba_high
= (block
>> 16) & 0xff;
596 cfis
->lba_mid
= (block
>> 8) & 0xff;
597 cfis
->lba_low
= block
& 0xff;
598 cfis
->device
= ATA_LBA
;
599 cfis
->sector_count_exp
= (blkcnt
>> 8) & 0xff;
600 cfis
->sector_count
= blkcnt
& 0xff;
602 fsl_sata_exec_cmd(sata
, cfis
, CMD_ATA
, 0, buffer
, ATA_SECT_SIZE
* blkcnt
);
606 static u32
fsl_sata_rw_ncq_cmd(int dev
, u32 start
, u32 blkcnt
, u8
*buffer
,
609 fsl_sata_t
*sata
= (fsl_sata_t
*)sata_dev_desc
[dev
].priv
;
610 struct sata_fis_h2d h2d
, *cfis
= &h2d
;
614 if (sata
->lba48
!= 1) {
615 printf("execute FPDMA command on non-LBA48 hard disk\n\r");
621 memset(cfis
, 0, sizeof(struct sata_fis_h2d
));
623 cfis
->fis_type
= SATA_FIS_TYPE_REGISTER_H2D
;
624 cfis
->pm_port_c
= 0x80; /* is command */
626 cfis
->command
= (is_write
) ? ATA_CMD_FPDMA_WRITE
627 : ATA_CMD_FPDMA_READ
;
629 cfis
->lba_high_exp
= (block
>> 40) & 0xff;
630 cfis
->lba_mid_exp
= (block
>> 32) & 0xff;
631 cfis
->lba_low_exp
= (block
>> 24) & 0xff;
632 cfis
->lba_high
= (block
>> 16) & 0xff;
633 cfis
->lba_mid
= (block
>> 8) & 0xff;
634 cfis
->lba_low
= block
& 0xff;
636 cfis
->device
= ATA_LBA
;
637 cfis
->features_exp
= (blkcnt
>> 8) & 0xff;
638 cfis
->features
= blkcnt
& 0xff;
640 if (sata
->queue_depth
>= SATA_HC_MAX_CMD
)
641 ncq_channel
= SATA_HC_MAX_CMD
- 1;
643 ncq_channel
= sata
->queue_depth
- 1;
645 /* Use the latest queue */
646 fsl_sata_exec_cmd(sata
, cfis
, CMD_NCQ
, ncq_channel
, buffer
, ATA_SECT_SIZE
* blkcnt
);
650 static void fsl_sata_flush_cache_ext(int dev
)
652 fsl_sata_t
*sata
= (fsl_sata_t
*)sata_dev_desc
[dev
].priv
;
653 struct sata_fis_h2d h2d
, *cfis
= &h2d
;
655 memset(cfis
, 0, sizeof(struct sata_fis_h2d
));
657 cfis
->fis_type
= SATA_FIS_TYPE_REGISTER_H2D
;
658 cfis
->pm_port_c
= 0x80; /* is command */
659 cfis
->command
= ATA_CMD_FLUSH_EXT
;
661 fsl_sata_exec_cmd(sata
, cfis
, CMD_ATA
, 0, NULL
, 0);
664 static void fsl_sata_init_wcache(int dev
, u16
*id
)
666 fsl_sata_t
*sata
= (fsl_sata_t
*)sata_dev_desc
[dev
].priv
;
668 if (ata_id_has_wcache(id
) && ata_id_wcache_enabled(id
))
670 if (ata_id_has_flush(id
))
672 if (ata_id_has_flush_ext(id
))
676 static int fsl_sata_get_wcache(int dev
)
678 fsl_sata_t
*sata
= (fsl_sata_t
*)sata_dev_desc
[dev
].priv
;
682 static int fsl_sata_get_flush(int dev
)
684 fsl_sata_t
*sata
= (fsl_sata_t
*)sata_dev_desc
[dev
].priv
;
688 static int fsl_sata_get_flush_ext(int dev
)
690 fsl_sata_t
*sata
= (fsl_sata_t
*)sata_dev_desc
[dev
].priv
;
691 return sata
->flush_ext
;
694 static u32
ata_low_level_rw_lba48(int dev
, u32 blknr
, lbaint_t blkcnt
,
695 const void *buffer
, int is_write
)
705 max_blks
= ATA_MAX_SECTORS_LBA48
;
707 if (blks
> max_blks
) {
708 if (fsl_sata_info
[dev
].flags
!= FLAGS_FPDMA
)
709 fsl_sata_rw_cmd_ext(dev
, start
, max_blks
, addr
, is_write
);
711 fsl_sata_rw_ncq_cmd(dev
, start
, max_blks
, addr
, is_write
);
714 addr
+= ATA_SECT_SIZE
* max_blks
;
716 if (fsl_sata_info
[dev
].flags
!= FLAGS_FPDMA
)
717 fsl_sata_rw_cmd_ext(dev
, start
, blks
, addr
, is_write
);
719 fsl_sata_rw_ncq_cmd(dev
, start
, blks
, addr
, is_write
);
722 addr
+= ATA_SECT_SIZE
* blks
;
729 static u32
ata_low_level_rw_lba28(int dev
, u32 blknr
, u32 blkcnt
,
730 const void *buffer
, int is_write
)
740 max_blks
= ATA_MAX_SECTORS
;
742 if (blks
> max_blks
) {
743 fsl_sata_rw_cmd(dev
, start
, max_blks
, addr
, is_write
);
746 addr
+= ATA_SECT_SIZE
* max_blks
;
748 fsl_sata_rw_cmd(dev
, start
, blks
, addr
, is_write
);
751 addr
+= ATA_SECT_SIZE
* blks
;
759 * SATA interface between low level driver and command layer
761 ulong
sata_read(int dev
, ulong blknr
, lbaint_t blkcnt
, void *buffer
)
764 fsl_sata_t
*sata
= (fsl_sata_t
*)sata_dev_desc
[dev
].priv
;
767 rc
= ata_low_level_rw_lba48(dev
, blknr
, blkcnt
, buffer
, READ_CMD
);
769 rc
= ata_low_level_rw_lba28(dev
, blknr
, blkcnt
, buffer
, READ_CMD
);
773 ulong
sata_write(int dev
, ulong blknr
, lbaint_t blkcnt
, const void *buffer
)
776 fsl_sata_t
*sata
= (fsl_sata_t
*)sata_dev_desc
[dev
].priv
;
779 rc
= ata_low_level_rw_lba48(dev
, blknr
, blkcnt
, buffer
, WRITE_CMD
);
780 if (fsl_sata_get_wcache(dev
) && fsl_sata_get_flush_ext(dev
))
781 fsl_sata_flush_cache_ext(dev
);
783 rc
= ata_low_level_rw_lba28(dev
, blknr
, blkcnt
, buffer
, WRITE_CMD
);
784 if (fsl_sata_get_wcache(dev
) && fsl_sata_get_flush(dev
))
785 fsl_sata_flush_cache(dev
);
790 int scan_sata(int dev
)
792 fsl_sata_t
*sata
= (fsl_sata_t
*)sata_dev_desc
[dev
].priv
;
793 unsigned char serial
[ATA_ID_SERNO_LEN
+ 1];
794 unsigned char firmware
[ATA_ID_FW_REV_LEN
+ 1];
795 unsigned char product
[ATA_ID_PROD_LEN
+ 1];
799 /* if no detected link */
803 id
= (u16
*)malloc(ATA_ID_WORDS
* 2);
805 printf("id malloc failed\n\r");
809 /* Identify device to get information */
810 fsl_sata_identify(dev
, id
);
813 ata_id_c_string(id
, serial
, ATA_ID_SERNO
, sizeof(serial
));
814 memcpy(sata_dev_desc
[dev
].product
, serial
, sizeof(serial
));
816 /* Firmware version */
817 ata_id_c_string(id
, firmware
, ATA_ID_FW_REV
, sizeof(firmware
));
818 memcpy(sata_dev_desc
[dev
].revision
, firmware
, sizeof(firmware
));
821 ata_id_c_string(id
, product
, ATA_ID_PROD
, sizeof(product
));
822 memcpy(sata_dev_desc
[dev
].vendor
, product
, sizeof(product
));
825 n_sectors
= ata_id_n_sectors(id
);
826 sata_dev_desc
[dev
].lba
= (u32
)n_sectors
;
829 /* Check if support LBA48 */
830 if (ata_id_has_lba48(id
)) {
832 debug("Device support LBA48\n\r");
834 debug("Device supports LBA28\n\r");
837 /* Get the NCQ queue depth from device */
838 sata
->queue_depth
= ata_id_queue_depth(id
);
840 /* Get the xfer mode from device */
841 fsl_sata_xfer_mode(dev
, id
);
843 /* Get the write cache status from device */
844 fsl_sata_init_wcache(dev
, id
);
846 /* Set the xfer mode to highest speed */
847 fsl_sata_set_features(dev
);
849 fsl_sata_identify(dev
, id
);