2 * libata-sff.c - helper library for PCI IDE BMDMA
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
8 * Copyright 2003-2006 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2006 Jeff Garzik
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
35 #include <linux/kernel.h>
36 #include <linux/gfp.h>
37 #include <linux/pci.h>
38 #include <linux/libata.h>
39 #include <linux/highmem.h>
43 const struct ata_port_operations ata_sff_port_ops
= {
44 .inherits
= &ata_base_port_ops
,
46 .qc_prep
= ata_sff_qc_prep
,
47 .qc_issue
= ata_sff_qc_issue
,
48 .qc_fill_rtf
= ata_sff_qc_fill_rtf
,
50 .freeze
= ata_sff_freeze
,
52 .prereset
= ata_sff_prereset
,
53 .softreset
= ata_sff_softreset
,
54 .hardreset
= sata_sff_hardreset
,
55 .postreset
= ata_sff_postreset
,
56 .drain_fifo
= ata_sff_drain_fifo
,
57 .error_handler
= ata_sff_error_handler
,
58 .post_internal_cmd
= ata_sff_post_internal_cmd
,
60 .sff_dev_select
= ata_sff_dev_select
,
61 .sff_check_status
= ata_sff_check_status
,
62 .sff_tf_load
= ata_sff_tf_load
,
63 .sff_tf_read
= ata_sff_tf_read
,
64 .sff_exec_command
= ata_sff_exec_command
,
65 .sff_data_xfer
= ata_sff_data_xfer
,
66 .sff_irq_on
= ata_sff_irq_on
,
67 .sff_irq_clear
= ata_sff_irq_clear
,
69 .lost_interrupt
= ata_sff_lost_interrupt
,
71 .port_start
= ata_sff_port_start
,
73 EXPORT_SYMBOL_GPL(ata_sff_port_ops
);
75 const struct ata_port_operations ata_bmdma_port_ops
= {
76 .inherits
= &ata_sff_port_ops
,
78 .mode_filter
= ata_bmdma_mode_filter
,
80 .bmdma_setup
= ata_bmdma_setup
,
81 .bmdma_start
= ata_bmdma_start
,
82 .bmdma_stop
= ata_bmdma_stop
,
83 .bmdma_status
= ata_bmdma_status
,
85 EXPORT_SYMBOL_GPL(ata_bmdma_port_ops
);
87 const struct ata_port_operations ata_bmdma32_port_ops
= {
88 .inherits
= &ata_bmdma_port_ops
,
90 .sff_data_xfer
= ata_sff_data_xfer32
,
91 .port_start
= ata_sff_port_start32
,
93 EXPORT_SYMBOL_GPL(ata_bmdma32_port_ops
);
96 * ata_fill_sg - Fill PCI IDE PRD table
97 * @qc: Metadata associated with taskfile to be transferred
99 * Fill PCI IDE PRD (scatter-gather) table with segments
100 * associated with the current disk command.
103 * spin_lock_irqsave(host lock)
106 static void ata_fill_sg(struct ata_queued_cmd
*qc
)
108 struct ata_port
*ap
= qc
->ap
;
109 struct scatterlist
*sg
;
113 for_each_sg(qc
->sg
, sg
, qc
->n_elem
, si
) {
117 /* determine if physical DMA addr spans 64K boundary.
118 * Note h/w doesn't support 64-bit, so we unconditionally
119 * truncate dma_addr_t to u32.
121 addr
= (u32
) sg_dma_address(sg
);
122 sg_len
= sg_dma_len(sg
);
125 offset
= addr
& 0xffff;
127 if ((offset
+ sg_len
) > 0x10000)
128 len
= 0x10000 - offset
;
130 ap
->prd
[pi
].addr
= cpu_to_le32(addr
);
131 ap
->prd
[pi
].flags_len
= cpu_to_le32(len
& 0xffff);
132 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", pi
, addr
, len
);
140 ap
->prd
[pi
- 1].flags_len
|= cpu_to_le32(ATA_PRD_EOT
);
144 * ata_fill_sg_dumb - Fill PCI IDE PRD table
145 * @qc: Metadata associated with taskfile to be transferred
147 * Fill PCI IDE PRD (scatter-gather) table with segments
148 * associated with the current disk command. Perform the fill
149 * so that we avoid writing any length 64K records for
150 * controllers that don't follow the spec.
153 * spin_lock_irqsave(host lock)
156 static void ata_fill_sg_dumb(struct ata_queued_cmd
*qc
)
158 struct ata_port
*ap
= qc
->ap
;
159 struct scatterlist
*sg
;
163 for_each_sg(qc
->sg
, sg
, qc
->n_elem
, si
) {
165 u32 sg_len
, len
, blen
;
167 /* determine if physical DMA addr spans 64K boundary.
168 * Note h/w doesn't support 64-bit, so we unconditionally
169 * truncate dma_addr_t to u32.
171 addr
= (u32
) sg_dma_address(sg
);
172 sg_len
= sg_dma_len(sg
);
175 offset
= addr
& 0xffff;
177 if ((offset
+ sg_len
) > 0x10000)
178 len
= 0x10000 - offset
;
181 ap
->prd
[pi
].addr
= cpu_to_le32(addr
);
183 /* Some PATA chipsets like the CS5530 can't
184 cope with 0x0000 meaning 64K as the spec
186 ap
->prd
[pi
].flags_len
= cpu_to_le32(0x8000);
188 ap
->prd
[++pi
].addr
= cpu_to_le32(addr
+ 0x8000);
190 ap
->prd
[pi
].flags_len
= cpu_to_le32(blen
);
191 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", pi
, addr
, len
);
199 ap
->prd
[pi
- 1].flags_len
|= cpu_to_le32(ATA_PRD_EOT
);
203 * ata_sff_qc_prep - Prepare taskfile for submission
204 * @qc: Metadata associated with taskfile to be prepared
206 * Prepare ATA taskfile for submission.
209 * spin_lock_irqsave(host lock)
211 void ata_sff_qc_prep(struct ata_queued_cmd
*qc
)
213 if (!(qc
->flags
& ATA_QCFLAG_DMAMAP
))
218 EXPORT_SYMBOL_GPL(ata_sff_qc_prep
);
221 * ata_sff_dumb_qc_prep - Prepare taskfile for submission
222 * @qc: Metadata associated with taskfile to be prepared
224 * Prepare ATA taskfile for submission.
227 * spin_lock_irqsave(host lock)
229 void ata_sff_dumb_qc_prep(struct ata_queued_cmd
*qc
)
231 if (!(qc
->flags
& ATA_QCFLAG_DMAMAP
))
234 ata_fill_sg_dumb(qc
);
236 EXPORT_SYMBOL_GPL(ata_sff_dumb_qc_prep
);
239 * ata_sff_check_status - Read device status reg & clear interrupt
240 * @ap: port where the device is
242 * Reads ATA taskfile status register for currently-selected device
243 * and return its value. This also clears pending interrupts
247 * Inherited from caller.
249 u8
ata_sff_check_status(struct ata_port
*ap
)
251 return ioread8(ap
->ioaddr
.status_addr
);
253 EXPORT_SYMBOL_GPL(ata_sff_check_status
);
256 * ata_sff_altstatus - Read device alternate status reg
257 * @ap: port where the device is
259 * Reads ATA taskfile alternate status register for
260 * currently-selected device and return its value.
262 * Note: may NOT be used as the check_altstatus() entry in
263 * ata_port_operations.
266 * Inherited from caller.
268 static u8
ata_sff_altstatus(struct ata_port
*ap
)
270 if (ap
->ops
->sff_check_altstatus
)
271 return ap
->ops
->sff_check_altstatus(ap
);
273 return ioread8(ap
->ioaddr
.altstatus_addr
);
277 * ata_sff_irq_status - Check if the device is busy
278 * @ap: port where the device is
280 * Determine if the port is currently busy. Uses altstatus
281 * if available in order to avoid clearing shared IRQ status
282 * when finding an IRQ source. Non ctl capable devices don't
283 * share interrupt lines fortunately for us.
286 * Inherited from caller.
288 static u8
ata_sff_irq_status(struct ata_port
*ap
)
292 if (ap
->ops
->sff_check_altstatus
|| ap
->ioaddr
.altstatus_addr
) {
293 status
= ata_sff_altstatus(ap
);
294 /* Not us: We are busy */
295 if (status
& ATA_BUSY
)
298 /* Clear INTRQ latch */
299 status
= ap
->ops
->sff_check_status(ap
);
304 * ata_sff_sync - Flush writes
305 * @ap: Port to wait for.
308 * If we have an mmio device with no ctl and no altstatus
309 * method this will fail. No such devices are known to exist.
312 * Inherited from caller.
315 static void ata_sff_sync(struct ata_port
*ap
)
317 if (ap
->ops
->sff_check_altstatus
)
318 ap
->ops
->sff_check_altstatus(ap
);
319 else if (ap
->ioaddr
.altstatus_addr
)
320 ioread8(ap
->ioaddr
.altstatus_addr
);
324 * ata_sff_pause - Flush writes and wait 400nS
325 * @ap: Port to pause for.
328 * If we have an mmio device with no ctl and no altstatus
329 * method this will fail. No such devices are known to exist.
332 * Inherited from caller.
335 void ata_sff_pause(struct ata_port
*ap
)
340 EXPORT_SYMBOL_GPL(ata_sff_pause
);
343 * ata_sff_dma_pause - Pause before commencing DMA
344 * @ap: Port to pause for.
346 * Perform I/O fencing and ensure sufficient cycle delays occur
347 * for the HDMA1:0 transition
350 void ata_sff_dma_pause(struct ata_port
*ap
)
352 if (ap
->ops
->sff_check_altstatus
|| ap
->ioaddr
.altstatus_addr
) {
353 /* An altstatus read will cause the needed delay without
354 messing up the IRQ status */
355 ata_sff_altstatus(ap
);
358 /* There are no DMA controllers without ctl. BUG here to ensure
359 we never violate the HDMA1:0 transition timing and risk
363 EXPORT_SYMBOL_GPL(ata_sff_dma_pause
);
366 * ata_sff_busy_sleep - sleep until BSY clears, or timeout
367 * @ap: port containing status register to be polled
368 * @tmout_pat: impatience timeout in msecs
369 * @tmout: overall timeout in msecs
371 * Sleep until ATA Status register bit BSY clears,
372 * or a timeout occurs.
375 * Kernel thread context (may sleep).
378 * 0 on success, -errno otherwise.
380 int ata_sff_busy_sleep(struct ata_port
*ap
,
381 unsigned long tmout_pat
, unsigned long tmout
)
383 unsigned long timer_start
, timeout
;
386 status
= ata_sff_busy_wait(ap
, ATA_BUSY
, 300);
387 timer_start
= jiffies
;
388 timeout
= ata_deadline(timer_start
, tmout_pat
);
389 while (status
!= 0xff && (status
& ATA_BUSY
) &&
390 time_before(jiffies
, timeout
)) {
392 status
= ata_sff_busy_wait(ap
, ATA_BUSY
, 3);
395 if (status
!= 0xff && (status
& ATA_BUSY
))
396 ata_port_printk(ap
, KERN_WARNING
,
397 "port is slow to respond, please be patient "
398 "(Status 0x%x)\n", status
);
400 timeout
= ata_deadline(timer_start
, tmout
);
401 while (status
!= 0xff && (status
& ATA_BUSY
) &&
402 time_before(jiffies
, timeout
)) {
404 status
= ap
->ops
->sff_check_status(ap
);
410 if (status
& ATA_BUSY
) {
411 ata_port_printk(ap
, KERN_ERR
, "port failed to respond "
412 "(%lu secs, Status 0x%x)\n",
413 DIV_ROUND_UP(tmout
, 1000), status
);
419 EXPORT_SYMBOL_GPL(ata_sff_busy_sleep
);
421 static int ata_sff_check_ready(struct ata_link
*link
)
423 u8 status
= link
->ap
->ops
->sff_check_status(link
->ap
);
425 return ata_check_ready(status
);
429 * ata_sff_wait_ready - sleep until BSY clears, or timeout
430 * @link: SFF link to wait ready status for
431 * @deadline: deadline jiffies for the operation
433 * Sleep until ATA Status register bit BSY clears, or timeout
437 * Kernel thread context (may sleep).
440 * 0 on success, -errno otherwise.
442 int ata_sff_wait_ready(struct ata_link
*link
, unsigned long deadline
)
444 return ata_wait_ready(link
, deadline
, ata_sff_check_ready
);
446 EXPORT_SYMBOL_GPL(ata_sff_wait_ready
);
449 * ata_sff_dev_select - Select device 0/1 on ATA bus
450 * @ap: ATA channel to manipulate
451 * @device: ATA device (numbered from zero) to select
453 * Use the method defined in the ATA specification to
454 * make either device 0, or device 1, active on the
455 * ATA channel. Works with both PIO and MMIO.
457 * May be used as the dev_select() entry in ata_port_operations.
462 void ata_sff_dev_select(struct ata_port
*ap
, unsigned int device
)
467 tmp
= ATA_DEVICE_OBS
;
469 tmp
= ATA_DEVICE_OBS
| ATA_DEV1
;
471 iowrite8(tmp
, ap
->ioaddr
.device_addr
);
472 ata_sff_pause(ap
); /* needed; also flushes, for mmio */
474 EXPORT_SYMBOL_GPL(ata_sff_dev_select
);
477 * ata_dev_select - Select device 0/1 on ATA bus
478 * @ap: ATA channel to manipulate
479 * @device: ATA device (numbered from zero) to select
480 * @wait: non-zero to wait for Status register BSY bit to clear
481 * @can_sleep: non-zero if context allows sleeping
483 * Use the method defined in the ATA specification to
484 * make either device 0, or device 1, active on the
487 * This is a high-level version of ata_sff_dev_select(), which
488 * additionally provides the services of inserting the proper
489 * pauses and status polling, where needed.
494 void ata_dev_select(struct ata_port
*ap
, unsigned int device
,
495 unsigned int wait
, unsigned int can_sleep
)
497 if (ata_msg_probe(ap
))
498 ata_port_printk(ap
, KERN_INFO
, "ata_dev_select: ENTER, "
499 "device %u, wait %u\n", device
, wait
);
504 ap
->ops
->sff_dev_select(ap
, device
);
507 if (can_sleep
&& ap
->link
.device
[device
].class == ATA_DEV_ATAPI
)
514 * ata_sff_irq_on - Enable interrupts on a port.
515 * @ap: Port on which interrupts are enabled.
517 * Enable interrupts on a legacy IDE device using MMIO or PIO,
518 * wait for idle, clear any pending interrupts.
521 * Inherited from caller.
523 u8
ata_sff_irq_on(struct ata_port
*ap
)
525 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
528 ap
->ctl
&= ~ATA_NIEN
;
529 ap
->last_ctl
= ap
->ctl
;
531 if (ioaddr
->ctl_addr
)
532 iowrite8(ap
->ctl
, ioaddr
->ctl_addr
);
533 tmp
= ata_wait_idle(ap
);
535 ap
->ops
->sff_irq_clear(ap
);
539 EXPORT_SYMBOL_GPL(ata_sff_irq_on
);
542 * ata_sff_irq_clear - Clear PCI IDE BMDMA interrupt.
543 * @ap: Port associated with this ATA transaction.
545 * Clear interrupt and error flags in DMA status register.
547 * May be used as the irq_clear() entry in ata_port_operations.
550 * spin_lock_irqsave(host lock)
552 void ata_sff_irq_clear(struct ata_port
*ap
)
554 void __iomem
*mmio
= ap
->ioaddr
.bmdma_addr
;
559 iowrite8(ioread8(mmio
+ ATA_DMA_STATUS
), mmio
+ ATA_DMA_STATUS
);
561 EXPORT_SYMBOL_GPL(ata_sff_irq_clear
);
564 * ata_sff_tf_load - send taskfile registers to host controller
565 * @ap: Port to which output is sent
566 * @tf: ATA taskfile register set
568 * Outputs ATA taskfile to standard ATA host controller.
571 * Inherited from caller.
573 void ata_sff_tf_load(struct ata_port
*ap
, const struct ata_taskfile
*tf
)
575 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
576 unsigned int is_addr
= tf
->flags
& ATA_TFLAG_ISADDR
;
578 if (tf
->ctl
!= ap
->last_ctl
) {
579 if (ioaddr
->ctl_addr
)
580 iowrite8(tf
->ctl
, ioaddr
->ctl_addr
);
581 ap
->last_ctl
= tf
->ctl
;
585 if (is_addr
&& (tf
->flags
& ATA_TFLAG_LBA48
)) {
586 WARN_ON_ONCE(!ioaddr
->ctl_addr
);
587 iowrite8(tf
->hob_feature
, ioaddr
->feature_addr
);
588 iowrite8(tf
->hob_nsect
, ioaddr
->nsect_addr
);
589 iowrite8(tf
->hob_lbal
, ioaddr
->lbal_addr
);
590 iowrite8(tf
->hob_lbam
, ioaddr
->lbam_addr
);
591 iowrite8(tf
->hob_lbah
, ioaddr
->lbah_addr
);
592 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
601 iowrite8(tf
->feature
, ioaddr
->feature_addr
);
602 iowrite8(tf
->nsect
, ioaddr
->nsect_addr
);
603 iowrite8(tf
->lbal
, ioaddr
->lbal_addr
);
604 iowrite8(tf
->lbam
, ioaddr
->lbam_addr
);
605 iowrite8(tf
->lbah
, ioaddr
->lbah_addr
);
606 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
614 if (tf
->flags
& ATA_TFLAG_DEVICE
) {
615 iowrite8(tf
->device
, ioaddr
->device_addr
);
616 VPRINTK("device 0x%X\n", tf
->device
);
621 EXPORT_SYMBOL_GPL(ata_sff_tf_load
);
624 * ata_sff_tf_read - input device's ATA taskfile shadow registers
625 * @ap: Port from which input is read
626 * @tf: ATA taskfile register set for storing input
628 * Reads ATA taskfile registers for currently-selected device
629 * into @tf. Assumes the device has a fully SFF compliant task file
630 * layout and behaviour. If you device does not (eg has a different
631 * status method) then you will need to provide a replacement tf_read
634 * Inherited from caller.
636 void ata_sff_tf_read(struct ata_port
*ap
, struct ata_taskfile
*tf
)
638 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
640 tf
->command
= ata_sff_check_status(ap
);
641 tf
->feature
= ioread8(ioaddr
->error_addr
);
642 tf
->nsect
= ioread8(ioaddr
->nsect_addr
);
643 tf
->lbal
= ioread8(ioaddr
->lbal_addr
);
644 tf
->lbam
= ioread8(ioaddr
->lbam_addr
);
645 tf
->lbah
= ioread8(ioaddr
->lbah_addr
);
646 tf
->device
= ioread8(ioaddr
->device_addr
);
648 if (tf
->flags
& ATA_TFLAG_LBA48
) {
649 if (likely(ioaddr
->ctl_addr
)) {
650 iowrite8(tf
->ctl
| ATA_HOB
, ioaddr
->ctl_addr
);
651 tf
->hob_feature
= ioread8(ioaddr
->error_addr
);
652 tf
->hob_nsect
= ioread8(ioaddr
->nsect_addr
);
653 tf
->hob_lbal
= ioread8(ioaddr
->lbal_addr
);
654 tf
->hob_lbam
= ioread8(ioaddr
->lbam_addr
);
655 tf
->hob_lbah
= ioread8(ioaddr
->lbah_addr
);
656 iowrite8(tf
->ctl
, ioaddr
->ctl_addr
);
657 ap
->last_ctl
= tf
->ctl
;
662 EXPORT_SYMBOL_GPL(ata_sff_tf_read
);
665 * ata_sff_exec_command - issue ATA command to host controller
666 * @ap: port to which command is being issued
667 * @tf: ATA taskfile register set
669 * Issues ATA command, with proper synchronization with interrupt
670 * handler / other threads.
673 * spin_lock_irqsave(host lock)
675 void ata_sff_exec_command(struct ata_port
*ap
, const struct ata_taskfile
*tf
)
677 DPRINTK("ata%u: cmd 0x%X\n", ap
->print_id
, tf
->command
);
679 iowrite8(tf
->command
, ap
->ioaddr
.command_addr
);
682 EXPORT_SYMBOL_GPL(ata_sff_exec_command
);
685 * ata_tf_to_host - issue ATA taskfile to host controller
686 * @ap: port to which command is being issued
687 * @tf: ATA taskfile register set
689 * Issues ATA taskfile register set to ATA host controller,
690 * with proper synchronization with interrupt handler and
694 * spin_lock_irqsave(host lock)
696 static inline void ata_tf_to_host(struct ata_port
*ap
,
697 const struct ata_taskfile
*tf
)
699 ap
->ops
->sff_tf_load(ap
, tf
);
700 ap
->ops
->sff_exec_command(ap
, tf
);
704 * ata_sff_data_xfer - Transfer data by PIO
705 * @dev: device to target
707 * @buflen: buffer length
710 * Transfer data from/to the device data register by PIO.
713 * Inherited from caller.
718 unsigned int ata_sff_data_xfer(struct ata_device
*dev
, unsigned char *buf
,
719 unsigned int buflen
, int rw
)
721 struct ata_port
*ap
= dev
->link
->ap
;
722 void __iomem
*data_addr
= ap
->ioaddr
.data_addr
;
723 unsigned int words
= buflen
>> 1;
725 /* Transfer multiple of 2 bytes */
727 ioread16_rep(data_addr
, buf
, words
);
729 iowrite16_rep(data_addr
, buf
, words
);
731 /* Transfer trailing byte, if any. */
732 if (unlikely(buflen
& 0x01)) {
733 unsigned char pad
[2];
735 /* Point buf to the tail of buffer */
739 * Use io*16_rep() accessors here as well to avoid pointlessly
740 * swapping bytes to and from on the big endian machines...
743 ioread16_rep(data_addr
, pad
, 1);
747 iowrite16_rep(data_addr
, pad
, 1);
754 EXPORT_SYMBOL_GPL(ata_sff_data_xfer
);
757 * ata_sff_data_xfer32 - Transfer data by PIO
758 * @dev: device to target
760 * @buflen: buffer length
763 * Transfer data from/to the device data register by PIO using 32bit
767 * Inherited from caller.
773 unsigned int ata_sff_data_xfer32(struct ata_device
*dev
, unsigned char *buf
,
774 unsigned int buflen
, int rw
)
776 struct ata_port
*ap
= dev
->link
->ap
;
777 void __iomem
*data_addr
= ap
->ioaddr
.data_addr
;
778 unsigned int words
= buflen
>> 2;
779 int slop
= buflen
& 3;
781 if (!(ap
->pflags
& ATA_PFLAG_PIO32
))
782 return ata_sff_data_xfer(dev
, buf
, buflen
, rw
);
784 /* Transfer multiple of 4 bytes */
786 ioread32_rep(data_addr
, buf
, words
);
788 iowrite32_rep(data_addr
, buf
, words
);
790 /* Transfer trailing bytes, if any */
791 if (unlikely(slop
)) {
792 unsigned char pad
[4];
794 /* Point buf to the tail of buffer */
795 buf
+= buflen
- slop
;
798 * Use io*_rep() accessors here as well to avoid pointlessly
799 * swapping bytes to and from on the big endian machines...
803 ioread16_rep(data_addr
, pad
, 1);
805 ioread32_rep(data_addr
, pad
, 1);
806 memcpy(buf
, pad
, slop
);
808 memcpy(pad
, buf
, slop
);
810 iowrite16_rep(data_addr
, pad
, 1);
812 iowrite32_rep(data_addr
, pad
, 1);
815 return (buflen
+ 1) & ~1;
817 EXPORT_SYMBOL_GPL(ata_sff_data_xfer32
);
820 * ata_sff_data_xfer_noirq - Transfer data by PIO
821 * @dev: device to target
823 * @buflen: buffer length
826 * Transfer data from/to the device data register by PIO. Do the
827 * transfer with interrupts disabled.
830 * Inherited from caller.
835 unsigned int ata_sff_data_xfer_noirq(struct ata_device
*dev
, unsigned char *buf
,
836 unsigned int buflen
, int rw
)
839 unsigned int consumed
;
841 local_irq_save(flags
);
842 consumed
= ata_sff_data_xfer(dev
, buf
, buflen
, rw
);
843 local_irq_restore(flags
);
847 EXPORT_SYMBOL_GPL(ata_sff_data_xfer_noirq
);
850 * ata_pio_sector - Transfer a sector of data.
851 * @qc: Command on going
853 * Transfer qc->sect_size bytes of data from/to the ATA device.
856 * Inherited from caller.
858 static void ata_pio_sector(struct ata_queued_cmd
*qc
)
860 int do_write
= (qc
->tf
.flags
& ATA_TFLAG_WRITE
);
861 struct ata_port
*ap
= qc
->ap
;
866 if (qc
->curbytes
== qc
->nbytes
- qc
->sect_size
)
867 ap
->hsm_task_state
= HSM_ST_LAST
;
869 page
= sg_page(qc
->cursg
);
870 offset
= qc
->cursg
->offset
+ qc
->cursg_ofs
;
872 /* get the current page and offset */
873 page
= nth_page(page
, (offset
>> PAGE_SHIFT
));
876 DPRINTK("data %s\n", qc
->tf
.flags
& ATA_TFLAG_WRITE
? "write" : "read");
878 if (PageHighMem(page
)) {
881 /* FIXME: use a bounce buffer */
882 local_irq_save(flags
);
883 buf
= kmap_atomic(page
, KM_IRQ0
);
885 /* do the actual data transfer */
886 ap
->ops
->sff_data_xfer(qc
->dev
, buf
+ offset
, qc
->sect_size
,
889 kunmap_atomic(buf
, KM_IRQ0
);
890 local_irq_restore(flags
);
892 buf
= page_address(page
);
893 ap
->ops
->sff_data_xfer(qc
->dev
, buf
+ offset
, qc
->sect_size
,
898 flush_dcache_page(page
);
900 qc
->curbytes
+= qc
->sect_size
;
901 qc
->cursg_ofs
+= qc
->sect_size
;
903 if (qc
->cursg_ofs
== qc
->cursg
->length
) {
904 qc
->cursg
= sg_next(qc
->cursg
);
910 * ata_pio_sectors - Transfer one or many sectors.
911 * @qc: Command on going
913 * Transfer one or many sectors of data from/to the
914 * ATA device for the DRQ request.
917 * Inherited from caller.
919 static void ata_pio_sectors(struct ata_queued_cmd
*qc
)
921 if (is_multi_taskfile(&qc
->tf
)) {
922 /* READ/WRITE MULTIPLE */
925 WARN_ON_ONCE(qc
->dev
->multi_count
== 0);
927 nsect
= min((qc
->nbytes
- qc
->curbytes
) / qc
->sect_size
,
928 qc
->dev
->multi_count
);
934 ata_sff_sync(qc
->ap
); /* flush */
938 * atapi_send_cdb - Write CDB bytes to hardware
939 * @ap: Port to which ATAPI device is attached.
940 * @qc: Taskfile currently active
942 * When device has indicated its readiness to accept
943 * a CDB, this function is called. Send the CDB.
948 static void atapi_send_cdb(struct ata_port
*ap
, struct ata_queued_cmd
*qc
)
951 DPRINTK("send cdb\n");
952 WARN_ON_ONCE(qc
->dev
->cdb_len
< 12);
954 ap
->ops
->sff_data_xfer(qc
->dev
, qc
->cdb
, qc
->dev
->cdb_len
, 1);
956 /* FIXME: If the CDB is for DMA do we need to do the transition delay
957 or is bmdma_start guaranteed to do it ? */
958 switch (qc
->tf
.protocol
) {
960 ap
->hsm_task_state
= HSM_ST
;
962 case ATAPI_PROT_NODATA
:
963 ap
->hsm_task_state
= HSM_ST_LAST
;
966 ap
->hsm_task_state
= HSM_ST_LAST
;
968 ap
->ops
->bmdma_start(qc
);
974 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
975 * @qc: Command on going
976 * @bytes: number of bytes
978 * Transfer Transfer data from/to the ATAPI device.
981 * Inherited from caller.
984 static int __atapi_pio_bytes(struct ata_queued_cmd
*qc
, unsigned int bytes
)
986 int rw
= (qc
->tf
.flags
& ATA_TFLAG_WRITE
) ? WRITE
: READ
;
987 struct ata_port
*ap
= qc
->ap
;
988 struct ata_device
*dev
= qc
->dev
;
989 struct ata_eh_info
*ehi
= &dev
->link
->eh_info
;
990 struct scatterlist
*sg
;
993 unsigned int offset
, count
, consumed
;
998 ata_ehi_push_desc(ehi
, "unexpected or too much trailing data "
999 "buf=%u cur=%u bytes=%u",
1000 qc
->nbytes
, qc
->curbytes
, bytes
);
1005 offset
= sg
->offset
+ qc
->cursg_ofs
;
1007 /* get the current page and offset */
1008 page
= nth_page(page
, (offset
>> PAGE_SHIFT
));
1009 offset
%= PAGE_SIZE
;
1011 /* don't overrun current sg */
1012 count
= min(sg
->length
- qc
->cursg_ofs
, bytes
);
1014 /* don't cross page boundaries */
1015 count
= min(count
, (unsigned int)PAGE_SIZE
- offset
);
1017 DPRINTK("data %s\n", qc
->tf
.flags
& ATA_TFLAG_WRITE
? "write" : "read");
1019 if (PageHighMem(page
)) {
1020 unsigned long flags
;
1022 /* FIXME: use bounce buffer */
1023 local_irq_save(flags
);
1024 buf
= kmap_atomic(page
, KM_IRQ0
);
1026 /* do the actual data transfer */
1027 consumed
= ap
->ops
->sff_data_xfer(dev
, buf
+ offset
,
1030 kunmap_atomic(buf
, KM_IRQ0
);
1031 local_irq_restore(flags
);
1033 buf
= page_address(page
);
1034 consumed
= ap
->ops
->sff_data_xfer(dev
, buf
+ offset
,
1038 bytes
-= min(bytes
, consumed
);
1039 qc
->curbytes
+= count
;
1040 qc
->cursg_ofs
+= count
;
1042 if (qc
->cursg_ofs
== sg
->length
) {
1043 qc
->cursg
= sg_next(qc
->cursg
);
1048 * There used to be a WARN_ON_ONCE(qc->cursg && count != consumed);
1049 * Unfortunately __atapi_pio_bytes doesn't know enough to do the WARN
1050 * check correctly as it doesn't know if it is the last request being
1051 * made. Somebody should implement a proper sanity check.
1059 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
1060 * @qc: Command on going
1062 * Transfer Transfer data from/to the ATAPI device.
1065 * Inherited from caller.
1067 static void atapi_pio_bytes(struct ata_queued_cmd
*qc
)
1069 struct ata_port
*ap
= qc
->ap
;
1070 struct ata_device
*dev
= qc
->dev
;
1071 struct ata_eh_info
*ehi
= &dev
->link
->eh_info
;
1072 unsigned int ireason
, bc_lo
, bc_hi
, bytes
;
1073 int i_write
, do_write
= (qc
->tf
.flags
& ATA_TFLAG_WRITE
) ? 1 : 0;
1075 /* Abuse qc->result_tf for temp storage of intermediate TF
1076 * here to save some kernel stack usage.
1077 * For normal completion, qc->result_tf is not relevant. For
1078 * error, qc->result_tf is later overwritten by ata_qc_complete().
1079 * So, the correctness of qc->result_tf is not affected.
1081 ap
->ops
->sff_tf_read(ap
, &qc
->result_tf
);
1082 ireason
= qc
->result_tf
.nsect
;
1083 bc_lo
= qc
->result_tf
.lbam
;
1084 bc_hi
= qc
->result_tf
.lbah
;
1085 bytes
= (bc_hi
<< 8) | bc_lo
;
1087 /* shall be cleared to zero, indicating xfer of data */
1088 if (unlikely(ireason
& (1 << 0)))
1091 /* make sure transfer direction matches expected */
1092 i_write
= ((ireason
& (1 << 1)) == 0) ? 1 : 0;
1093 if (unlikely(do_write
!= i_write
))
1096 if (unlikely(!bytes
))
1099 VPRINTK("ata%u: xfering %d bytes\n", ap
->print_id
, bytes
);
1101 if (unlikely(__atapi_pio_bytes(qc
, bytes
)))
1103 ata_sff_sync(ap
); /* flush */
1108 ata_ehi_push_desc(ehi
, "ATAPI check failed (ireason=0x%x bytes=%u)",
1111 qc
->err_mask
|= AC_ERR_HSM
;
1112 ap
->hsm_task_state
= HSM_ST_ERR
;
1116 * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue.
1117 * @ap: the target ata_port
1121 * 1 if ok in workqueue, 0 otherwise.
1123 static inline int ata_hsm_ok_in_wq(struct ata_port
*ap
,
1124 struct ata_queued_cmd
*qc
)
1126 if (qc
->tf
.flags
& ATA_TFLAG_POLLING
)
1129 if (ap
->hsm_task_state
== HSM_ST_FIRST
) {
1130 if (qc
->tf
.protocol
== ATA_PROT_PIO
&&
1131 (qc
->tf
.flags
& ATA_TFLAG_WRITE
))
1134 if (ata_is_atapi(qc
->tf
.protocol
) &&
1135 !(qc
->dev
->flags
& ATA_DFLAG_CDB_INTR
))
1143 * ata_hsm_qc_complete - finish a qc running on standard HSM
1144 * @qc: Command to complete
1145 * @in_wq: 1 if called from workqueue, 0 otherwise
1147 * Finish @qc which is running on standard HSM.
1150 * If @in_wq is zero, spin_lock_irqsave(host lock).
1151 * Otherwise, none on entry and grabs host lock.
1153 static void ata_hsm_qc_complete(struct ata_queued_cmd
*qc
, int in_wq
)
1155 struct ata_port
*ap
= qc
->ap
;
1156 unsigned long flags
;
1158 if (ap
->ops
->error_handler
) {
1160 spin_lock_irqsave(ap
->lock
, flags
);
1162 /* EH might have kicked in while host lock is
1165 qc
= ata_qc_from_tag(ap
, qc
->tag
);
1167 if (likely(!(qc
->err_mask
& AC_ERR_HSM
))) {
1168 ap
->ops
->sff_irq_on(ap
);
1169 ata_qc_complete(qc
);
1171 ata_port_freeze(ap
);
1174 spin_unlock_irqrestore(ap
->lock
, flags
);
1176 if (likely(!(qc
->err_mask
& AC_ERR_HSM
)))
1177 ata_qc_complete(qc
);
1179 ata_port_freeze(ap
);
1183 spin_lock_irqsave(ap
->lock
, flags
);
1184 ap
->ops
->sff_irq_on(ap
);
1185 ata_qc_complete(qc
);
1186 spin_unlock_irqrestore(ap
->lock
, flags
);
1188 ata_qc_complete(qc
);
1193 * ata_sff_hsm_move - move the HSM to the next state.
1194 * @ap: the target ata_port
1196 * @status: current device status
1197 * @in_wq: 1 if called from workqueue, 0 otherwise
1200 * 1 when poll next status needed, 0 otherwise.
1202 int ata_sff_hsm_move(struct ata_port
*ap
, struct ata_queued_cmd
*qc
,
1203 u8 status
, int in_wq
)
1205 struct ata_eh_info
*ehi
= &ap
->link
.eh_info
;
1206 unsigned long flags
= 0;
1209 WARN_ON_ONCE((qc
->flags
& ATA_QCFLAG_ACTIVE
) == 0);
1211 /* Make sure ata_sff_qc_issue() does not throw things
1212 * like DMA polling into the workqueue. Notice that
1213 * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING).
1215 WARN_ON_ONCE(in_wq
!= ata_hsm_ok_in_wq(ap
, qc
));
1218 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
1219 ap
->print_id
, qc
->tf
.protocol
, ap
->hsm_task_state
, status
);
1221 switch (ap
->hsm_task_state
) {
1223 /* Send first data block or PACKET CDB */
1225 /* If polling, we will stay in the work queue after
1226 * sending the data. Otherwise, interrupt handler
1227 * takes over after sending the data.
1229 poll_next
= (qc
->tf
.flags
& ATA_TFLAG_POLLING
);
1231 /* check device status */
1232 if (unlikely((status
& ATA_DRQ
) == 0)) {
1233 /* handle BSY=0, DRQ=0 as error */
1234 if (likely(status
& (ATA_ERR
| ATA_DF
)))
1235 /* device stops HSM for abort/error */
1236 qc
->err_mask
|= AC_ERR_DEV
;
1238 /* HSM violation. Let EH handle this */
1239 ata_ehi_push_desc(ehi
,
1240 "ST_FIRST: !(DRQ|ERR|DF)");
1241 qc
->err_mask
|= AC_ERR_HSM
;
1244 ap
->hsm_task_state
= HSM_ST_ERR
;
1248 /* Device should not ask for data transfer (DRQ=1)
1249 * when it finds something wrong.
1250 * We ignore DRQ here and stop the HSM by
1251 * changing hsm_task_state to HSM_ST_ERR and
1252 * let the EH abort the command or reset the device.
1254 if (unlikely(status
& (ATA_ERR
| ATA_DF
))) {
1255 /* Some ATAPI tape drives forget to clear the ERR bit
1256 * when doing the next command (mostly request sense).
1257 * We ignore ERR here to workaround and proceed sending
1260 if (!(qc
->dev
->horkage
& ATA_HORKAGE_STUCK_ERR
)) {
1261 ata_ehi_push_desc(ehi
, "ST_FIRST: "
1262 "DRQ=1 with device error, "
1263 "dev_stat 0x%X", status
);
1264 qc
->err_mask
|= AC_ERR_HSM
;
1265 ap
->hsm_task_state
= HSM_ST_ERR
;
1270 /* Send the CDB (atapi) or the first data block (ata pio out).
1271 * During the state transition, interrupt handler shouldn't
1272 * be invoked before the data transfer is complete and
1273 * hsm_task_state is changed. Hence, the following locking.
1276 spin_lock_irqsave(ap
->lock
, flags
);
1278 if (qc
->tf
.protocol
== ATA_PROT_PIO
) {
1279 /* PIO data out protocol.
1280 * send first data block.
1283 /* ata_pio_sectors() might change the state
1284 * to HSM_ST_LAST. so, the state is changed here
1285 * before ata_pio_sectors().
1287 ap
->hsm_task_state
= HSM_ST
;
1288 ata_pio_sectors(qc
);
1291 atapi_send_cdb(ap
, qc
);
1294 spin_unlock_irqrestore(ap
->lock
, flags
);
1296 /* if polling, ata_pio_task() handles the rest.
1297 * otherwise, interrupt handler takes over from here.
1302 /* complete command or read/write the data register */
1303 if (qc
->tf
.protocol
== ATAPI_PROT_PIO
) {
1304 /* ATAPI PIO protocol */
1305 if ((status
& ATA_DRQ
) == 0) {
1306 /* No more data to transfer or device error.
1307 * Device error will be tagged in HSM_ST_LAST.
1309 ap
->hsm_task_state
= HSM_ST_LAST
;
1313 /* Device should not ask for data transfer (DRQ=1)
1314 * when it finds something wrong.
1315 * We ignore DRQ here and stop the HSM by
1316 * changing hsm_task_state to HSM_ST_ERR and
1317 * let the EH abort the command or reset the device.
1319 if (unlikely(status
& (ATA_ERR
| ATA_DF
))) {
1320 ata_ehi_push_desc(ehi
, "ST-ATAPI: "
1321 "DRQ=1 with device error, "
1322 "dev_stat 0x%X", status
);
1323 qc
->err_mask
|= AC_ERR_HSM
;
1324 ap
->hsm_task_state
= HSM_ST_ERR
;
1328 atapi_pio_bytes(qc
);
1330 if (unlikely(ap
->hsm_task_state
== HSM_ST_ERR
))
1331 /* bad ireason reported by device */
1335 /* ATA PIO protocol */
1336 if (unlikely((status
& ATA_DRQ
) == 0)) {
1337 /* handle BSY=0, DRQ=0 as error */
1338 if (likely(status
& (ATA_ERR
| ATA_DF
))) {
1339 /* device stops HSM for abort/error */
1340 qc
->err_mask
|= AC_ERR_DEV
;
1342 /* If diagnostic failed and this is
1343 * IDENTIFY, it's likely a phantom
1344 * device. Mark hint.
1346 if (qc
->dev
->horkage
&
1347 ATA_HORKAGE_DIAGNOSTIC
)
1351 /* HSM violation. Let EH handle this.
1352 * Phantom devices also trigger this
1353 * condition. Mark hint.
1355 ata_ehi_push_desc(ehi
, "ST-ATA: "
1356 "DRQ=0 without device error, "
1357 "dev_stat 0x%X", status
);
1358 qc
->err_mask
|= AC_ERR_HSM
|
1362 ap
->hsm_task_state
= HSM_ST_ERR
;
1366 /* For PIO reads, some devices may ask for
1367 * data transfer (DRQ=1) alone with ERR=1.
1368 * We respect DRQ here and transfer one
1369 * block of junk data before changing the
1370 * hsm_task_state to HSM_ST_ERR.
1372 * For PIO writes, ERR=1 DRQ=1 doesn't make
1373 * sense since the data block has been
1374 * transferred to the device.
1376 if (unlikely(status
& (ATA_ERR
| ATA_DF
))) {
1377 /* data might be corrputed */
1378 qc
->err_mask
|= AC_ERR_DEV
;
1380 if (!(qc
->tf
.flags
& ATA_TFLAG_WRITE
)) {
1381 ata_pio_sectors(qc
);
1382 status
= ata_wait_idle(ap
);
1385 if (status
& (ATA_BUSY
| ATA_DRQ
)) {
1386 ata_ehi_push_desc(ehi
, "ST-ATA: "
1387 "BUSY|DRQ persists on ERR|DF, "
1388 "dev_stat 0x%X", status
);
1389 qc
->err_mask
|= AC_ERR_HSM
;
1392 /* There are oddball controllers with
1393 * status register stuck at 0x7f and
1394 * lbal/m/h at zero which makes it
1395 * pass all other presence detection
1396 * mechanisms we have. Set NODEV_HINT
1397 * for it. Kernel bz#7241.
1400 qc
->err_mask
|= AC_ERR_NODEV_HINT
;
1402 /* ata_pio_sectors() might change the
1403 * state to HSM_ST_LAST. so, the state
1404 * is changed after ata_pio_sectors().
1406 ap
->hsm_task_state
= HSM_ST_ERR
;
1410 ata_pio_sectors(qc
);
1412 if (ap
->hsm_task_state
== HSM_ST_LAST
&&
1413 (!(qc
->tf
.flags
& ATA_TFLAG_WRITE
))) {
1415 status
= ata_wait_idle(ap
);
1424 if (unlikely(!ata_ok(status
))) {
1425 qc
->err_mask
|= __ac_err_mask(status
);
1426 ap
->hsm_task_state
= HSM_ST_ERR
;
1430 /* no more data to transfer */
1431 DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n",
1432 ap
->print_id
, qc
->dev
->devno
, status
);
1434 WARN_ON_ONCE(qc
->err_mask
& (AC_ERR_DEV
| AC_ERR_HSM
));
1436 ap
->hsm_task_state
= HSM_ST_IDLE
;
1438 /* complete taskfile transaction */
1439 ata_hsm_qc_complete(qc
, in_wq
);
1445 ap
->hsm_task_state
= HSM_ST_IDLE
;
1447 /* complete taskfile transaction */
1448 ata_hsm_qc_complete(qc
, in_wq
);
1459 EXPORT_SYMBOL_GPL(ata_sff_hsm_move
);
1461 void ata_pio_task(struct work_struct
*work
)
1463 struct ata_port
*ap
=
1464 container_of(work
, struct ata_port
, port_task
.work
);
1465 struct ata_queued_cmd
*qc
= ap
->port_task_data
;
1470 WARN_ON_ONCE(ap
->hsm_task_state
== HSM_ST_IDLE
);
1473 * This is purely heuristic. This is a fast path.
1474 * Sometimes when we enter, BSY will be cleared in
1475 * a chk-status or two. If not, the drive is probably seeking
1476 * or something. Snooze for a couple msecs, then
1477 * chk-status again. If still busy, queue delayed work.
1479 status
= ata_sff_busy_wait(ap
, ATA_BUSY
, 5);
1480 if (status
& ATA_BUSY
) {
1482 status
= ata_sff_busy_wait(ap
, ATA_BUSY
, 10);
1483 if (status
& ATA_BUSY
) {
1484 ata_pio_queue_task(ap
, qc
, ATA_SHORT_PAUSE
);
1490 poll_next
= ata_sff_hsm_move(ap
, qc
, status
, 1);
1492 /* another command or interrupt handler
1493 * may be running at this point.
1500 * ata_sff_qc_issue - issue taskfile to device in proto-dependent manner
1501 * @qc: command to issue to device
1503 * Using various libata functions and hooks, this function
1504 * starts an ATA command. ATA commands are grouped into
1505 * classes called "protocols", and issuing each type of protocol
1506 * is slightly different.
1508 * May be used as the qc_issue() entry in ata_port_operations.
1511 * spin_lock_irqsave(host lock)
1514 * Zero on success, AC_ERR_* mask on failure
1516 unsigned int ata_sff_qc_issue(struct ata_queued_cmd
*qc
)
1518 struct ata_port
*ap
= qc
->ap
;
1520 /* Use polling pio if the LLD doesn't handle
1521 * interrupt driven pio and atapi CDB interrupt.
1523 if (ap
->flags
& ATA_FLAG_PIO_POLLING
) {
1524 switch (qc
->tf
.protocol
) {
1526 case ATA_PROT_NODATA
:
1527 case ATAPI_PROT_PIO
:
1528 case ATAPI_PROT_NODATA
:
1529 qc
->tf
.flags
|= ATA_TFLAG_POLLING
;
1531 case ATAPI_PROT_DMA
:
1532 if (qc
->dev
->flags
& ATA_DFLAG_CDB_INTR
)
1533 /* see ata_dma_blacklisted() */
1541 /* select the device */
1542 ata_dev_select(ap
, qc
->dev
->devno
, 1, 0);
1544 /* start the command */
1545 switch (qc
->tf
.protocol
) {
1546 case ATA_PROT_NODATA
:
1547 if (qc
->tf
.flags
& ATA_TFLAG_POLLING
)
1548 ata_qc_set_polling(qc
);
1550 ata_tf_to_host(ap
, &qc
->tf
);
1551 ap
->hsm_task_state
= HSM_ST_LAST
;
1553 if (qc
->tf
.flags
& ATA_TFLAG_POLLING
)
1554 ata_pio_queue_task(ap
, qc
, 0);
1559 WARN_ON_ONCE(qc
->tf
.flags
& ATA_TFLAG_POLLING
);
1561 ap
->ops
->sff_tf_load(ap
, &qc
->tf
); /* load tf registers */
1562 ap
->ops
->bmdma_setup(qc
); /* set up bmdma */
1563 ap
->ops
->bmdma_start(qc
); /* initiate bmdma */
1564 ap
->hsm_task_state
= HSM_ST_LAST
;
1568 if (qc
->tf
.flags
& ATA_TFLAG_POLLING
)
1569 ata_qc_set_polling(qc
);
1571 ata_tf_to_host(ap
, &qc
->tf
);
1573 if (qc
->tf
.flags
& ATA_TFLAG_WRITE
) {
1574 /* PIO data out protocol */
1575 ap
->hsm_task_state
= HSM_ST_FIRST
;
1576 ata_pio_queue_task(ap
, qc
, 0);
1578 /* always send first data block using
1579 * the ata_pio_task() codepath.
1582 /* PIO data in protocol */
1583 ap
->hsm_task_state
= HSM_ST
;
1585 if (qc
->tf
.flags
& ATA_TFLAG_POLLING
)
1586 ata_pio_queue_task(ap
, qc
, 0);
1588 /* if polling, ata_pio_task() handles the rest.
1589 * otherwise, interrupt handler takes over from here.
1595 case ATAPI_PROT_PIO
:
1596 case ATAPI_PROT_NODATA
:
1597 if (qc
->tf
.flags
& ATA_TFLAG_POLLING
)
1598 ata_qc_set_polling(qc
);
1600 ata_tf_to_host(ap
, &qc
->tf
);
1602 ap
->hsm_task_state
= HSM_ST_FIRST
;
1604 /* send cdb by polling if no cdb interrupt */
1605 if ((!(qc
->dev
->flags
& ATA_DFLAG_CDB_INTR
)) ||
1606 (qc
->tf
.flags
& ATA_TFLAG_POLLING
))
1607 ata_pio_queue_task(ap
, qc
, 0);
1610 case ATAPI_PROT_DMA
:
1611 WARN_ON_ONCE(qc
->tf
.flags
& ATA_TFLAG_POLLING
);
1613 ap
->ops
->sff_tf_load(ap
, &qc
->tf
); /* load tf registers */
1614 ap
->ops
->bmdma_setup(qc
); /* set up bmdma */
1615 ap
->hsm_task_state
= HSM_ST_FIRST
;
1617 /* send cdb by polling if no cdb interrupt */
1618 if (!(qc
->dev
->flags
& ATA_DFLAG_CDB_INTR
))
1619 ata_pio_queue_task(ap
, qc
, 0);
1624 return AC_ERR_SYSTEM
;
1629 EXPORT_SYMBOL_GPL(ata_sff_qc_issue
);
1632 * ata_sff_qc_fill_rtf - fill result TF using ->sff_tf_read
1633 * @qc: qc to fill result TF for
1635 * @qc is finished and result TF needs to be filled. Fill it
1636 * using ->sff_tf_read.
1639 * spin_lock_irqsave(host lock)
1642 * true indicating that result TF is successfully filled.
1644 bool ata_sff_qc_fill_rtf(struct ata_queued_cmd
*qc
)
1646 qc
->ap
->ops
->sff_tf_read(qc
->ap
, &qc
->result_tf
);
1649 EXPORT_SYMBOL_GPL(ata_sff_qc_fill_rtf
);
1652 * ata_sff_host_intr - Handle host interrupt for given (port, task)
1653 * @ap: Port on which interrupt arrived (possibly...)
1654 * @qc: Taskfile currently active in engine
1656 * Handle host interrupt for given queued command. Currently,
1657 * only DMA interrupts are handled. All other commands are
1658 * handled via polling with interrupts disabled (nIEN bit).
1661 * spin_lock_irqsave(host lock)
1664 * One if interrupt was handled, zero if not (shared irq).
1666 unsigned int ata_sff_host_intr(struct ata_port
*ap
,
1667 struct ata_queued_cmd
*qc
)
1669 struct ata_eh_info
*ehi
= &ap
->link
.eh_info
;
1670 u8 status
, host_stat
= 0;
1671 bool bmdma_stopped
= false;
1673 VPRINTK("ata%u: protocol %d task_state %d\n",
1674 ap
->print_id
, qc
->tf
.protocol
, ap
->hsm_task_state
);
1676 /* Check whether we are expecting interrupt in this state */
1677 switch (ap
->hsm_task_state
) {
1679 /* Some pre-ATAPI-4 devices assert INTRQ
1680 * at this state when ready to receive CDB.
1683 /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
1684 * The flag was turned on only for atapi devices. No
1685 * need to check ata_is_atapi(qc->tf.protocol) again.
1687 if (!(qc
->dev
->flags
& ATA_DFLAG_CDB_INTR
))
1691 if (qc
->tf
.protocol
== ATA_PROT_DMA
||
1692 qc
->tf
.protocol
== ATAPI_PROT_DMA
) {
1693 /* check status of DMA engine */
1694 host_stat
= ap
->ops
->bmdma_status(ap
);
1695 VPRINTK("ata%u: host_stat 0x%X\n",
1696 ap
->print_id
, host_stat
);
1698 /* if it's not our irq... */
1699 if (!(host_stat
& ATA_DMA_INTR
))
1702 /* before we do anything else, clear DMA-Start bit */
1703 ap
->ops
->bmdma_stop(qc
);
1704 bmdma_stopped
= true;
1706 if (unlikely(host_stat
& ATA_DMA_ERR
)) {
1707 /* error when transfering data to/from memory */
1708 qc
->err_mask
|= AC_ERR_HOST_BUS
;
1709 ap
->hsm_task_state
= HSM_ST_ERR
;
1720 /* check main status, clearing INTRQ if needed */
1721 status
= ata_sff_irq_status(ap
);
1722 if (status
& ATA_BUSY
) {
1723 if (bmdma_stopped
) {
1724 /* BMDMA engine is already stopped, we're screwed */
1725 qc
->err_mask
|= AC_ERR_HSM
;
1726 ap
->hsm_task_state
= HSM_ST_ERR
;
1731 /* ack bmdma irq events */
1732 ap
->ops
->sff_irq_clear(ap
);
1734 ata_sff_hsm_move(ap
, qc
, status
, 0);
1736 if (unlikely(qc
->err_mask
) && (qc
->tf
.protocol
== ATA_PROT_DMA
||
1737 qc
->tf
.protocol
== ATAPI_PROT_DMA
))
1738 ata_ehi_push_desc(ehi
, "BMDMA stat 0x%x", host_stat
);
1740 return 1; /* irq handled */
1743 ap
->stats
.idle_irq
++;
1746 if ((ap
->stats
.idle_irq
% 1000) == 0) {
1747 ap
->ops
->sff_check_status(ap
);
1748 ap
->ops
->sff_irq_clear(ap
);
1749 ata_port_printk(ap
, KERN_WARNING
, "irq trap\n");
1753 return 0; /* irq not handled */
1755 EXPORT_SYMBOL_GPL(ata_sff_host_intr
);
1758 * ata_sff_interrupt - Default ATA host interrupt handler
1759 * @irq: irq line (unused)
1760 * @dev_instance: pointer to our ata_host information structure
1762 * Default interrupt handler for PCI IDE devices. Calls
1763 * ata_sff_host_intr() for each port that is not disabled.
1766 * Obtains host lock during operation.
1769 * IRQ_NONE or IRQ_HANDLED.
1771 irqreturn_t
ata_sff_interrupt(int irq
, void *dev_instance
)
1773 struct ata_host
*host
= dev_instance
;
1774 bool retried
= false;
1776 unsigned int handled
, idle
, polling
;
1777 unsigned long flags
;
1779 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
1780 spin_lock_irqsave(&host
->lock
, flags
);
1783 handled
= idle
= polling
= 0;
1784 for (i
= 0; i
< host
->n_ports
; i
++) {
1785 struct ata_port
*ap
= host
->ports
[i
];
1786 struct ata_queued_cmd
*qc
;
1788 if (unlikely(ap
->flags
& ATA_FLAG_DISABLED
))
1791 qc
= ata_qc_from_tag(ap
, ap
->link
.active_tag
);
1793 if (!(qc
->tf
.flags
& ATA_TFLAG_POLLING
))
1794 handled
|= ata_sff_host_intr(ap
, qc
);
1802 * If no port was expecting IRQ but the controller is actually
1803 * asserting IRQ line, nobody cared will ensue. Check IRQ
1804 * pending status if available and clear spurious IRQ.
1806 if (!handled
&& !retried
) {
1809 for (i
= 0; i
< host
->n_ports
; i
++) {
1810 struct ata_port
*ap
= host
->ports
[i
];
1812 if (polling
& (1 << i
))
1815 if (!ap
->ops
->sff_irq_check
||
1816 !ap
->ops
->sff_irq_check(ap
))
1819 if (printk_ratelimit())
1820 ata_port_printk(ap
, KERN_INFO
,
1821 "clearing spurious IRQ\n");
1823 if (idle
& (1 << i
)) {
1824 ap
->ops
->sff_check_status(ap
);
1825 ap
->ops
->sff_irq_clear(ap
);
1827 /* clear INTRQ and check if BUSY cleared */
1828 if (!(ap
->ops
->sff_check_status(ap
) & ATA_BUSY
))
1831 * With command in flight, we can't do
1832 * sff_irq_clear() w/o racing with completion.
1843 spin_unlock_irqrestore(&host
->lock
, flags
);
1845 return IRQ_RETVAL(handled
);
1847 EXPORT_SYMBOL_GPL(ata_sff_interrupt
);
1850 * ata_sff_lost_interrupt - Check for an apparent lost interrupt
1851 * @ap: port that appears to have timed out
1853 * Called from the libata error handlers when the core code suspects
1854 * an interrupt has been lost. If it has complete anything we can and
1855 * then return. Interface must support altstatus for this faster
1856 * recovery to occur.
1859 * Caller holds host lock
1862 void ata_sff_lost_interrupt(struct ata_port
*ap
)
1865 struct ata_queued_cmd
*qc
;
1867 /* Only one outstanding command per SFF channel */
1868 qc
= ata_qc_from_tag(ap
, ap
->link
.active_tag
);
1869 /* Check we have a live one.. */
1870 if (qc
== NULL
|| !(qc
->flags
& ATA_QCFLAG_ACTIVE
))
1872 /* We cannot lose an interrupt on a polled command */
1873 if (qc
->tf
.flags
& ATA_TFLAG_POLLING
)
1875 /* See if the controller thinks it is still busy - if so the command
1876 isn't a lost IRQ but is still in progress */
1877 status
= ata_sff_altstatus(ap
);
1878 if (status
& ATA_BUSY
)
1881 /* There was a command running, we are no longer busy and we have
1883 ata_port_printk(ap
, KERN_WARNING
, "lost interrupt (Status 0x%x)\n",
1885 /* Run the host interrupt logic as if the interrupt had not been
1887 ata_sff_host_intr(ap
, qc
);
1889 EXPORT_SYMBOL_GPL(ata_sff_lost_interrupt
);
1892 * ata_sff_freeze - Freeze SFF controller port
1893 * @ap: port to freeze
1895 * Freeze BMDMA controller port.
1898 * Inherited from caller.
1900 void ata_sff_freeze(struct ata_port
*ap
)
1902 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
1904 ap
->ctl
|= ATA_NIEN
;
1905 ap
->last_ctl
= ap
->ctl
;
1907 if (ioaddr
->ctl_addr
)
1908 iowrite8(ap
->ctl
, ioaddr
->ctl_addr
);
1910 /* Under certain circumstances, some controllers raise IRQ on
1911 * ATA_NIEN manipulation. Also, many controllers fail to mask
1912 * previously pending IRQ on ATA_NIEN assertion. Clear it.
1914 ap
->ops
->sff_check_status(ap
);
1916 ap
->ops
->sff_irq_clear(ap
);
1918 EXPORT_SYMBOL_GPL(ata_sff_freeze
);
1921 * ata_sff_thaw - Thaw SFF controller port
1924 * Thaw SFF controller port.
1927 * Inherited from caller.
1929 void ata_sff_thaw(struct ata_port
*ap
)
1931 /* clear & re-enable interrupts */
1932 ap
->ops
->sff_check_status(ap
);
1933 ap
->ops
->sff_irq_clear(ap
);
1934 ap
->ops
->sff_irq_on(ap
);
1936 EXPORT_SYMBOL_GPL(ata_sff_thaw
);
1939 * ata_sff_prereset - prepare SFF link for reset
1940 * @link: SFF link to be reset
1941 * @deadline: deadline jiffies for the operation
1943 * SFF link @link is about to be reset. Initialize it. It first
1944 * calls ata_std_prereset() and wait for !BSY if the port is
1948 * Kernel thread context (may sleep)
1951 * 0 on success, -errno otherwise.
1953 int ata_sff_prereset(struct ata_link
*link
, unsigned long deadline
)
1955 struct ata_eh_context
*ehc
= &link
->eh_context
;
1958 rc
= ata_std_prereset(link
, deadline
);
1962 /* if we're about to do hardreset, nothing more to do */
1963 if (ehc
->i
.action
& ATA_EH_HARDRESET
)
1966 /* wait for !BSY if we don't know that no device is attached */
1967 if (!ata_link_offline(link
)) {
1968 rc
= ata_sff_wait_ready(link
, deadline
);
1969 if (rc
&& rc
!= -ENODEV
) {
1970 ata_link_printk(link
, KERN_WARNING
, "device not ready "
1971 "(errno=%d), forcing hardreset\n", rc
);
1972 ehc
->i
.action
|= ATA_EH_HARDRESET
;
1978 EXPORT_SYMBOL_GPL(ata_sff_prereset
);
1981 * ata_devchk - PATA device presence detection
1982 * @ap: ATA channel to examine
1983 * @device: Device to examine (starting at zero)
1985 * This technique was originally described in
1986 * Hale Landis's ATADRVR (www.ata-atapi.com), and
1987 * later found its way into the ATA/ATAPI spec.
1989 * Write a pattern to the ATA shadow registers,
1990 * and if a device is present, it will respond by
1991 * correctly storing and echoing back the
1992 * ATA shadow register contents.
1997 static unsigned int ata_devchk(struct ata_port
*ap
, unsigned int device
)
1999 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
2002 ap
->ops
->sff_dev_select(ap
, device
);
2004 iowrite8(0x55, ioaddr
->nsect_addr
);
2005 iowrite8(0xaa, ioaddr
->lbal_addr
);
2007 iowrite8(0xaa, ioaddr
->nsect_addr
);
2008 iowrite8(0x55, ioaddr
->lbal_addr
);
2010 iowrite8(0x55, ioaddr
->nsect_addr
);
2011 iowrite8(0xaa, ioaddr
->lbal_addr
);
2013 nsect
= ioread8(ioaddr
->nsect_addr
);
2014 lbal
= ioread8(ioaddr
->lbal_addr
);
2016 if ((nsect
== 0x55) && (lbal
== 0xaa))
2017 return 1; /* we found a device */
2019 return 0; /* nothing found */
2023 * ata_sff_dev_classify - Parse returned ATA device signature
2024 * @dev: ATA device to classify (starting at zero)
2025 * @present: device seems present
2026 * @r_err: Value of error register on completion
2028 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
2029 * an ATA/ATAPI-defined set of values is placed in the ATA
2030 * shadow registers, indicating the results of device detection
2033 * Select the ATA device, and read the values from the ATA shadow
2034 * registers. Then parse according to the Error register value,
2035 * and the spec-defined values examined by ata_dev_classify().
2041 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
2043 unsigned int ata_sff_dev_classify(struct ata_device
*dev
, int present
,
2046 struct ata_port
*ap
= dev
->link
->ap
;
2047 struct ata_taskfile tf
;
2051 ap
->ops
->sff_dev_select(ap
, dev
->devno
);
2053 memset(&tf
, 0, sizeof(tf
));
2055 ap
->ops
->sff_tf_read(ap
, &tf
);
2060 /* see if device passed diags: continue and warn later */
2062 /* diagnostic fail : do nothing _YET_ */
2063 dev
->horkage
|= ATA_HORKAGE_DIAGNOSTIC
;
2066 else if ((dev
->devno
== 0) && (err
== 0x81))
2069 return ATA_DEV_NONE
;
2071 /* determine if device is ATA or ATAPI */
2072 class = ata_dev_classify(&tf
);
2074 if (class == ATA_DEV_UNKNOWN
) {
2075 /* If the device failed diagnostic, it's likely to
2076 * have reported incorrect device signature too.
2077 * Assume ATA device if the device seems present but
2078 * device signature is invalid with diagnostic
2081 if (present
&& (dev
->horkage
& ATA_HORKAGE_DIAGNOSTIC
))
2082 class = ATA_DEV_ATA
;
2084 class = ATA_DEV_NONE
;
2085 } else if ((class == ATA_DEV_ATA
) &&
2086 (ap
->ops
->sff_check_status(ap
) == 0))
2087 class = ATA_DEV_NONE
;
2091 EXPORT_SYMBOL_GPL(ata_sff_dev_classify
);
2094 * ata_sff_wait_after_reset - wait for devices to become ready after reset
2095 * @link: SFF link which is just reset
2096 * @devmask: mask of present devices
2097 * @deadline: deadline jiffies for the operation
2099 * Wait devices attached to SFF @link to become ready after
2100 * reset. It contains preceding 150ms wait to avoid accessing TF
2101 * status register too early.
2104 * Kernel thread context (may sleep).
2107 * 0 on success, -ENODEV if some or all of devices in @devmask
2108 * don't seem to exist. -errno on other errors.
2110 int ata_sff_wait_after_reset(struct ata_link
*link
, unsigned int devmask
,
2111 unsigned long deadline
)
2113 struct ata_port
*ap
= link
->ap
;
2114 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
2115 unsigned int dev0
= devmask
& (1 << 0);
2116 unsigned int dev1
= devmask
& (1 << 1);
2119 msleep(ATA_WAIT_AFTER_RESET
);
2121 /* always check readiness of the master device */
2122 rc
= ata_sff_wait_ready(link
, deadline
);
2123 /* -ENODEV means the odd clown forgot the D7 pulldown resistor
2124 * and TF status is 0xff, bail out on it too.
2129 /* if device 1 was found in ata_devchk, wait for register
2130 * access briefly, then wait for BSY to clear.
2135 ap
->ops
->sff_dev_select(ap
, 1);
2137 /* Wait for register access. Some ATAPI devices fail
2138 * to set nsect/lbal after reset, so don't waste too
2139 * much time on it. We're gonna wait for !BSY anyway.
2141 for (i
= 0; i
< 2; i
++) {
2144 nsect
= ioread8(ioaddr
->nsect_addr
);
2145 lbal
= ioread8(ioaddr
->lbal_addr
);
2146 if ((nsect
== 1) && (lbal
== 1))
2148 msleep(50); /* give drive a breather */
2151 rc
= ata_sff_wait_ready(link
, deadline
);
2159 /* is all this really necessary? */
2160 ap
->ops
->sff_dev_select(ap
, 0);
2162 ap
->ops
->sff_dev_select(ap
, 1);
2164 ap
->ops
->sff_dev_select(ap
, 0);
2168 EXPORT_SYMBOL_GPL(ata_sff_wait_after_reset
);
2170 static int ata_bus_softreset(struct ata_port
*ap
, unsigned int devmask
,
2171 unsigned long deadline
)
2173 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
2175 DPRINTK("ata%u: bus reset via SRST\n", ap
->print_id
);
2177 /* software reset. causes dev0 to be selected */
2178 iowrite8(ap
->ctl
, ioaddr
->ctl_addr
);
2179 udelay(20); /* FIXME: flush */
2180 iowrite8(ap
->ctl
| ATA_SRST
, ioaddr
->ctl_addr
);
2181 udelay(20); /* FIXME: flush */
2182 iowrite8(ap
->ctl
, ioaddr
->ctl_addr
);
2183 ap
->last_ctl
= ap
->ctl
;
2185 /* wait the port to become ready */
2186 return ata_sff_wait_after_reset(&ap
->link
, devmask
, deadline
);
2190 * ata_sff_softreset - reset host port via ATA SRST
2191 * @link: ATA link to reset
2192 * @classes: resulting classes of attached devices
2193 * @deadline: deadline jiffies for the operation
2195 * Reset host port using ATA SRST.
2198 * Kernel thread context (may sleep)
2201 * 0 on success, -errno otherwise.
2203 int ata_sff_softreset(struct ata_link
*link
, unsigned int *classes
,
2204 unsigned long deadline
)
2206 struct ata_port
*ap
= link
->ap
;
2207 unsigned int slave_possible
= ap
->flags
& ATA_FLAG_SLAVE_POSS
;
2208 unsigned int devmask
= 0;
2214 /* determine if device 0/1 are present */
2215 if (ata_devchk(ap
, 0))
2216 devmask
|= (1 << 0);
2217 if (slave_possible
&& ata_devchk(ap
, 1))
2218 devmask
|= (1 << 1);
2220 /* select device 0 again */
2221 ap
->ops
->sff_dev_select(ap
, 0);
2223 /* issue bus reset */
2224 DPRINTK("about to softreset, devmask=%x\n", devmask
);
2225 rc
= ata_bus_softreset(ap
, devmask
, deadline
);
2226 /* if link is occupied, -ENODEV too is an error */
2227 if (rc
&& (rc
!= -ENODEV
|| sata_scr_valid(link
))) {
2228 ata_link_printk(link
, KERN_ERR
, "SRST failed (errno=%d)\n", rc
);
2232 /* determine by signature whether we have ATA or ATAPI devices */
2233 classes
[0] = ata_sff_dev_classify(&link
->device
[0],
2234 devmask
& (1 << 0), &err
);
2235 if (slave_possible
&& err
!= 0x81)
2236 classes
[1] = ata_sff_dev_classify(&link
->device
[1],
2237 devmask
& (1 << 1), &err
);
2239 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes
[0], classes
[1]);
2242 EXPORT_SYMBOL_GPL(ata_sff_softreset
);
2245 * sata_sff_hardreset - reset host port via SATA phy reset
2246 * @link: link to reset
2247 * @class: resulting class of attached device
2248 * @deadline: deadline jiffies for the operation
2250 * SATA phy-reset host port using DET bits of SControl register,
2251 * wait for !BSY and classify the attached device.
2254 * Kernel thread context (may sleep)
2257 * 0 on success, -errno otherwise.
2259 int sata_sff_hardreset(struct ata_link
*link
, unsigned int *class,
2260 unsigned long deadline
)
2262 struct ata_eh_context
*ehc
= &link
->eh_context
;
2263 const unsigned long *timing
= sata_ehc_deb_timing(ehc
);
2267 rc
= sata_link_hardreset(link
, timing
, deadline
, &online
,
2268 ata_sff_check_ready
);
2270 *class = ata_sff_dev_classify(link
->device
, 1, NULL
);
2272 DPRINTK("EXIT, class=%u\n", *class);
2275 EXPORT_SYMBOL_GPL(sata_sff_hardreset
);
2278 * ata_sff_postreset - SFF postreset callback
2279 * @link: the target SFF ata_link
2280 * @classes: classes of attached devices
2282 * This function is invoked after a successful reset. It first
2283 * calls ata_std_postreset() and performs SFF specific postreset
2287 * Kernel thread context (may sleep)
2289 void ata_sff_postreset(struct ata_link
*link
, unsigned int *classes
)
2291 struct ata_port
*ap
= link
->ap
;
2293 ata_std_postreset(link
, classes
);
2295 /* is double-select really necessary? */
2296 if (classes
[0] != ATA_DEV_NONE
)
2297 ap
->ops
->sff_dev_select(ap
, 1);
2298 if (classes
[1] != ATA_DEV_NONE
)
2299 ap
->ops
->sff_dev_select(ap
, 0);
2301 /* bail out if no device is present */
2302 if (classes
[0] == ATA_DEV_NONE
&& classes
[1] == ATA_DEV_NONE
) {
2303 DPRINTK("EXIT, no device\n");
2307 /* set up device control */
2308 if (ap
->ioaddr
.ctl_addr
) {
2309 iowrite8(ap
->ctl
, ap
->ioaddr
.ctl_addr
);
2310 ap
->last_ctl
= ap
->ctl
;
2313 EXPORT_SYMBOL_GPL(ata_sff_postreset
);
2316 * ata_sff_drain_fifo - Stock FIFO drain logic for SFF controllers
2319 * Drain the FIFO and device of any stuck data following a command
2320 * failing to complete. In some cases this is necessary before a
2321 * reset will recover the device.
2325 void ata_sff_drain_fifo(struct ata_queued_cmd
*qc
)
2328 struct ata_port
*ap
;
2330 /* We only need to flush incoming data when a command was running */
2331 if (qc
== NULL
|| qc
->dma_dir
== DMA_TO_DEVICE
)
2335 /* Drain up to 64K of data before we give up this recovery method */
2336 for (count
= 0; (ap
->ops
->sff_check_status(ap
) & ATA_DRQ
)
2337 && count
< 65536; count
+= 2)
2338 ioread16(ap
->ioaddr
.data_addr
);
2340 /* Can become DEBUG later */
2342 ata_port_printk(ap
, KERN_DEBUG
,
2343 "drained %d bytes to clear DRQ.\n", count
);
2346 EXPORT_SYMBOL_GPL(ata_sff_drain_fifo
);
2349 * ata_sff_error_handler - Stock error handler for BMDMA controller
2350 * @ap: port to handle error for
2352 * Stock error handler for SFF controller. It can handle both
2353 * PATA and SATA controllers. Many controllers should be able to
2354 * use this EH as-is or with some added handling before and
2358 * Kernel thread context (may sleep)
2360 void ata_sff_error_handler(struct ata_port
*ap
)
2362 ata_reset_fn_t softreset
= ap
->ops
->softreset
;
2363 ata_reset_fn_t hardreset
= ap
->ops
->hardreset
;
2364 struct ata_queued_cmd
*qc
;
2365 unsigned long flags
;
2368 qc
= __ata_qc_from_tag(ap
, ap
->link
.active_tag
);
2369 if (qc
&& !(qc
->flags
& ATA_QCFLAG_FAILED
))
2372 /* reset PIO HSM and stop DMA engine */
2373 spin_lock_irqsave(ap
->lock
, flags
);
2375 ap
->hsm_task_state
= HSM_ST_IDLE
;
2377 if (ap
->ioaddr
.bmdma_addr
&&
2378 qc
&& (qc
->tf
.protocol
== ATA_PROT_DMA
||
2379 qc
->tf
.protocol
== ATAPI_PROT_DMA
)) {
2382 host_stat
= ap
->ops
->bmdma_status(ap
);
2384 /* BMDMA controllers indicate host bus error by
2385 * setting DMA_ERR bit and timing out. As it wasn't
2386 * really a timeout event, adjust error mask and
2387 * cancel frozen state.
2389 if (qc
->err_mask
== AC_ERR_TIMEOUT
2390 && (host_stat
& ATA_DMA_ERR
)) {
2391 qc
->err_mask
= AC_ERR_HOST_BUS
;
2395 ap
->ops
->bmdma_stop(qc
);
2398 ata_sff_sync(ap
); /* FIXME: We don't need this */
2399 ap
->ops
->sff_check_status(ap
);
2400 ap
->ops
->sff_irq_clear(ap
);
2401 /* We *MUST* do FIFO draining before we issue a reset as several
2402 * devices helpfully clear their internal state and will lock solid
2403 * if we touch the data port post reset. Pass qc in case anyone wants
2404 * to do different PIO/DMA recovery or has per command fixups
2406 if (ap
->ops
->drain_fifo
)
2407 ap
->ops
->drain_fifo(qc
);
2409 spin_unlock_irqrestore(ap
->lock
, flags
);
2412 ata_eh_thaw_port(ap
);
2414 /* PIO and DMA engines have been stopped, perform recovery */
2416 /* Ignore ata_sff_softreset if ctl isn't accessible and
2417 * built-in hardresets if SCR access isn't available.
2419 if (softreset
== ata_sff_softreset
&& !ap
->ioaddr
.ctl_addr
)
2421 if (ata_is_builtin_hardreset(hardreset
) && !sata_scr_valid(&ap
->link
))
2424 ata_do_eh(ap
, ap
->ops
->prereset
, softreset
, hardreset
,
2425 ap
->ops
->postreset
);
2427 EXPORT_SYMBOL_GPL(ata_sff_error_handler
);
2430 * ata_sff_post_internal_cmd - Stock post_internal_cmd for SFF controller
2431 * @qc: internal command to clean up
2434 * Kernel thread context (may sleep)
2436 void ata_sff_post_internal_cmd(struct ata_queued_cmd
*qc
)
2438 struct ata_port
*ap
= qc
->ap
;
2439 unsigned long flags
;
2441 spin_lock_irqsave(ap
->lock
, flags
);
2443 ap
->hsm_task_state
= HSM_ST_IDLE
;
2445 if (ap
->ioaddr
.bmdma_addr
)
2446 ap
->ops
->bmdma_stop(qc
);
2448 spin_unlock_irqrestore(ap
->lock
, flags
);
2450 EXPORT_SYMBOL_GPL(ata_sff_post_internal_cmd
);
2453 * ata_sff_port_start - Set port up for dma.
2454 * @ap: Port to initialize
2456 * Called just after data structures for each port are
2457 * initialized. Allocates space for PRD table if the device
2458 * is DMA capable SFF.
2460 * May be used as the port_start() entry in ata_port_operations.
2463 * Inherited from caller.
2465 int ata_sff_port_start(struct ata_port
*ap
)
2467 if (ap
->ioaddr
.bmdma_addr
)
2468 return ata_port_start(ap
);
2471 EXPORT_SYMBOL_GPL(ata_sff_port_start
);
2474 * ata_sff_port_start32 - Set port up for dma.
2475 * @ap: Port to initialize
2477 * Called just after data structures for each port are
2478 * initialized. Allocates space for PRD table if the device
2479 * is DMA capable SFF.
2481 * May be used as the port_start() entry in ata_port_operations for
2482 * devices that are capable of 32bit PIO.
2485 * Inherited from caller.
2487 int ata_sff_port_start32(struct ata_port
*ap
)
2489 ap
->pflags
|= ATA_PFLAG_PIO32
| ATA_PFLAG_PIO32CHANGE
;
2490 if (ap
->ioaddr
.bmdma_addr
)
2491 return ata_port_start(ap
);
2494 EXPORT_SYMBOL_GPL(ata_sff_port_start32
);
2497 * ata_sff_std_ports - initialize ioaddr with standard port offsets.
2498 * @ioaddr: IO address structure to be initialized
2500 * Utility function which initializes data_addr, error_addr,
2501 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
2502 * device_addr, status_addr, and command_addr to standard offsets
2503 * relative to cmd_addr.
2505 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
2507 void ata_sff_std_ports(struct ata_ioports
*ioaddr
)
2509 ioaddr
->data_addr
= ioaddr
->cmd_addr
+ ATA_REG_DATA
;
2510 ioaddr
->error_addr
= ioaddr
->cmd_addr
+ ATA_REG_ERR
;
2511 ioaddr
->feature_addr
= ioaddr
->cmd_addr
+ ATA_REG_FEATURE
;
2512 ioaddr
->nsect_addr
= ioaddr
->cmd_addr
+ ATA_REG_NSECT
;
2513 ioaddr
->lbal_addr
= ioaddr
->cmd_addr
+ ATA_REG_LBAL
;
2514 ioaddr
->lbam_addr
= ioaddr
->cmd_addr
+ ATA_REG_LBAM
;
2515 ioaddr
->lbah_addr
= ioaddr
->cmd_addr
+ ATA_REG_LBAH
;
2516 ioaddr
->device_addr
= ioaddr
->cmd_addr
+ ATA_REG_DEVICE
;
2517 ioaddr
->status_addr
= ioaddr
->cmd_addr
+ ATA_REG_STATUS
;
2518 ioaddr
->command_addr
= ioaddr
->cmd_addr
+ ATA_REG_CMD
;
2520 EXPORT_SYMBOL_GPL(ata_sff_std_ports
);
2522 unsigned long ata_bmdma_mode_filter(struct ata_device
*adev
,
2523 unsigned long xfer_mask
)
2525 /* Filter out DMA modes if the device has been configured by
2526 the BIOS as PIO only */
2528 if (adev
->link
->ap
->ioaddr
.bmdma_addr
== NULL
)
2529 xfer_mask
&= ~(ATA_MASK_MWDMA
| ATA_MASK_UDMA
);
2532 EXPORT_SYMBOL_GPL(ata_bmdma_mode_filter
);
2535 * ata_bmdma_setup - Set up PCI IDE BMDMA transaction
2536 * @qc: Info associated with this ATA transaction.
2539 * spin_lock_irqsave(host lock)
2541 void ata_bmdma_setup(struct ata_queued_cmd
*qc
)
2543 struct ata_port
*ap
= qc
->ap
;
2544 unsigned int rw
= (qc
->tf
.flags
& ATA_TFLAG_WRITE
);
2547 /* load PRD table addr. */
2548 mb(); /* make sure PRD table writes are visible to controller */
2549 iowrite32(ap
->prd_dma
, ap
->ioaddr
.bmdma_addr
+ ATA_DMA_TABLE_OFS
);
2551 /* specify data direction, triple-check start bit is clear */
2552 dmactl
= ioread8(ap
->ioaddr
.bmdma_addr
+ ATA_DMA_CMD
);
2553 dmactl
&= ~(ATA_DMA_WR
| ATA_DMA_START
);
2555 dmactl
|= ATA_DMA_WR
;
2556 iowrite8(dmactl
, ap
->ioaddr
.bmdma_addr
+ ATA_DMA_CMD
);
2558 /* issue r/w command */
2559 ap
->ops
->sff_exec_command(ap
, &qc
->tf
);
2561 EXPORT_SYMBOL_GPL(ata_bmdma_setup
);
2564 * ata_bmdma_start - Start a PCI IDE BMDMA transaction
2565 * @qc: Info associated with this ATA transaction.
2568 * spin_lock_irqsave(host lock)
2570 void ata_bmdma_start(struct ata_queued_cmd
*qc
)
2572 struct ata_port
*ap
= qc
->ap
;
2575 /* start host DMA transaction */
2576 dmactl
= ioread8(ap
->ioaddr
.bmdma_addr
+ ATA_DMA_CMD
);
2577 iowrite8(dmactl
| ATA_DMA_START
, ap
->ioaddr
.bmdma_addr
+ ATA_DMA_CMD
);
2579 /* Strictly, one may wish to issue an ioread8() here, to
2580 * flush the mmio write. However, control also passes
2581 * to the hardware at this point, and it will interrupt
2582 * us when we are to resume control. So, in effect,
2583 * we don't care when the mmio write flushes.
2584 * Further, a read of the DMA status register _immediately_
2585 * following the write may not be what certain flaky hardware
2586 * is expected, so I think it is best to not add a readb()
2587 * without first all the MMIO ATA cards/mobos.
2588 * Or maybe I'm just being paranoid.
2590 * FIXME: The posting of this write means I/O starts are
2591 * unneccessarily delayed for MMIO
2594 EXPORT_SYMBOL_GPL(ata_bmdma_start
);
2597 * ata_bmdma_stop - Stop PCI IDE BMDMA transfer
2598 * @qc: Command we are ending DMA for
2600 * Clears the ATA_DMA_START flag in the dma control register
2602 * May be used as the bmdma_stop() entry in ata_port_operations.
2605 * spin_lock_irqsave(host lock)
2607 void ata_bmdma_stop(struct ata_queued_cmd
*qc
)
2609 struct ata_port
*ap
= qc
->ap
;
2610 void __iomem
*mmio
= ap
->ioaddr
.bmdma_addr
;
2612 /* clear start/stop bit */
2613 iowrite8(ioread8(mmio
+ ATA_DMA_CMD
) & ~ATA_DMA_START
,
2614 mmio
+ ATA_DMA_CMD
);
2616 /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
2617 ata_sff_dma_pause(ap
);
2619 EXPORT_SYMBOL_GPL(ata_bmdma_stop
);
2622 * ata_bmdma_status - Read PCI IDE BMDMA status
2623 * @ap: Port associated with this ATA transaction.
2625 * Read and return BMDMA status register.
2627 * May be used as the bmdma_status() entry in ata_port_operations.
2630 * spin_lock_irqsave(host lock)
2632 u8
ata_bmdma_status(struct ata_port
*ap
)
2634 return ioread8(ap
->ioaddr
.bmdma_addr
+ ATA_DMA_STATUS
);
2636 EXPORT_SYMBOL_GPL(ata_bmdma_status
);
2639 * ata_bus_reset - reset host port and associated ATA channel
2640 * @ap: port to reset
2642 * This is typically the first time we actually start issuing
2643 * commands to the ATA channel. We wait for BSY to clear, then
2644 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2645 * result. Determine what devices, if any, are on the channel
2646 * by looking at the device 0/1 error register. Look at the signature
2647 * stored in each device's taskfile registers, to determine if
2648 * the device is ATA or ATAPI.
2651 * PCI/etc. bus probe sem.
2652 * Obtains host lock.
2655 * Sets ATA_FLAG_DISABLED if bus reset fails.
2658 * This function is only for drivers which still use old EH and
2659 * will be removed soon.
2661 void ata_bus_reset(struct ata_port
*ap
)
2663 struct ata_device
*device
= ap
->link
.device
;
2664 struct ata_ioports
*ioaddr
= &ap
->ioaddr
;
2665 unsigned int slave_possible
= ap
->flags
& ATA_FLAG_SLAVE_POSS
;
2667 unsigned int dev0
, dev1
= 0, devmask
= 0;
2670 DPRINTK("ENTER, host %u, port %u\n", ap
->print_id
, ap
->port_no
);
2672 /* determine if device 0/1 are present */
2673 if (ap
->flags
& ATA_FLAG_SATA_RESET
)
2676 dev0
= ata_devchk(ap
, 0);
2678 dev1
= ata_devchk(ap
, 1);
2682 devmask
|= (1 << 0);
2684 devmask
|= (1 << 1);
2686 /* select device 0 again */
2687 ap
->ops
->sff_dev_select(ap
, 0);
2689 /* issue bus reset */
2690 if (ap
->flags
& ATA_FLAG_SRST
) {
2691 rc
= ata_bus_softreset(ap
, devmask
,
2692 ata_deadline(jiffies
, 40000));
2693 if (rc
&& rc
!= -ENODEV
)
2698 * determine by signature whether we have ATA or ATAPI devices
2700 device
[0].class = ata_sff_dev_classify(&device
[0], dev0
, &err
);
2701 if ((slave_possible
) && (err
!= 0x81))
2702 device
[1].class = ata_sff_dev_classify(&device
[1], dev1
, &err
);
2704 /* is double-select really necessary? */
2705 if (device
[1].class != ATA_DEV_NONE
)
2706 ap
->ops
->sff_dev_select(ap
, 1);
2707 if (device
[0].class != ATA_DEV_NONE
)
2708 ap
->ops
->sff_dev_select(ap
, 0);
2710 /* if no devices were detected, disable this port */
2711 if ((device
[0].class == ATA_DEV_NONE
) &&
2712 (device
[1].class == ATA_DEV_NONE
))
2715 if (ap
->flags
& (ATA_FLAG_SATA_RESET
| ATA_FLAG_SRST
)) {
2716 /* set up device control for ATA_FLAG_SATA_RESET */
2717 iowrite8(ap
->ctl
, ioaddr
->ctl_addr
);
2718 ap
->last_ctl
= ap
->ctl
;
2725 ata_port_printk(ap
, KERN_ERR
, "disabling port\n");
2726 ata_port_disable(ap
);
2730 EXPORT_SYMBOL_GPL(ata_bus_reset
);
2735 * ata_pci_bmdma_clear_simplex - attempt to kick device out of simplex
2738 * Some PCI ATA devices report simplex mode but in fact can be told to
2739 * enter non simplex mode. This implements the necessary logic to
2740 * perform the task on such devices. Calling it on other devices will
2741 * have -undefined- behaviour.
2743 int ata_pci_bmdma_clear_simplex(struct pci_dev
*pdev
)
2745 unsigned long bmdma
= pci_resource_start(pdev
, 4);
2751 simplex
= inb(bmdma
+ 0x02);
2752 outb(simplex
& 0x60, bmdma
+ 0x02);
2753 simplex
= inb(bmdma
+ 0x02);
2758 EXPORT_SYMBOL_GPL(ata_pci_bmdma_clear_simplex
);
2761 * ata_pci_bmdma_init - acquire PCI BMDMA resources and init ATA host
2762 * @host: target ATA host
2764 * Acquire PCI BMDMA resources and initialize @host accordingly.
2767 * Inherited from calling layer (may sleep).
2770 * 0 on success, -errno otherwise.
2772 int ata_pci_bmdma_init(struct ata_host
*host
)
2774 struct device
*gdev
= host
->dev
;
2775 struct pci_dev
*pdev
= to_pci_dev(gdev
);
2778 /* No BAR4 allocation: No DMA */
2779 if (pci_resource_start(pdev
, 4) == 0)
2782 /* TODO: If we get no DMA mask we should fall back to PIO */
2783 rc
= pci_set_dma_mask(pdev
, ATA_DMA_MASK
);
2786 rc
= pci_set_consistent_dma_mask(pdev
, ATA_DMA_MASK
);
2790 /* request and iomap DMA region */
2791 rc
= pcim_iomap_regions(pdev
, 1 << 4, dev_driver_string(gdev
));
2793 dev_printk(KERN_ERR
, gdev
, "failed to request/iomap BAR4\n");
2796 host
->iomap
= pcim_iomap_table(pdev
);
2798 for (i
= 0; i
< 2; i
++) {
2799 struct ata_port
*ap
= host
->ports
[i
];
2800 void __iomem
*bmdma
= host
->iomap
[4] + 8 * i
;
2802 if (ata_port_is_dummy(ap
))
2805 ap
->ioaddr
.bmdma_addr
= bmdma
;
2806 if ((!(ap
->flags
& ATA_FLAG_IGN_SIMPLEX
)) &&
2807 (ioread8(bmdma
+ 2) & 0x80))
2808 host
->flags
|= ATA_HOST_SIMPLEX
;
2810 ata_port_desc(ap
, "bmdma 0x%llx",
2811 (unsigned long long)pci_resource_start(pdev
, 4) + 8 * i
);
2816 EXPORT_SYMBOL_GPL(ata_pci_bmdma_init
);
2818 static int ata_resources_present(struct pci_dev
*pdev
, int port
)
2822 /* Check the PCI resources for this channel are enabled */
2824 for (i
= 0; i
< 2; i
++) {
2825 if (pci_resource_start(pdev
, port
+ i
) == 0 ||
2826 pci_resource_len(pdev
, port
+ i
) == 0)
2833 * ata_pci_sff_init_host - acquire native PCI ATA resources and init host
2834 * @host: target ATA host
2836 * Acquire native PCI ATA resources for @host and initialize the
2837 * first two ports of @host accordingly. Ports marked dummy are
2838 * skipped and allocation failure makes the port dummy.
2840 * Note that native PCI resources are valid even for legacy hosts
2841 * as we fix up pdev resources array early in boot, so this
2842 * function can be used for both native and legacy SFF hosts.
2845 * Inherited from calling layer (may sleep).
2848 * 0 if at least one port is initialized, -ENODEV if no port is
2851 int ata_pci_sff_init_host(struct ata_host
*host
)
2853 struct device
*gdev
= host
->dev
;
2854 struct pci_dev
*pdev
= to_pci_dev(gdev
);
2855 unsigned int mask
= 0;
2858 /* request, iomap BARs and init port addresses accordingly */
2859 for (i
= 0; i
< 2; i
++) {
2860 struct ata_port
*ap
= host
->ports
[i
];
2862 void __iomem
* const *iomap
;
2864 if (ata_port_is_dummy(ap
))
2867 /* Discard disabled ports. Some controllers show
2868 * their unused channels this way. Disabled ports are
2871 if (!ata_resources_present(pdev
, i
)) {
2872 ap
->ops
= &ata_dummy_port_ops
;
2876 rc
= pcim_iomap_regions(pdev
, 0x3 << base
,
2877 dev_driver_string(gdev
));
2879 dev_printk(KERN_WARNING
, gdev
,
2880 "failed to request/iomap BARs for port %d "
2881 "(errno=%d)\n", i
, rc
);
2883 pcim_pin_device(pdev
);
2884 ap
->ops
= &ata_dummy_port_ops
;
2887 host
->iomap
= iomap
= pcim_iomap_table(pdev
);
2889 ap
->ioaddr
.cmd_addr
= iomap
[base
];
2890 ap
->ioaddr
.altstatus_addr
=
2891 ap
->ioaddr
.ctl_addr
= (void __iomem
*)
2892 ((unsigned long)iomap
[base
+ 1] | ATA_PCI_CTL_OFS
);
2893 ata_sff_std_ports(&ap
->ioaddr
);
2895 ata_port_desc(ap
, "cmd 0x%llx ctl 0x%llx",
2896 (unsigned long long)pci_resource_start(pdev
, base
),
2897 (unsigned long long)pci_resource_start(pdev
, base
+ 1));
2903 dev_printk(KERN_ERR
, gdev
, "no available native port\n");
2909 EXPORT_SYMBOL_GPL(ata_pci_sff_init_host
);
2912 * ata_pci_sff_prepare_host - helper to prepare native PCI ATA host
2913 * @pdev: target PCI device
2914 * @ppi: array of port_info, must be enough for two ports
2915 * @r_host: out argument for the initialized ATA host
2917 * Helper to allocate ATA host for @pdev, acquire all native PCI
2918 * resources and initialize it accordingly in one go.
2921 * Inherited from calling layer (may sleep).
2924 * 0 on success, -errno otherwise.
2926 int ata_pci_sff_prepare_host(struct pci_dev
*pdev
,
2927 const struct ata_port_info
* const *ppi
,
2928 struct ata_host
**r_host
)
2930 struct ata_host
*host
;
2933 if (!devres_open_group(&pdev
->dev
, NULL
, GFP_KERNEL
))
2936 host
= ata_host_alloc_pinfo(&pdev
->dev
, ppi
, 2);
2938 dev_printk(KERN_ERR
, &pdev
->dev
,
2939 "failed to allocate ATA host\n");
2944 rc
= ata_pci_sff_init_host(host
);
2948 /* init DMA related stuff */
2949 rc
= ata_pci_bmdma_init(host
);
2953 devres_remove_group(&pdev
->dev
, NULL
);
2958 /* This is necessary because PCI and iomap resources are
2959 * merged and releasing the top group won't release the
2960 * acquired resources if some of those have been acquired
2961 * before entering this function.
2963 pcim_iounmap_regions(pdev
, 0xf);
2965 devres_release_group(&pdev
->dev
, NULL
);
2968 EXPORT_SYMBOL_GPL(ata_pci_sff_prepare_host
);
2971 * ata_pci_sff_activate_host - start SFF host, request IRQ and register it
2972 * @host: target SFF ATA host
2973 * @irq_handler: irq_handler used when requesting IRQ(s)
2974 * @sht: scsi_host_template to use when registering the host
2976 * This is the counterpart of ata_host_activate() for SFF ATA
2977 * hosts. This separate helper is necessary because SFF hosts
2978 * use two separate interrupts in legacy mode.
2981 * Inherited from calling layer (may sleep).
2984 * 0 on success, -errno otherwise.
2986 int ata_pci_sff_activate_host(struct ata_host
*host
,
2987 irq_handler_t irq_handler
,
2988 struct scsi_host_template
*sht
)
2990 struct device
*dev
= host
->dev
;
2991 struct pci_dev
*pdev
= to_pci_dev(dev
);
2992 const char *drv_name
= dev_driver_string(host
->dev
);
2993 int legacy_mode
= 0, rc
;
2995 rc
= ata_host_start(host
);
2999 if ((pdev
->class >> 8) == PCI_CLASS_STORAGE_IDE
) {
3002 /* TODO: What if one channel is in native mode ... */
3003 pci_read_config_byte(pdev
, PCI_CLASS_PROG
, &tmp8
);
3004 mask
= (1 << 2) | (1 << 0);
3005 if ((tmp8
& mask
) != mask
)
3007 #if defined(CONFIG_NO_ATA_LEGACY)
3008 /* Some platforms with PCI limits cannot address compat
3009 port space. In that case we punt if their firmware has
3010 left a device in compatibility mode */
3012 printk(KERN_ERR
"ata: Compatibility mode ATA is not supported on this platform, skipping.\n");
3018 if (!devres_open_group(dev
, NULL
, GFP_KERNEL
))
3021 if (!legacy_mode
&& pdev
->irq
) {
3022 rc
= devm_request_irq(dev
, pdev
->irq
, irq_handler
,
3023 IRQF_SHARED
, drv_name
, host
);
3027 ata_port_desc(host
->ports
[0], "irq %d", pdev
->irq
);
3028 ata_port_desc(host
->ports
[1], "irq %d", pdev
->irq
);
3029 } else if (legacy_mode
) {
3030 if (!ata_port_is_dummy(host
->ports
[0])) {
3031 rc
= devm_request_irq(dev
, ATA_PRIMARY_IRQ(pdev
),
3032 irq_handler
, IRQF_SHARED
,
3037 ata_port_desc(host
->ports
[0], "irq %d",
3038 ATA_PRIMARY_IRQ(pdev
));
3041 if (!ata_port_is_dummy(host
->ports
[1])) {
3042 rc
= devm_request_irq(dev
, ATA_SECONDARY_IRQ(pdev
),
3043 irq_handler
, IRQF_SHARED
,
3048 ata_port_desc(host
->ports
[1], "irq %d",
3049 ATA_SECONDARY_IRQ(pdev
));
3053 rc
= ata_host_register(host
, sht
);
3056 devres_remove_group(dev
, NULL
);
3058 devres_release_group(dev
, NULL
);
3062 EXPORT_SYMBOL_GPL(ata_pci_sff_activate_host
);
3065 * ata_pci_sff_init_one - Initialize/register PCI IDE host controller
3066 * @pdev: Controller to be initialized
3067 * @ppi: array of port_info, must be enough for two ports
3068 * @sht: scsi_host_template to use when registering the host
3069 * @host_priv: host private_data
3070 * @hflag: host flags
3072 * This is a helper function which can be called from a driver's
3073 * xxx_init_one() probe function if the hardware uses traditional
3074 * IDE taskfile registers.
3076 * This function calls pci_enable_device(), reserves its register
3077 * regions, sets the dma mask, enables bus master mode, and calls
3081 * Nobody makes a single channel controller that appears solely as
3082 * the secondary legacy port on PCI.
3085 * Inherited from PCI layer (may sleep).
3088 * Zero on success, negative on errno-based value on error.
3090 int ata_pci_sff_init_one(struct pci_dev
*pdev
,
3091 const struct ata_port_info
* const *ppi
,
3092 struct scsi_host_template
*sht
, void *host_priv
, int hflag
)
3094 struct device
*dev
= &pdev
->dev
;
3095 const struct ata_port_info
*pi
= NULL
;
3096 struct ata_host
*host
= NULL
;
3101 /* look up the first valid port_info */
3102 for (i
= 0; i
< 2 && ppi
[i
]; i
++) {
3103 if (ppi
[i
]->port_ops
!= &ata_dummy_port_ops
) {
3110 dev_printk(KERN_ERR
, &pdev
->dev
,
3111 "no valid port_info specified\n");
3115 if (!devres_open_group(dev
, NULL
, GFP_KERNEL
))
3118 rc
= pcim_enable_device(pdev
);
3122 /* prepare and activate SFF host */
3123 rc
= ata_pci_sff_prepare_host(pdev
, ppi
, &host
);
3126 host
->private_data
= host_priv
;
3127 host
->flags
|= hflag
;
3129 pci_set_master(pdev
);
3130 rc
= ata_pci_sff_activate_host(host
, ata_sff_interrupt
, sht
);
3133 devres_remove_group(&pdev
->dev
, NULL
);
3135 devres_release_group(&pdev
->dev
, NULL
);
3139 EXPORT_SYMBOL_GPL(ata_pci_sff_init_one
);
3141 #endif /* CONFIG_PCI */