drivers/ata/pata_via.c

   1 /*
   2  * pata_via.c   - VIA PATA for new ATA layer
   3  *                        (C) 2005-2006 Red Hat Inc
   4  *
   5  *  Documentation
   6  *      Most chipset documentation available under NDA only
   7  *
   8  *  VIA version guide
   9  *      VIA VT82C561    -       early design, uses ata_generic currently
  10  *      VIA VT82C576    -       MWDMA, 33Mhz
  11  *      VIA VT82C586    -       MWDMA, 33Mhz
  12  *      VIA VT82C586a   -       Added UDMA to 33Mhz
  13  *      VIA VT82C586b   -       UDMA33
  14  *      VIA VT82C596a   -       Nonfunctional UDMA66
  15  *      VIA VT82C596b   -       Working UDMA66
  16  *      VIA VT82C686    -       Nonfunctional UDMA66
  17  *      VIA VT82C686a   -       Working UDMA66
  18  *      VIA VT82C686b   -       Updated to UDMA100
  19  *      VIA VT8231      -       UDMA100
  20  *      VIA VT8233      -       UDMA100
  21  *      VIA VT8233a     -       UDMA133
  22  *      VIA VT8233c     -       UDMA100
  23  *      VIA VT8235      -       UDMA133
  24  *      VIA VT8237      -       UDMA133
  25  *      VIA VT8237A     -       UDMA133
  26  *      VIA VT8237S     -       UDMA133
  27  *      VIA VT8251      -       UDMA133
  28  *
  29  *      Most registers remain compatible across chips. Others start reserved
  30  *      and acquire sensible semantics if set to 1 (eg cable detect). A few
  31  *      exceptions exist, notably around the FIFO settings.
  32  *
  33  *      One additional quirk of the VIA design is that like ALi they use few
  34  *      PCI IDs for a lot of chips.
  35  *
  36  *      Based heavily on:
  37  *
  38  * Version 3.38
  39  *
  40  * VIA IDE driver for Linux. Supported southbridges:
  41  *
  42  *   vt82c576, vt82c586, vt82c586a, vt82c586b, vt82c596a, vt82c596b,
  43  *   vt82c686, vt82c686a, vt82c686b, vt8231, vt8233, vt8233c, vt8233a,
  44  *   vt8235, vt8237
  45  *
  46  * Copyright (c) 2000-2002 Vojtech Pavlik
  47  *
  48  * Based on the work of:
  49  *      Michel Aubry
  50  *      Jeff Garzik
  51  *      Andre Hedrick
  52
  53  */
  54
  55 #include <linux/kernel.h>
  56 #include <linux/module.h>
  57 #include <linux/pci.h>
  58 #include <linux/init.h>
  59 #include <linux/blkdev.h>
  60 #include <linux/delay.h>
  61 #include <linux/gfp.h>
  62 #include <scsi/scsi_host.h>
  63 #include <linux/libata.h>
  64 #include <linux/dmi.h>
  65
  66 #define DRV_NAME "pata_via"
  67 #define DRV_VERSION "0.3.4"
  68
  69 enum {
  70         VIA_BAD_PREQ    = 0x01, /* Crashes if PREQ# till DDACK# set */
  71         VIA_BAD_CLK66   = 0x02, /* 66 MHz clock doesn't work correctly */
  72         VIA_SET_FIFO    = 0x04, /* Needs to have FIFO split set */
  73         VIA_NO_UNMASK   = 0x08, /* Doesn't work with IRQ unmasking on */
  74         VIA_BAD_ID      = 0x10, /* Has wrong vendor ID (0x1107) */
  75         VIA_BAD_AST     = 0x20, /* Don't touch Address Setup Timing */
  76         VIA_NO_ENABLES  = 0x40, /* Has no enablebits */
  77         VIA_SATA_PATA   = 0x80, /* SATA/PATA combined configuration */
  78 };
  79
  80 enum {
  81         VIA_IDFLAG_SINGLE = (1 << 0), /* single channel controller) */
  82 };
  83
  84 /*
  85  * VIA SouthBridge chips.
  86  */
  87
  88 static const struct via_isa_bridge {
  89         const char *name;
  90         u16 id;
  91         u8 rev_min;
  92         u8 rev_max;
  93         u8 udma_mask;
  94         u8 flags;
  95 } via_isa_bridges[] = {
  96         { "vx855",      PCI_DEVICE_ID_VIA_VX855,    0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_SATA_PATA },
  97         { "vx800",      PCI_DEVICE_ID_VIA_VX800,    0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_SATA_PATA },
  98         { "vt8261",     PCI_DEVICE_ID_VIA_8261,     0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
  99         { "vt8237s",    PCI_DEVICE_ID_VIA_8237S,    0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
 100         { "vt8251",     PCI_DEVICE_ID_VIA_8251,     0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
 101         { "cx700",      PCI_DEVICE_ID_VIA_CX700,    0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_SATA_PATA },
 102         { "vt6410",     PCI_DEVICE_ID_VIA_6410,     0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_NO_ENABLES },
 103         { "vt6415",     PCI_DEVICE_ID_VIA_6415,     0x00, 0xff, ATA_UDMA6, VIA_BAD_AST | VIA_NO_ENABLES },
 104         { "vt8237a",    PCI_DEVICE_ID_VIA_8237A,    0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
 105         { "vt8237",     PCI_DEVICE_ID_VIA_8237,     0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
 106         { "vt8235",     PCI_DEVICE_ID_VIA_8235,     0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
 107         { "vt8233a",    PCI_DEVICE_ID_VIA_8233A,    0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
 108         { "vt8233c",    PCI_DEVICE_ID_VIA_8233C_0,  0x00, 0x2f, ATA_UDMA5, },
 109         { "vt8233",     PCI_DEVICE_ID_VIA_8233_0,   0x00, 0x2f, ATA_UDMA5, },
 110         { "vt8231",     PCI_DEVICE_ID_VIA_8231,     0x00, 0x2f, ATA_UDMA5, },
 111         { "vt82c686b",  PCI_DEVICE_ID_VIA_82C686,   0x40, 0x4f, ATA_UDMA5, },
 112         { "vt82c686a",  PCI_DEVICE_ID_VIA_82C686,   0x10, 0x2f, ATA_UDMA4, },
 113         { "vt82c686",   PCI_DEVICE_ID_VIA_82C686,   0x00, 0x0f, ATA_UDMA2, VIA_BAD_CLK66 },
 114         { "vt82c596b",  PCI_DEVICE_ID_VIA_82C596,   0x10, 0x2f, ATA_UDMA4, },
 115         { "vt82c596a",  PCI_DEVICE_ID_VIA_82C596,   0x00, 0x0f, ATA_UDMA2, VIA_BAD_CLK66 },
 116         { "vt82c586b",  PCI_DEVICE_ID_VIA_82C586_0, 0x47, 0x4f, ATA_UDMA2, VIA_SET_FIFO },
 117         { "vt82c586b",  PCI_DEVICE_ID_VIA_82C586_0, 0x40, 0x46, ATA_UDMA2, VIA_SET_FIFO | VIA_BAD_PREQ },
 118         { "vt82c586b",  PCI_DEVICE_ID_VIA_82C586_0, 0x30, 0x3f, ATA_UDMA2, VIA_SET_FIFO },
 119         { "vt82c586a",  PCI_DEVICE_ID_VIA_82C586_0, 0x20, 0x2f, ATA_UDMA2, VIA_SET_FIFO },
 120         { "vt82c586",   PCI_DEVICE_ID_VIA_82C586_0, 0x00, 0x0f,      0x00, VIA_SET_FIFO },
 121         { "vt82c576",   PCI_DEVICE_ID_VIA_82C576,   0x00, 0x2f,      0x00, VIA_SET_FIFO | VIA_NO_UNMASK },
 122         { "vt82c576",   PCI_DEVICE_ID_VIA_82C576,   0x00, 0x2f,      0x00, VIA_SET_FIFO | VIA_NO_UNMASK | VIA_BAD_ID },
 123         { "vtxxxx",     PCI_DEVICE_ID_VIA_ANON,     0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
 124         { NULL }
 125 };
 126
 127 struct via_port {
 128         u8 cached_device;
 129 };
 130
 131 /*
 132  *      Cable special cases
 133  */
 134
 135 static const struct dmi_system_id cable_dmi_table[] = {
 136         {
 137                 .ident = "Acer Ferrari 3400",
 138                 .matches = {
 139                         DMI_MATCH(DMI_BOARD_VENDOR, "Acer,Inc."),
 140                         DMI_MATCH(DMI_BOARD_NAME, "Ferrari 3400"),
 141                 },
 142         },
 143         { }
 144 };
 145
 146 static int via_cable_override(struct pci_dev *pdev)
 147 {
 148         /* Systems by DMI */
 149         if (dmi_check_system(cable_dmi_table))
 150                 return 1;
 151         /* Arima W730-K8/Targa Visionary 811/... */
 152         if (pdev->subsystem_vendor == 0x161F && pdev->subsystem_device == 0x2032)
 153                 return 1;
 154         return 0;
 155 }
 156
 157
 158 /**
 159  *      via_cable_detect        -       cable detection
 160  *      @ap: ATA port
 161  *
 162  *      Perform cable detection. Actually for the VIA case the BIOS
 163  *      already did this for us. We read the values provided by the
 164  *      BIOS. If you are using an 8235 in a non-PC configuration you
 165  *      may need to update this code.
 166  *
 167  *      Hotplug also impacts on this.
 168  */
 169
 170 static int via_cable_detect(struct ata_port *ap) {
 171         const struct via_isa_bridge *config = ap->host->private_data;
 172         struct pci_dev *pdev = to_pci_dev(ap->host->dev);
 173         u32 ata66;
 174
 175         if (via_cable_override(pdev))
 176                 return ATA_CBL_PATA40_SHORT;
 177
 178         if ((config->flags & VIA_SATA_PATA) && ap->port_no == 0)
 179                 return ATA_CBL_SATA;
 180
 181         /* Early chips are 40 wire */
 182         if (config->udma_mask < ATA_UDMA4)
 183                 return ATA_CBL_PATA40;
 184         /* UDMA 66 chips have only drive side logic */
 185         else if (config->udma_mask < ATA_UDMA5)
 186                 return ATA_CBL_PATA_UNK;
 187         /* UDMA 100 or later */
 188         pci_read_config_dword(pdev, 0x50, &ata66);
 189         /* Check both the drive cable reporting bits, we might not have
 190            two drives */
 191         if (ata66 & (0x10100000 >> (16 * ap->port_no)))
 192                 return ATA_CBL_PATA80;
 193         /* Check with ACPI so we can spot BIOS reported SATA bridges */
 194         if (ata_acpi_init_gtm(ap) &&
 195             ata_acpi_cbl_80wire(ap, ata_acpi_init_gtm(ap)))
 196                 return ATA_CBL_PATA80;
 197         return ATA_CBL_PATA40;
 198 }
 199
 200 static int via_pre_reset(struct ata_link *link, unsigned long deadline)
 201 {
 202         struct ata_port *ap = link->ap;
 203         const struct via_isa_bridge *config = ap->host->private_data;
 204
 205         if (!(config->flags & VIA_NO_ENABLES)) {
 206                 static const struct pci_bits via_enable_bits[] = {
 207                         { 0x40, 1, 0x02, 0x02 },
 208                         { 0x40, 1, 0x01, 0x01 }
 209                 };
 210                 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
 211                 if (!pci_test_config_bits(pdev, &via_enable_bits[ap->port_no]))
 212                         return -ENOENT;
 213         }
 214
 215         return ata_sff_prereset(link, deadline);
 216 }
 217
 218
 219 /**
 220  *      via_do_set_mode -       set transfer mode data
 221  *      @ap: ATA interface
 222  *      @adev: ATA device
 223  *      @mode: ATA mode being programmed
 224  *      @set_ast: Set to program address setup
 225  *      @udma_type: UDMA mode/format of registers
 226  *
 227  *      Program the VIA registers for DMA and PIO modes. Uses the ata timing
 228  *      support in order to compute modes.
 229  *
 230  *      FIXME: Hotplug will require we serialize multiple mode changes
 231  *      on the two channels.
 232  */
 233
 234 static void via_do_set_mode(struct ata_port *ap, struct ata_device *adev,
 235                             int mode, int set_ast, int udma_type)
 236 {
 237         struct pci_dev *pdev = to_pci_dev(ap->host->dev);
 238         struct ata_device *peer = ata_dev_pair(adev);
 239         struct ata_timing t, p;
 240         static int via_clock = 33333;   /* Bus clock in kHZ */
 241         unsigned long T =  1000000000 / via_clock;
 242         unsigned long UT = T;
 243         int ut;
 244         int offset = 3 - (2*ap->port_no) - adev->devno;
 245
 246         switch (udma_type) {
 247         case ATA_UDMA4:
 248                 UT = T / 2; break;
 249         case ATA_UDMA5:
 250                 UT = T / 3; break;
 251         case ATA_UDMA6:
 252                 UT = T / 4; break;
 253         }
 254
 255         /* Calculate the timing values we require */
 256         ata_timing_compute(adev, mode, &t, T, UT);
 257
 258         /* We share 8bit timing so we must merge the constraints */
 259         if (peer) {
 260                 if (peer->pio_mode) {
 261                         ata_timing_compute(peer, peer->pio_mode, &p, T, UT);
 262                         ata_timing_merge(&p, &t, &t, ATA_TIMING_8BIT);
 263                 }
 264         }
 265
 266         /* Address setup is programmable but breaks on UDMA133 setups */
 267         if (set_ast) {
 268                 u8 setup;       /* 2 bits per drive */
 269                 int shift = 2 * offset;
 270
 271                 pci_read_config_byte(pdev, 0x4C, &setup);
 272                 setup &= ~(3 << shift);
 273                 setup |= (clamp_val(t.setup, 1, 4) - 1) << shift;
 274                 pci_write_config_byte(pdev, 0x4C, setup);
 275         }
 276
 277         /* Load the PIO mode bits */
 278         pci_write_config_byte(pdev, 0x4F - ap->port_no,
 279                 ((clamp_val(t.act8b, 1, 16) - 1) << 4) | (clamp_val(t.rec8b, 1, 16) - 1));
 280         pci_write_config_byte(pdev, 0x48 + offset,
 281                 ((clamp_val(t.active, 1, 16) - 1) << 4) | (clamp_val(t.recover, 1, 16) - 1));
 282
 283         /* Load the UDMA bits according to type */
 284         switch (udma_type) {
 285         case ATA_UDMA2:
 286         default:
 287                 ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 5) - 2)) : 0x03;
 288                 break;
 289         case ATA_UDMA4:
 290                 ut = t.udma ? (0xe8 | (clamp_val(t.udma, 2, 9) - 2)) : 0x0f;
 291                 break;
 292         case ATA_UDMA5:
 293                 ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 9) - 2)) : 0x07;
 294                 break;
 295         case ATA_UDMA6:
 296                 ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 9) - 2)) : 0x07;
 297                 break;
 298         }
 299
 300         /* Set UDMA unless device is not UDMA capable */
 301         if (udma_type) {
 302                 u8 udma_etc;
 303
 304                 pci_read_config_byte(pdev, 0x50 + offset, &udma_etc);
 305
 306                 /* clear transfer mode bit */
 307                 udma_etc &= ~0x20;
 308
 309                 if (t.udma) {
 310                         /* preserve 80-wire cable detection bit */
 311                         udma_etc &= 0x10;
 312                         udma_etc |= ut;
 313                 }
 314
 315                 pci_write_config_byte(pdev, 0x50 + offset, udma_etc);
 316         }
 317 }
 318
 319 static void via_set_piomode(struct ata_port *ap, struct ata_device *adev)
 320 {
 321         const struct via_isa_bridge *config = ap->host->private_data;
 322         int set_ast = (config->flags & VIA_BAD_AST) ? 0 : 1;
 323
 324         via_do_set_mode(ap, adev, adev->pio_mode, set_ast, config->udma_mask);
 325 }
 326
 327 static void via_set_dmamode(struct ata_port *ap, struct ata_device *adev)
 328 {
 329         const struct via_isa_bridge *config = ap->host->private_data;
 330         int set_ast = (config->flags & VIA_BAD_AST) ? 0 : 1;
 331
 332         via_do_set_mode(ap, adev, adev->dma_mode, set_ast, config->udma_mask);
 333 }
 334
 335 /**
 336  *      via_mode_filter         -       filter buggy device/mode pairs
 337  *      @dev: ATA device
 338  *      @mask: Mode bitmask
 339  *
 340  *      We need to apply some minimal filtering for old controllers and at least
 341  *      one breed of Transcend SSD. Return the updated mask.
 342  */
 343
 344 static unsigned long via_mode_filter(struct ata_device *dev, unsigned long mask)
 345 {
 346         struct ata_host *host = dev->link->ap->host;
 347         const struct via_isa_bridge *config = host->private_data;
 348         unsigned char model_num[ATA_ID_PROD_LEN + 1];
 349
 350         if (config->id == PCI_DEVICE_ID_VIA_82C586_0) {
 351                 ata_id_c_string(dev->id, model_num, ATA_ID_PROD, sizeof(model_num));
 352                 if (strcmp(model_num, "TS64GSSD25-M") == 0) {
 353                         ata_dev_printk(dev, KERN_WARNING,
 354         "disabling UDMA mode due to reported lockups with this device.\n");
 355                         mask &= ~ ATA_MASK_UDMA;
 356                 }
 357         }
 358         return ata_bmdma_mode_filter(dev, mask);
 359 }
 360
 361 /**
 362  *      via_tf_load - send taskfile registers to host controller
 363  *      @ap: Port to which output is sent
 364  *      @tf: ATA taskfile register set
 365  *
 366  *      Outputs ATA taskfile to standard ATA host controller.
 367  *
 368  *      Note: This is to fix the internal bug of via chipsets, which
 369  *      will reset the device register after changing the IEN bit on
 370  *      ctl register
 371  */
 372 static void via_tf_load(struct ata_port *ap, const struct ata_taskfile *tf)
 373 {
 374         struct ata_ioports *ioaddr = &ap->ioaddr;
 375         struct via_port *vp = ap->private_data;
 376         unsigned int is_addr = tf->flags & ATA_TFLAG_ISADDR;
 377         int newctl = 0;
 378
 379         if (tf->ctl != ap->last_ctl) {
 380                 iowrite8(tf->ctl, ioaddr->ctl_addr);
 381                 ap->last_ctl = tf->ctl;
 382                 ata_wait_idle(ap);
 383                 newctl = 1;
 384         }
 385
 386         if (tf->flags & ATA_TFLAG_DEVICE) {
 387                 iowrite8(tf->device, ioaddr->device_addr);
 388                 vp->cached_device = tf->device;
 389         } else if (newctl)
 390                 iowrite8(vp->cached_device, ioaddr->device_addr);
 391
 392         if (is_addr && (tf->flags & ATA_TFLAG_LBA48)) {
 393                 WARN_ON_ONCE(!ioaddr->ctl_addr);
 394                 iowrite8(tf->hob_feature, ioaddr->feature_addr);
 395                 iowrite8(tf->hob_nsect, ioaddr->nsect_addr);
 396                 iowrite8(tf->hob_lbal, ioaddr->lbal_addr);
 397                 iowrite8(tf->hob_lbam, ioaddr->lbam_addr);
 398                 iowrite8(tf->hob_lbah, ioaddr->lbah_addr);
 399                 VPRINTK("hob: feat 0x%X nsect 0x%X, lba 0x%X 0x%X 0x%X\n",
 400                         tf->hob_feature,
 401                         tf->hob_nsect,
 402                         tf->hob_lbal,
 403                         tf->hob_lbam,
 404                         tf->hob_lbah);
 405         }
 406
 407         if (is_addr) {
 408                 iowrite8(tf->feature, ioaddr->feature_addr);
 409                 iowrite8(tf->nsect, ioaddr->nsect_addr);
 410                 iowrite8(tf->lbal, ioaddr->lbal_addr);
 411                 iowrite8(tf->lbam, ioaddr->lbam_addr);
 412                 iowrite8(tf->lbah, ioaddr->lbah_addr);
 413                 VPRINTK("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
 414                         tf->feature,
 415                         tf->nsect,
 416                         tf->lbal,
 417                         tf->lbam,
 418                         tf->lbah);
 419         }
 420
 421         ata_wait_idle(ap);
 422 }
 423
 424 static int via_port_start(struct ata_port *ap)
 425 {
 426         struct via_port *vp;
 427         struct pci_dev *pdev = to_pci_dev(ap->host->dev);
 428
 429         int ret = ata_sff_port_start(ap);
 430         if (ret < 0)
 431                 return ret;
 432
 433         vp = devm_kzalloc(&pdev->dev, sizeof(struct via_port), GFP_KERNEL);
 434         if (vp == NULL)
 435                 return -ENOMEM;
 436         ap->private_data = vp;
 437         return 0;
 438 }
 439
 440 static struct scsi_host_template via_sht = {
 441         ATA_BMDMA_SHT(DRV_NAME),
 442 };
 443
 444 static struct ata_port_operations via_port_ops = {
 445         .inherits       = &ata_bmdma_port_ops,
 446         .cable_detect   = via_cable_detect,
 447         .set_piomode    = via_set_piomode,
 448         .set_dmamode    = via_set_dmamode,
 449         .prereset       = via_pre_reset,
 450         .sff_tf_load    = via_tf_load,
 451         .port_start     = via_port_start,
 452         .mode_filter    = via_mode_filter,
 453 };
 454
 455 static struct ata_port_operations via_port_ops_noirq = {
 456         .inherits       = &via_port_ops,
 457         .sff_data_xfer  = ata_sff_data_xfer_noirq,
 458 };
 459
 460 /**
 461  *      via_config_fifo         -       set up the FIFO
 462  *      @pdev: PCI device
 463  *      @flags: configuration flags
 464  *
 465  *      Set the FIFO properties for this device if necessary. Used both on
 466  *      set up and on and the resume path
 467  */
 468
 469 static void via_config_fifo(struct pci_dev *pdev, unsigned int flags)
 470 {
 471         u8 enable;
 472
 473         /* 0x40 low bits indicate enabled channels */
 474         pci_read_config_byte(pdev, 0x40 , &enable);
 475         enable &= 3;
 476
 477         if (flags & VIA_SET_FIFO) {
 478                 static const u8 fifo_setting[4] = {0x00, 0x60, 0x00, 0x20};
 479                 u8 fifo;
 480
 481                 pci_read_config_byte(pdev, 0x43, &fifo);
 482
 483                 /* Clear PREQ# until DDACK# for errata */
 484                 if (flags & VIA_BAD_PREQ)
 485                         fifo &= 0x7F;
 486                 else
 487                         fifo &= 0x9f;
 488                 /* Turn on FIFO for enabled channels */
 489                 fifo |= fifo_setting[enable];
 490                 pci_write_config_byte(pdev, 0x43, fifo);
 491         }
 492 }
 493
 494 /**
 495  *      via_init_one            -       discovery callback
 496  *      @pdev: PCI device
 497  *      @id: PCI table info
 498  *
 499  *      A VIA IDE interface has been discovered. Figure out what revision
 500  *      and perform configuration work before handing it to the ATA layer
 501  */
 502
 503 static int via_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
 504 {
 505         /* Early VIA without UDMA support */
 506         static const struct ata_port_info via_mwdma_info = {
 507                 .flags = ATA_FLAG_SLAVE_POSS,
 508                 .pio_mask = ATA_PIO4,
 509                 .mwdma_mask = ATA_MWDMA2,
 510                 .port_ops = &via_port_ops
 511         };
 512         /* Ditto with IRQ masking required */
 513         static const struct ata_port_info via_mwdma_info_borked = {
 514                 .flags = ATA_FLAG_SLAVE_POSS,
 515                 .pio_mask = ATA_PIO4,
 516                 .mwdma_mask = ATA_MWDMA2,
 517                 .port_ops = &via_port_ops_noirq,
 518         };
 519         /* VIA UDMA 33 devices (and borked 66) */
 520         static const struct ata_port_info via_udma33_info = {
 521                 .flags = ATA_FLAG_SLAVE_POSS,
 522                 .pio_mask = ATA_PIO4,
 523                 .mwdma_mask = ATA_MWDMA2,
 524                 .udma_mask = ATA_UDMA2,
 525                 .port_ops = &via_port_ops
 526         };
 527         /* VIA UDMA 66 devices */
 528         static const struct ata_port_info via_udma66_info = {
 529                 .flags = ATA_FLAG_SLAVE_POSS,
 530                 .pio_mask = ATA_PIO4,
 531                 .mwdma_mask = ATA_MWDMA2,
 532                 .udma_mask = ATA_UDMA4,
 533                 .port_ops = &via_port_ops
 534         };
 535         /* VIA UDMA 100 devices */
 536         static const struct ata_port_info via_udma100_info = {
 537                 .flags = ATA_FLAG_SLAVE_POSS,
 538                 .pio_mask = ATA_PIO4,
 539                 .mwdma_mask = ATA_MWDMA2,
 540                 .udma_mask = ATA_UDMA5,
 541                 .port_ops = &via_port_ops
 542         };
 543         /* UDMA133 with bad AST (All current 133) */
 544         static const struct ata_port_info via_udma133_info = {
 545                 .flags = ATA_FLAG_SLAVE_POSS,
 546                 .pio_mask = ATA_PIO4,
 547                 .mwdma_mask = ATA_MWDMA2,
 548                 .udma_mask = ATA_UDMA6, /* FIXME: should check north bridge */
 549                 .port_ops = &via_port_ops
 550         };
 551         const struct ata_port_info *ppi[] = { NULL, NULL };
 552         struct pci_dev *isa;
 553         const struct via_isa_bridge *config;
 554         static int printed_version;
 555         u8 enable;
 556         u32 timing;
 557         unsigned long flags = id->driver_data;
 558         int rc;
 559
 560         if (!printed_version++)
 561                 dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n");
 562
 563         rc = pcim_enable_device(pdev);
 564         if (rc)
 565                 return rc;
 566
 567         if (flags & VIA_IDFLAG_SINGLE)
 568                 ppi[1] = &ata_dummy_port_info;
 569
 570         /* To find out how the IDE will behave and what features we
 571            actually have to look at the bridge not the IDE controller */
 572         for (config = via_isa_bridges; config->id != PCI_DEVICE_ID_VIA_ANON;
 573              config++)
 574                 if ((isa = pci_get_device(PCI_VENDOR_ID_VIA +
 575                         !!(config->flags & VIA_BAD_ID),
 576                         config->id, NULL))) {
 577                         u8 rev = isa->revision;
 578                         pci_dev_put(isa);
 579
 580                         if ((id->device == 0x0415 || id->device == 0x3164) &&
 581                             (config->id != id->device))
 582                                 continue;
 583
 584                         if (rev >= config->rev_min && rev <= config->rev_max)
 585                                 break;
 586                 }
 587
 588         if (!(config->flags & VIA_NO_ENABLES)) {
 589                 /* 0x40 low bits indicate enabled channels */
 590                 pci_read_config_byte(pdev, 0x40 , &enable);
 591                 enable &= 3;
 592                 if (enable == 0)
 593                         return -ENODEV;
 594         }
 595
 596         /* Initialise the FIFO for the enabled channels. */
 597         via_config_fifo(pdev, config->flags);
 598
 599         /* Clock set up */
 600         switch (config->udma_mask) {
 601         case 0x00:
 602                 if (config->flags & VIA_NO_UNMASK)
 603                         ppi[0] = &via_mwdma_info_borked;
 604                 else
 605                         ppi[0] = &via_mwdma_info;
 606                 break;
 607         case ATA_UDMA2:
 608                 ppi[0] = &via_udma33_info;
 609                 break;
 610         case ATA_UDMA4:
 611                 ppi[0] = &via_udma66_info;
 612                 break;
 613         case ATA_UDMA5:
 614                 ppi[0] = &via_udma100_info;
 615                 break;
 616         case ATA_UDMA6:
 617                 ppi[0] = &via_udma133_info;
 618                 break;
 619         default:
 620                 WARN_ON(1);
 621                 return -ENODEV;
 622         }
 623
 624         if (config->flags & VIA_BAD_CLK66) {
 625                 /* Disable the 66MHz clock on problem devices */
 626                 pci_read_config_dword(pdev, 0x50, &timing);
 627                 timing &= ~0x80008;
 628                 pci_write_config_dword(pdev, 0x50, timing);
 629         }
 630
 631         /* We have established the device type, now fire it up */
 632         return ata_pci_sff_init_one(pdev, ppi, &via_sht, (void *)config, 0);
 633 }
 634
 635 #ifdef CONFIG_PM
 636 /**
 637  *      via_reinit_one          -       reinit after resume
 638  *      @pdev; PCI device
 639  *
 640  *      Called when the VIA PATA device is resumed. We must then
 641  *      reconfigure the fifo and other setup we may have altered. In
 642  *      addition the kernel needs to have the resume methods on PCI
 643  *      quirk supported.
 644  */
 645
 646 static int via_reinit_one(struct pci_dev *pdev)
 647 {
 648         u32 timing;
 649         struct ata_host *host = dev_get_drvdata(&pdev->dev);
 650         const struct via_isa_bridge *config = host->private_data;
 651         int rc;
 652
 653         rc = ata_pci_device_do_resume(pdev);
 654         if (rc)
 655                 return rc;
 656
 657         via_config_fifo(pdev, config->flags);
 658
 659         if (config->udma_mask == ATA_UDMA4) {
 660                 /* The 66 MHz devices require we enable the clock */
 661                 pci_read_config_dword(pdev, 0x50, &timing);
 662                 timing |= 0x80008;
 663                 pci_write_config_dword(pdev, 0x50, timing);
 664         }
 665         if (config->flags & VIA_BAD_CLK66) {
 666                 /* Disable the 66MHz clock on problem devices */
 667                 pci_read_config_dword(pdev, 0x50, &timing);
 668                 timing &= ~0x80008;
 669                 pci_write_config_dword(pdev, 0x50, timing);
 670         }
 671
 672         ata_host_resume(host);
 673         return 0;
 674 }
 675 #endif
 676
 677 static const struct pci_device_id via[] = {
 678         { PCI_VDEVICE(VIA, 0x0415), },
 679         { PCI_VDEVICE(VIA, 0x0571), },
 680         { PCI_VDEVICE(VIA, 0x0581), },
 681         { PCI_VDEVICE(VIA, 0x1571), },
 682         { PCI_VDEVICE(VIA, 0x3164), },
 683         { PCI_VDEVICE(VIA, 0x5324), },
 684         { PCI_VDEVICE(VIA, 0xC409), VIA_IDFLAG_SINGLE },
 685         { PCI_VDEVICE(VIA, 0x9001), VIA_IDFLAG_SINGLE },
 686
 687         { },
 688 };
 689
 690 static struct pci_driver via_pci_driver = {
 691         .name           = DRV_NAME,
 692         .id_table       = via,
 693         .probe          = via_init_one,
 694         .remove         = ata_pci_remove_one,
 695 #ifdef CONFIG_PM
 696         .suspend        = ata_pci_device_suspend,
 697         .resume         = via_reinit_one,
 698 #endif
 699 };
 700
 701 static int __init via_init(void)
 702 {
 703         return pci_register_driver(&via_pci_driver);
 704 }
 705
 706 static void __exit via_exit(void)
 707 {
 708         pci_unregister_driver(&via_pci_driver);
 709 }
 710
 711 MODULE_AUTHOR("Alan Cox");
 712 MODULE_DESCRIPTION("low-level driver for VIA PATA");
 713 MODULE_LICENSE("GPL");
 714 MODULE_DEVICE_TABLE(pci, via);
 715 MODULE_VERSION(DRV_VERSION);
 716
 717 module_init(via_init);
 718 module_exit(via_exit);