drivers/block/ahci.c

   1 /*
   2  * Copyright (C) Freescale Semiconductor, Inc. 2006.
   3  * Author: Jason Jin<Jason.jin@freescale.com>
   4  *         Zhang Wei<wei.zhang@freescale.com>
   5  *
   6  * See file CREDITS for list of people who contributed to this
   7  * project.
   8  *
   9  * This program is free software; you can redistribute it and/or
  10  * modify it under the terms of the GNU General Public License as
  11  * published by the Free Software Foundation; either version 2 of
  12  * the License, or (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22  * MA 02111-1307 USA
  23  *
  24  * with the reference on libata and ahci drvier in kernel
  25  *
  26  */
  27 #include <common.h>
  28
  29 #include <command.h>
  30 #include <pci.h>
  31 #include <asm/processor.h>
  32 #include <asm/errno.h>
  33 #include <asm/io.h>
  34 #include <malloc.h>
  35 #include <scsi.h>
  36 #include <ata.h>
  37 #include <linux/ctype.h>
  38 #include <ahci.h>
  39
  40 struct ahci_probe_ent *probe_ent = NULL;
  41 hd_driveid_t *ataid[AHCI_MAX_PORTS];
  42
  43 #define writel_with_flush(a,b)  do { writel(a,b); readl(b); } while (0)
  44
  45 /*
  46  * Some controllers limit number of blocks they can read at once. Contemporary
  47  * SSD devices work much faster if the read size is aligned to a power of 2.
  48  * Let's set default to 128 and allowing to be overwritten if needed.
  49  */
  50 #ifndef MAX_SATA_BLOCKS_READ
  51 #define MAX_SATA_BLOCKS_READ    0x80
  52 #endif
  53
  54 static inline u32 ahci_port_base(u32 base, u32 port)
  55 {
  56         return base + 0x100 + (port * 0x80);
  57 }
  58
  59
  60 static void ahci_setup_port(struct ahci_ioports *port, unsigned long base,
  61                             unsigned int port_idx)
  62 {
  63         base = ahci_port_base(base, port_idx);
  64
  65         port->cmd_addr = base;
  66         port->scr_addr = base + PORT_SCR;
  67 }
  68
  69
  70 #define msleep(a) udelay(a * 1000)
  71
  72 static int waiting_for_cmd_completed(volatile u8 *offset,
  73                                      int timeout_msec,
  74                                      u32 sign)
  75 {
  76         int i;
  77         u32 status;
  78
  79         for (i = 0; ((status = readl(offset)) & sign) && i < timeout_msec; i++)
  80                 msleep(1);
  81
  82         return (i < timeout_msec) ? 0 : -1;
  83 }
  84
  85
  86 static int ahci_host_init(struct ahci_probe_ent *probe_ent)
  87 {
  88 #ifndef CONFIG_SCSI_AHCI_PLAT
  89         pci_dev_t pdev = probe_ent->dev;
  90         u16 tmp16;
  91         unsigned short vendor;
  92 #endif
  93         volatile u8 *mmio = (volatile u8 *)probe_ent->mmio_base;
  94         u32 tmp, cap_save;
  95         int i, j;
  96         volatile u8 *port_mmio;
  97
  98         debug("ahci_host_init: start\n");
  99
 100         cap_save = readl(mmio + HOST_CAP);
 101         cap_save &= ((1 << 28) | (1 << 17));
 102         cap_save |= (1 << 27);
 103
 104         /* global controller reset */
 105         tmp = readl(mmio + HOST_CTL);
 106         if ((tmp & HOST_RESET) == 0)
 107                 writel_with_flush(tmp | HOST_RESET, mmio + HOST_CTL);
 108
 109         /* reset must complete within 1 second, or
 110          * the hardware should be considered fried.
 111          */
 112         i = 1000;
 113         do {
 114                 udelay(1000);
 115                 tmp = readl(mmio + HOST_CTL);
 116                 if (!i--) {
 117                         debug("controller reset failed (0x%x)\n", tmp);
 118                         return -1;
 119                 }
 120         } while (tmp & HOST_RESET);
 121
 122         writel_with_flush(HOST_AHCI_EN, mmio + HOST_CTL);
 123         writel(cap_save, mmio + HOST_CAP);
 124         writel_with_flush(0xf, mmio + HOST_PORTS_IMPL);
 125
 126 #ifndef CONFIG_SCSI_AHCI_PLAT
 127         pci_read_config_word(pdev, PCI_VENDOR_ID, &vendor);
 128
 129         if (vendor == PCI_VENDOR_ID_INTEL) {
 130                 u16 tmp16;
 131                 pci_read_config_word(pdev, 0x92, &tmp16);
 132                 tmp16 |= 0xf;
 133                 pci_write_config_word(pdev, 0x92, tmp16);
 134         }
 135 #endif
 136         probe_ent->cap = readl(mmio + HOST_CAP);
 137         probe_ent->port_map = readl(mmio + HOST_PORTS_IMPL);
 138         probe_ent->n_ports = (probe_ent->cap & 0x1f) + 1;
 139
 140         debug("cap 0x%x  port_map 0x%x  n_ports %d\n",
 141               probe_ent->cap, probe_ent->port_map, probe_ent->n_ports);
 142
 143         if (probe_ent->n_ports > CONFIG_SYS_SCSI_MAX_SCSI_ID)
 144                 probe_ent->n_ports = CONFIG_SYS_SCSI_MAX_SCSI_ID;
 145
 146         for (i = 0; i < probe_ent->n_ports; i++) {
 147                 probe_ent->port[i].port_mmio = ahci_port_base((u32) mmio, i);
 148                 port_mmio = (u8 *) probe_ent->port[i].port_mmio;
 149                 ahci_setup_port(&probe_ent->port[i], (unsigned long)mmio, i);
 150
 151                 /* make sure port is not active */
 152                 tmp = readl(port_mmio + PORT_CMD);
 153                 if (tmp & (PORT_CMD_LIST_ON | PORT_CMD_FIS_ON |
 154                            PORT_CMD_FIS_RX | PORT_CMD_START)) {
 155                         debug("Port %d is active. Deactivating.\n", i);
 156                         tmp &= ~(PORT_CMD_LIST_ON | PORT_CMD_FIS_ON |
 157                                  PORT_CMD_FIS_RX | PORT_CMD_START);
 158                         writel_with_flush(tmp, port_mmio + PORT_CMD);
 159
 160                         /* spec says 500 msecs for each bit, so
 161                          * this is slightly incorrect.
 162                          */
 163                         msleep(500);
 164                 }
 165
 166                 debug("Spinning up port %d... ", i);
 167                 writel(PORT_CMD_SPIN_UP, port_mmio + PORT_CMD);
 168
 169                 j = 0;
 170                 while (j < 1000) {
 171                         tmp = readl(port_mmio + PORT_SCR_STAT);
 172                         if ((tmp & 0xf) == 0x3)
 173                                 break;
 174                         udelay(1000);
 175                         j++;
 176                 }
 177                 if (j == 1000)
 178                         debug("timeout.\n");
 179                 else
 180                         debug("ok.\n");
 181
 182                 tmp = readl(port_mmio + PORT_SCR_ERR);
 183                 debug("PORT_SCR_ERR 0x%x\n", tmp);
 184                 writel(tmp, port_mmio + PORT_SCR_ERR);
 185
 186                 /* ack any pending irq events for this port */
 187                 tmp = readl(port_mmio + PORT_IRQ_STAT);
 188                 debug("PORT_IRQ_STAT 0x%x\n", tmp);
 189                 if (tmp)
 190                         writel(tmp, port_mmio + PORT_IRQ_STAT);
 191
 192                 writel(1 << i, mmio + HOST_IRQ_STAT);
 193
 194                 /* set irq mask (enables interrupts) */
 195                 writel(DEF_PORT_IRQ, port_mmio + PORT_IRQ_MASK);
 196
 197                 /* register linkup ports */
 198                 tmp = readl(port_mmio + PORT_SCR_STAT);
 199                 debug("Port %d status: 0x%x\n", i, tmp);
 200                 if ((tmp & 0xf) == 0x03)
 201                         probe_ent->link_port_map |= (0x01 << i);
 202         }
 203
 204         tmp = readl(mmio + HOST_CTL);
 205         debug("HOST_CTL 0x%x\n", tmp);
 206         writel(tmp | HOST_IRQ_EN, mmio + HOST_CTL);
 207         tmp = readl(mmio + HOST_CTL);
 208         debug("HOST_CTL 0x%x\n", tmp);
 209 #ifndef CONFIG_SCSI_AHCI_PLAT
 210         pci_read_config_word(pdev, PCI_COMMAND, &tmp16);
 211         tmp |= PCI_COMMAND_MASTER;
 212         pci_write_config_word(pdev, PCI_COMMAND, tmp16);
 213 #endif
 214         return 0;
 215 }
 216
 217
 218 static void ahci_print_info(struct ahci_probe_ent *probe_ent)
 219 {
 220 #ifndef CONFIG_SCSI_AHCI_PLAT
 221         pci_dev_t pdev = probe_ent->dev;
 222         u16 cc;
 223 #endif
 224         volatile u8 *mmio = (volatile u8 *)probe_ent->mmio_base;
 225         u32 vers, cap, cap2, impl, speed;
 226         const char *speed_s;
 227         const char *scc_s;
 228
 229         vers = readl(mmio + HOST_VERSION);
 230         cap = probe_ent->cap;
 231         cap2 = readl(mmio + HOST_CAP2);
 232         impl = probe_ent->port_map;
 233
 234         speed = (cap >> 20) & 0xf;
 235         if (speed == 1)
 236                 speed_s = "1.5";
 237         else if (speed == 2)
 238                 speed_s = "3";
 239         else if (speed == 3)
 240                 speed_s = "6";
 241         else
 242                 speed_s = "?";
 243
 244 #ifdef CONFIG_SCSI_AHCI_PLAT
 245         scc_s = "SATA";
 246 #else
 247         pci_read_config_word(pdev, 0x0a, &cc);
 248         if (cc == 0x0101)
 249                 scc_s = "IDE";
 250         else if (cc == 0x0106)
 251                 scc_s = "SATA";
 252         else if (cc == 0x0104)
 253                 scc_s = "RAID";
 254         else
 255                 scc_s = "unknown";
 256 #endif
 257         printf("AHCI %02x%02x.%02x%02x "
 258                "%u slots %u ports %s Gbps 0x%x impl %s mode\n",
 259                (vers >> 24) & 0xff,
 260                (vers >> 16) & 0xff,
 261                (vers >> 8) & 0xff,
 262                vers & 0xff,
 263                ((cap >> 8) & 0x1f) + 1, (cap & 0x1f) + 1, speed_s, impl, scc_s);
 264
 265         printf("flags: "
 266                "%s%s%s%s%s%s%s"
 267                "%s%s%s%s%s%s%s"
 268                "%s%s%s%s%s%s\n",
 269                cap & (1 << 31) ? "64bit " : "",
 270                cap & (1 << 30) ? "ncq " : "",
 271                cap & (1 << 28) ? "ilck " : "",
 272                cap & (1 << 27) ? "stag " : "",
 273                cap & (1 << 26) ? "pm " : "",
 274                cap & (1 << 25) ? "led " : "",
 275                cap & (1 << 24) ? "clo " : "",
 276                cap & (1 << 19) ? "nz " : "",
 277                cap & (1 << 18) ? "only " : "",
 278                cap & (1 << 17) ? "pmp " : "",
 279                cap & (1 << 16) ? "fbss " : "",
 280                cap & (1 << 15) ? "pio " : "",
 281                cap & (1 << 14) ? "slum " : "",
 282                cap & (1 << 13) ? "part " : "",
 283                cap & (1 << 7) ? "ccc " : "",
 284                cap & (1 << 6) ? "ems " : "",
 285                cap & (1 << 5) ? "sxs " : "",
 286                cap2 & (1 << 2) ? "apst " : "",
 287                cap2 & (1 << 1) ? "nvmp " : "",
 288                cap2 & (1 << 0) ? "boh " : "");
 289 }
 290
 291 #ifndef CONFIG_SCSI_AHCI_PLAT
 292 static int ahci_init_one(pci_dev_t pdev)
 293 {
 294         u16 vendor;
 295         int rc;
 296
 297         memset((void *)ataid, 0, sizeof(hd_driveid_t *) * AHCI_MAX_PORTS);
 298
 299         probe_ent = malloc(sizeof(struct ahci_probe_ent));
 300         memset(probe_ent, 0, sizeof(struct ahci_probe_ent));
 301         probe_ent->dev = pdev;
 302
 303         probe_ent->host_flags = ATA_FLAG_SATA
 304                                 | ATA_FLAG_NO_LEGACY
 305                                 | ATA_FLAG_MMIO
 306                                 | ATA_FLAG_PIO_DMA
 307                                 | ATA_FLAG_NO_ATAPI;
 308         probe_ent->pio_mask = 0x1f;
 309         probe_ent->udma_mask = 0x7f;    /*Fixme,assume to support UDMA6 */
 310
 311         pci_read_config_dword(pdev, PCI_BASE_ADDRESS_5, &probe_ent->mmio_base);
 312         debug("ahci mmio_base=0x%08x\n", probe_ent->mmio_base);
 313
 314         /* Take from kernel:
 315          * JMicron-specific fixup:
 316          * make sure we're in AHCI mode
 317          */
 318         pci_read_config_word(pdev, PCI_VENDOR_ID, &vendor);
 319         if (vendor == 0x197b)
 320                 pci_write_config_byte(pdev, 0x41, 0xa1);
 321
 322         /* initialize adapter */
 323         rc = ahci_host_init(probe_ent);
 324         if (rc)
 325                 goto err_out;
 326
 327         ahci_print_info(probe_ent);
 328
 329         return 0;
 330
 331       err_out:
 332         return rc;
 333 }
 334 #endif
 335
 336 #define MAX_DATA_BYTE_COUNT  (4*1024*1024)
 337
 338 static int ahci_fill_sg(u8 port, unsigned char *buf, int buf_len)
 339 {
 340         struct ahci_ioports *pp = &(probe_ent->port[port]);
 341         struct ahci_sg *ahci_sg = pp->cmd_tbl_sg;
 342         u32 sg_count;
 343         int i;
 344
 345         sg_count = ((buf_len - 1) / MAX_DATA_BYTE_COUNT) + 1;
 346         if (sg_count > AHCI_MAX_SG) {
 347                 printf("Error:Too much sg!\n");
 348                 return -1;
 349         }
 350
 351         for (i = 0; i < sg_count; i++) {
 352                 ahci_sg->addr =
 353                     cpu_to_le32((u32) buf + i * MAX_DATA_BYTE_COUNT);
 354                 ahci_sg->addr_hi = 0;
 355                 ahci_sg->flags_size = cpu_to_le32(0x3fffff &
 356                                           (buf_len < MAX_DATA_BYTE_COUNT
 357                                            ? (buf_len - 1)
 358                                            : (MAX_DATA_BYTE_COUNT - 1)));
 359                 ahci_sg++;
 360                 buf_len -= MAX_DATA_BYTE_COUNT;
 361         }
 362
 363         return sg_count;
 364 }
 365
 366
 367 static void ahci_fill_cmd_slot(struct ahci_ioports *pp, u32 opts)
 368 {
 369         pp->cmd_slot->opts = cpu_to_le32(opts);
 370         pp->cmd_slot->status = 0;
 371         pp->cmd_slot->tbl_addr = cpu_to_le32(pp->cmd_tbl & 0xffffffff);
 372         pp->cmd_slot->tbl_addr_hi = 0;
 373 }
 374
 375
 376 static void ahci_set_feature(u8 port)
 377 {
 378         struct ahci_ioports *pp = &(probe_ent->port[port]);
 379         volatile u8 *port_mmio = (volatile u8 *)pp->port_mmio;
 380         u32 cmd_fis_len = 5;    /* five dwords */
 381         u8 fis[20];
 382
 383         /* set feature */
 384         memset(fis, 0, 20);
 385         fis[0] = 0x27;
 386         fis[1] = 1 << 7;
 387         fis[2] = ATA_CMD_SETF;
 388         fis[3] = SETFEATURES_XFER;
 389         fis[12] = __ilog2(probe_ent->udma_mask + 1) + 0x40 - 0x01;
 390
 391         memcpy((unsigned char *)pp->cmd_tbl, fis, 20);
 392         ahci_fill_cmd_slot(pp, cmd_fis_len);
 393         writel(1, port_mmio + PORT_CMD_ISSUE);
 394         readl(port_mmio + PORT_CMD_ISSUE);
 395
 396         if (waiting_for_cmd_completed(port_mmio + PORT_CMD_ISSUE, 150, 0x1)) {
 397                 printf("set feature error on port %d!\n", port);
 398         }
 399 }
 400
 401
 402 static int ahci_port_start(u8 port)
 403 {
 404         struct ahci_ioports *pp = &(probe_ent->port[port]);
 405         volatile u8 *port_mmio = (volatile u8 *)pp->port_mmio;
 406         u32 port_status;
 407         u32 mem;
 408
 409         debug("Enter start port: %d\n", port);
 410         port_status = readl(port_mmio + PORT_SCR_STAT);
 411         debug("Port %d status: %x\n", port, port_status);
 412         if ((port_status & 0xf) != 0x03) {
 413                 printf("No Link on this port!\n");
 414                 return -1;
 415         }
 416
 417         mem = (u32) malloc(AHCI_PORT_PRIV_DMA_SZ + 2048);
 418         if (!mem) {
 419                 free(pp);
 420                 printf("No mem for table!\n");
 421                 return -ENOMEM;
 422         }
 423
 424         mem = (mem + 0x800) & (~0x7ff); /* Aligned to 2048-bytes */
 425         memset((u8 *) mem, 0, AHCI_PORT_PRIV_DMA_SZ);
 426
 427         /*
 428          * First item in chunk of DMA memory: 32-slot command table,
 429          * 32 bytes each in size
 430          */
 431         pp->cmd_slot = (struct ahci_cmd_hdr *)mem;
 432         debug("cmd_slot = 0x%x\n", (unsigned)pp->cmd_slot);
 433         mem += (AHCI_CMD_SLOT_SZ + 224);
 434
 435         /*
 436          * Second item: Received-FIS area
 437          */
 438         pp->rx_fis = mem;
 439         mem += AHCI_RX_FIS_SZ;
 440
 441         /*
 442          * Third item: data area for storing a single command
 443          * and its scatter-gather table
 444          */
 445         pp->cmd_tbl = mem;
 446         debug("cmd_tbl_dma = 0x%x\n", pp->cmd_tbl);
 447
 448         mem += AHCI_CMD_TBL_HDR;
 449         pp->cmd_tbl_sg = (struct ahci_sg *)mem;
 450
 451         writel_with_flush((u32) pp->cmd_slot, port_mmio + PORT_LST_ADDR);
 452
 453         writel_with_flush(pp->rx_fis, port_mmio + PORT_FIS_ADDR);
 454
 455         writel_with_flush(PORT_CMD_ICC_ACTIVE | PORT_CMD_FIS_RX |
 456                           PORT_CMD_POWER_ON | PORT_CMD_SPIN_UP |
 457                           PORT_CMD_START, port_mmio + PORT_CMD);
 458
 459         debug("Exit start port %d\n", port);
 460
 461         return 0;
 462 }
 463
 464
 465 static int get_ahci_device_data(u8 port, u8 *fis, int fis_len, u8 *buf,
 466                                 int buf_len)
 467 {
 468
 469         struct ahci_ioports *pp = &(probe_ent->port[port]);
 470         volatile u8 *port_mmio = (volatile u8 *)pp->port_mmio;
 471         u32 opts;
 472         u32 port_status;
 473         int sg_count;
 474
 475         debug("Enter get_ahci_device_data: for port %d\n", port);
 476
 477         if (port > probe_ent->n_ports) {
 478                 printf("Invaild port number %d\n", port);
 479                 return -1;
 480         }
 481
 482         port_status = readl(port_mmio + PORT_SCR_STAT);
 483         if ((port_status & 0xf) != 0x03) {
 484                 debug("No Link on port %d!\n", port);
 485                 return -1;
 486         }
 487
 488         memcpy((unsigned char *)pp->cmd_tbl, fis, fis_len);
 489
 490         sg_count = ahci_fill_sg(port, buf, buf_len);
 491         opts = (fis_len >> 2) | (sg_count << 16);
 492         ahci_fill_cmd_slot(pp, opts);
 493
 494         writel_with_flush(1, port_mmio + PORT_CMD_ISSUE);
 495
 496         if (waiting_for_cmd_completed(port_mmio + PORT_CMD_ISSUE, 150, 0x1)) {
 497                 printf("timeout exit!\n");
 498                 return -1;
 499         }
 500         debug("get_ahci_device_data: %d byte transferred.\n",
 501               pp->cmd_slot->status);
 502
 503         return 0;
 504 }
 505
 506
 507 static char *ata_id_strcpy(u16 *target, u16 *src, int len)
 508 {
 509         int i;
 510         for (i = 0; i < len / 2; i++)
 511                 target[i] = swab16(src[i]);
 512         return (char *)target;
 513 }
 514
 515
 516 static void dump_ataid(hd_driveid_t *ataid)
 517 {
 518         debug("(49)ataid->capability = 0x%x\n", ataid->capability);
 519         debug("(53)ataid->field_valid =0x%x\n", ataid->field_valid);
 520         debug("(63)ataid->dma_mword = 0x%x\n", ataid->dma_mword);
 521         debug("(64)ataid->eide_pio_modes = 0x%x\n", ataid->eide_pio_modes);
 522         debug("(75)ataid->queue_depth = 0x%x\n", ataid->queue_depth);
 523         debug("(80)ataid->major_rev_num = 0x%x\n", ataid->major_rev_num);
 524         debug("(81)ataid->minor_rev_num = 0x%x\n", ataid->minor_rev_num);
 525         debug("(82)ataid->command_set_1 = 0x%x\n", ataid->command_set_1);
 526         debug("(83)ataid->command_set_2 = 0x%x\n", ataid->command_set_2);
 527         debug("(84)ataid->cfsse = 0x%x\n", ataid->cfsse);
 528         debug("(85)ataid->cfs_enable_1 = 0x%x\n", ataid->cfs_enable_1);
 529         debug("(86)ataid->cfs_enable_2 = 0x%x\n", ataid->cfs_enable_2);
 530         debug("(87)ataid->csf_default = 0x%x\n", ataid->csf_default);
 531         debug("(88)ataid->dma_ultra = 0x%x\n", ataid->dma_ultra);
 532         debug("(93)ataid->hw_config = 0x%x\n", ataid->hw_config);
 533 }
 534
 535
 536 /*
 537  * SCSI INQUIRY command operation.
 538  */
 539 static int ata_scsiop_inquiry(ccb *pccb)
 540 {
 541         u8 hdr[] = {
 542                 0,
 543                 0,
 544                 0x5,            /* claim SPC-3 version compatibility */
 545                 2,
 546                 95 - 4,
 547         };
 548         u8 fis[20];
 549         u8 *tmpid;
 550         u8 port;
 551
 552         /* Clean ccb data buffer */
 553         memset(pccb->pdata, 0, pccb->datalen);
 554
 555         memcpy(pccb->pdata, hdr, sizeof(hdr));
 556
 557         if (pccb->datalen <= 35)
 558                 return 0;
 559
 560         memset(fis, 0, 20);
 561         /* Construct the FIS */
 562         fis[0] = 0x27;          /* Host to device FIS. */
 563         fis[1] = 1 << 7;        /* Command FIS. */
 564         fis[2] = ATA_CMD_IDENT; /* Command byte. */
 565
 566         /* Read id from sata */
 567         port = pccb->target;
 568         if (!(tmpid = malloc(sizeof(hd_driveid_t))))
 569                 return -ENOMEM;
 570
 571         if (get_ahci_device_data(port, (u8 *) & fis, 20,
 572                                  tmpid, sizeof(hd_driveid_t))) {
 573                 debug("scsi_ahci: SCSI inquiry command failure.\n");
 574                 return -EIO;
 575         }
 576
 577         if (ataid[port])
 578                 free(ataid[port]);
 579         ataid[port] = (hd_driveid_t *) tmpid;
 580
 581         memcpy(&pccb->pdata[8], "ATA     ", 8);
 582         ata_id_strcpy((u16 *) &pccb->pdata[16], (u16 *)ataid[port]->model, 16);
 583         ata_id_strcpy((u16 *) &pccb->pdata[32], (u16 *)ataid[port]->fw_rev, 4);
 584
 585         dump_ataid(ataid[port]);
 586         return 0;
 587 }
 588
 589
 590 /*
 591  * SCSI READ10 command operation.
 592  */
 593 static int ata_scsiop_read10(ccb * pccb)
 594 {
 595         u32 lba = 0;
 596         u16 blocks = 0;
 597         u8 fis[20];
 598         u8 *user_buffer = pccb->pdata;
 599         u32 user_buffer_size = pccb->datalen;
 600
 601         /* Retrieve the base LBA number from the ccb structure. */
 602         memcpy(&lba, pccb->cmd + 2, sizeof(lba));
 603         lba = be32_to_cpu(lba);
 604
 605         /*
 606          * And the number of blocks.
 607          *
 608          * For 10-byte and 16-byte SCSI R/W commands, transfer
 609          * length 0 means transfer 0 block of data.
 610          * However, for ATA R/W commands, sector count 0 means
 611          * 256 or 65536 sectors, not 0 sectors as in SCSI.
 612          *
 613          * WARNING: one or two older ATA drives treat 0 as 0...
 614          */
 615         blocks = (((u16)pccb->cmd[7]) << 8) | ((u16) pccb->cmd[8]);
 616
 617         debug("scsi_ahci: read %d blocks starting from lba 0x%x\n",
 618               (unsigned)lba, blocks);
 619
 620         /* Preset the FIS */
 621         memset(fis, 0, 20);
 622         fis[0] = 0x27;           /* Host to device FIS. */
 623         fis[1] = 1 << 7;         /* Command FIS. */
 624         fis[2] = ATA_CMD_RD_DMA; /* Command byte. */
 625
 626         while (blocks) {
 627                 u16 now_blocks; /* number of blocks per iteration */
 628                 u32 transfer_size; /* number of bytes per iteration */
 629
 630                 now_blocks = min(MAX_SATA_BLOCKS_READ, blocks);
 631
 632                 transfer_size = ATA_BLOCKSIZE * now_blocks;
 633                 if (transfer_size > user_buffer_size) {
 634                         printf("scsi_ahci: Error: buffer too small.\n");
 635                         return -EIO;
 636                 }
 637
 638                 /* LBA address, only support LBA28 in this driver */
 639                 fis[4] = (lba >> 0) & 0xff;
 640                 fis[5] = (lba >> 8) & 0xff;
 641                 fis[6] = (lba >> 16) & 0xff;
 642                 fis[7] = ((lba >> 24) & 0xf) | 0xe0;
 643
 644                 /* Block (sector) count */
 645                 fis[12] = (now_blocks >> 0) & 0xff;
 646                 fis[13] = (now_blocks >> 8) & 0xff;
 647
 648                 /* Read from ahci */
 649                 if (get_ahci_device_data(pccb->target, (u8 *) &fis, sizeof(fis),
 650                                          user_buffer, user_buffer_size)) {
 651                         debug("scsi_ahci: SCSI READ10 command failure.\n");
 652                         return -EIO;
 653                 }
 654                 user_buffer += transfer_size;
 655                 user_buffer_size -= transfer_size;
 656                 blocks -= now_blocks;
 657                 lba += now_blocks;
 658         }
 659
 660         return 0;
 661 }
 662
 663
 664 /*
 665  * SCSI READ CAPACITY10 command operation.
 666  */
 667 static int ata_scsiop_read_capacity10(ccb *pccb)
 668 {
 669         u32 cap;
 670
 671         if (!ataid[pccb->target]) {
 672                 printf("scsi_ahci: SCSI READ CAPACITY10 command failure. "
 673                        "\tNo ATA info!\n"
 674                        "\tPlease run SCSI commmand INQUIRY firstly!\n");
 675                 return -EPERM;
 676         }
 677
 678         cap = be32_to_cpu(ataid[pccb->target]->lba_capacity);
 679         memcpy(pccb->pdata, &cap, sizeof(cap));
 680
 681         pccb->pdata[4] = pccb->pdata[5] = 0;
 682         pccb->pdata[6] = 512 >> 8;
 683         pccb->pdata[7] = 512 & 0xff;
 684
 685         return 0;
 686 }
 687
 688
 689 /*
 690  * SCSI TEST UNIT READY command operation.
 691  */
 692 static int ata_scsiop_test_unit_ready(ccb *pccb)
 693 {
 694         return (ataid[pccb->target]) ? 0 : -EPERM;
 695 }
 696
 697
 698 int scsi_exec(ccb *pccb)
 699 {
 700         int ret;
 701
 702         switch (pccb->cmd[0]) {
 703         case SCSI_READ10:
 704                 ret = ata_scsiop_read10(pccb);
 705                 break;
 706         case SCSI_RD_CAPAC:
 707                 ret = ata_scsiop_read_capacity10(pccb);
 708                 break;
 709         case SCSI_TST_U_RDY:
 710                 ret = ata_scsiop_test_unit_ready(pccb);
 711                 break;
 712         case SCSI_INQUIRY:
 713                 ret = ata_scsiop_inquiry(pccb);
 714                 break;
 715         default:
 716                 printf("Unsupport SCSI command 0x%02x\n", pccb->cmd[0]);
 717                 return FALSE;
 718         }
 719
 720         if (ret) {
 721                 debug("SCSI command 0x%02x ret errno %d\n", pccb->cmd[0], ret);
 722                 return FALSE;
 723         }
 724         return TRUE;
 725
 726 }
 727
 728
 729 void scsi_low_level_init(int busdevfunc)
 730 {
 731         int i;
 732         u32 linkmap;
 733
 734 #ifndef CONFIG_SCSI_AHCI_PLAT
 735         ahci_init_one(busdevfunc);
 736 #endif
 737
 738         linkmap = probe_ent->link_port_map;
 739
 740         for (i = 0; i < CONFIG_SYS_SCSI_MAX_SCSI_ID; i++) {
 741                 if (((linkmap >> i) & 0x01)) {
 742                         if (ahci_port_start((u8) i)) {
 743                                 printf("Can not start port %d\n", i);
 744                                 continue;
 745                         }
 746                         ahci_set_feature((u8) i);
 747                 }
 748         }
 749 }
 750
 751 #ifdef CONFIG_SCSI_AHCI_PLAT
 752 int ahci_init(u32 base)
 753 {
 754         int i, rc = 0;
 755         u32 linkmap;
 756
 757         memset(ataid, 0, sizeof(ataid));
 758
 759         probe_ent = malloc(sizeof(struct ahci_probe_ent));
 760         memset(probe_ent, 0, sizeof(struct ahci_probe_ent));
 761
 762         probe_ent->host_flags = ATA_FLAG_SATA
 763                                 | ATA_FLAG_NO_LEGACY
 764                                 | ATA_FLAG_MMIO
 765                                 | ATA_FLAG_PIO_DMA
 766                                 | ATA_FLAG_NO_ATAPI;
 767         probe_ent->pio_mask = 0x1f;
 768         probe_ent->udma_mask = 0x7f;    /*Fixme,assume to support UDMA6 */
 769
 770         probe_ent->mmio_base = base;
 771
 772         /* initialize adapter */
 773         rc = ahci_host_init(probe_ent);
 774         if (rc)
 775                 goto err_out;
 776
 777         ahci_print_info(probe_ent);
 778
 779         linkmap = probe_ent->link_port_map;
 780
 781         for (i = 0; i < CONFIG_SYS_SCSI_MAX_SCSI_ID; i++) {
 782                 if (((linkmap >> i) & 0x01)) {
 783                         if (ahci_port_start((u8) i)) {
 784                                 printf("Can not start port %d\n", i);
 785                                 continue;
 786                         }
 787                         ahci_set_feature((u8) i);
 788                 }
 789         }
 790 err_out:
 791         return rc;
 792 }
 793 #endif
 794
 795 void scsi_bus_reset(void)
 796 {
 797         /*Not implement*/
 798 }
 799
 800
 801 void scsi_print_error(ccb * pccb)
 802 {
 803         /*The ahci error info can be read in the ahci driver*/
 804 }