drivers/block/ahci.c

   1 /*
   2  * Copyright (C) Freescale Semiconductor, Inc. 2006.
   3  * Author: Jason Jin<Jason.jin@freescale.com>
   4  *         Zhang Wei<wei.zhang@freescale.com>
   5  *
   6  * See file CREDITS for list of people who contributed to this
   7  * project.
   8  *
   9  * This program is free software; you can redistribute it and/or
  10  * modify it under the terms of the GNU General Public License as
  11  * published by the Free Software Foundation; either version 2 of
  12  * the License, or (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22  * MA 02111-1307 USA
  23  *
  24  * with the reference on libata and ahci drvier in kernel
  25  *
  26  */
  27 #include <common.h>
  28
  29 #include <command.h>
  30 #include <pci.h>
  31 #include <asm/processor.h>
  32 #include <asm/errno.h>
  33 #include <asm/io.h>
  34 #include <malloc.h>
  35 #include <scsi.h>
  36 #include <ata.h>
  37 #include <linux/ctype.h>
  38 #include <ahci.h>
  39
  40 struct ahci_probe_ent *probe_ent = NULL;
  41 hd_driveid_t *ataid[AHCI_MAX_PORTS];
  42
  43 #define writel_with_flush(a,b)  do { writel(a,b); readl(b); } while (0)
  44
  45 /*
  46  * Some controllers limit number of blocks they can read/write at once.
  47  * Contemporary SSD devices work much faster if the read/write size is aligned
  48  * to a power of 2.  Let's set default to 128 and allowing to be overwritten if
  49  * needed.
  50  */
  51 #ifndef MAX_SATA_BLOCKS_READ_WRITE
  52 #define MAX_SATA_BLOCKS_READ_WRITE      0x80
  53 #endif
  54
  55 static inline u32 ahci_port_base(u32 base, u32 port)
  56 {
  57         return base + 0x100 + (port * 0x80);
  58 }
  59
  60
  61 static void ahci_setup_port(struct ahci_ioports *port, unsigned long base,
  62                             unsigned int port_idx)
  63 {
  64         base = ahci_port_base(base, port_idx);
  65
  66         port->cmd_addr = base;
  67         port->scr_addr = base + PORT_SCR;
  68 }
  69
  70
  71 #define msleep(a) udelay(a * 1000)
  72
  73 static int waiting_for_cmd_completed(volatile u8 *offset,
  74                                      int timeout_msec,
  75                                      u32 sign)
  76 {
  77         int i;
  78         u32 status;
  79
  80         for (i = 0; ((status = readl(offset)) & sign) && i < timeout_msec; i++)
  81                 msleep(1);
  82
  83         return (i < timeout_msec) ? 0 : -1;
  84 }
  85
  86
  87 static int ahci_host_init(struct ahci_probe_ent *probe_ent)
  88 {
  89 #ifndef CONFIG_SCSI_AHCI_PLAT
  90         pci_dev_t pdev = probe_ent->dev;
  91         u16 tmp16;
  92         unsigned short vendor;
  93 #endif
  94         volatile u8 *mmio = (volatile u8 *)probe_ent->mmio_base;
  95         u32 tmp, cap_save;
  96         int i, j;
  97         volatile u8 *port_mmio;
  98
  99         debug("ahci_host_init: start\n");
 100
 101         cap_save = readl(mmio + HOST_CAP);
 102         cap_save &= ((1 << 28) | (1 << 17));
 103         cap_save |= (1 << 27);
 104
 105         /* global controller reset */
 106         tmp = readl(mmio + HOST_CTL);
 107         if ((tmp & HOST_RESET) == 0)
 108                 writel_with_flush(tmp | HOST_RESET, mmio + HOST_CTL);
 109
 110         /* reset must complete within 1 second, or
 111          * the hardware should be considered fried.
 112          */
 113         i = 1000;
 114         do {
 115                 udelay(1000);
 116                 tmp = readl(mmio + HOST_CTL);
 117                 if (!i--) {
 118                         debug("controller reset failed (0x%x)\n", tmp);
 119                         return -1;
 120                 }
 121         } while (tmp & HOST_RESET);
 122
 123         writel_with_flush(HOST_AHCI_EN, mmio + HOST_CTL);
 124         writel(cap_save, mmio + HOST_CAP);
 125         writel_with_flush(0xf, mmio + HOST_PORTS_IMPL);
 126
 127 #ifndef CONFIG_SCSI_AHCI_PLAT
 128         pci_read_config_word(pdev, PCI_VENDOR_ID, &vendor);
 129
 130         if (vendor == PCI_VENDOR_ID_INTEL) {
 131                 u16 tmp16;
 132                 pci_read_config_word(pdev, 0x92, &tmp16);
 133                 tmp16 |= 0xf;
 134                 pci_write_config_word(pdev, 0x92, tmp16);
 135         }
 136 #endif
 137         probe_ent->cap = readl(mmio + HOST_CAP);
 138         probe_ent->port_map = readl(mmio + HOST_PORTS_IMPL);
 139         probe_ent->n_ports = (probe_ent->cap & 0x1f) + 1;
 140
 141         debug("cap 0x%x  port_map 0x%x  n_ports %d\n",
 142               probe_ent->cap, probe_ent->port_map, probe_ent->n_ports);
 143
 144         if (probe_ent->n_ports > CONFIG_SYS_SCSI_MAX_SCSI_ID)
 145                 probe_ent->n_ports = CONFIG_SYS_SCSI_MAX_SCSI_ID;
 146
 147         for (i = 0; i < probe_ent->n_ports; i++) {
 148                 probe_ent->port[i].port_mmio = ahci_port_base((u32) mmio, i);
 149                 port_mmio = (u8 *) probe_ent->port[i].port_mmio;
 150                 ahci_setup_port(&probe_ent->port[i], (unsigned long)mmio, i);
 151
 152                 /* make sure port is not active */
 153                 tmp = readl(port_mmio + PORT_CMD);
 154                 if (tmp & (PORT_CMD_LIST_ON | PORT_CMD_FIS_ON |
 155                            PORT_CMD_FIS_RX | PORT_CMD_START)) {
 156                         debug("Port %d is active. Deactivating.\n", i);
 157                         tmp &= ~(PORT_CMD_LIST_ON | PORT_CMD_FIS_ON |
 158                                  PORT_CMD_FIS_RX | PORT_CMD_START);
 159                         writel_with_flush(tmp, port_mmio + PORT_CMD);
 160
 161                         /* spec says 500 msecs for each bit, so
 162                          * this is slightly incorrect.
 163                          */
 164                         msleep(500);
 165                 }
 166
 167                 debug("Spinning up port %d... ", i);
 168                 writel(PORT_CMD_SPIN_UP, port_mmio + PORT_CMD);
 169
 170                 j = 0;
 171                 while (j < 1000) {
 172                         tmp = readl(port_mmio + PORT_SCR_STAT);
 173                         if ((tmp & 0xf) == 0x3)
 174                                 break;
 175                         udelay(1000);
 176                         j++;
 177                 }
 178                 if (j == 1000)
 179                         debug("timeout.\n");
 180                 else
 181                         debug("ok.\n");
 182
 183                 tmp = readl(port_mmio + PORT_SCR_ERR);
 184                 debug("PORT_SCR_ERR 0x%x\n", tmp);
 185                 writel(tmp, port_mmio + PORT_SCR_ERR);
 186
 187                 /* ack any pending irq events for this port */
 188                 tmp = readl(port_mmio + PORT_IRQ_STAT);
 189                 debug("PORT_IRQ_STAT 0x%x\n", tmp);
 190                 if (tmp)
 191                         writel(tmp, port_mmio + PORT_IRQ_STAT);
 192
 193                 writel(1 << i, mmio + HOST_IRQ_STAT);
 194
 195                 /* set irq mask (enables interrupts) */
 196                 writel(DEF_PORT_IRQ, port_mmio + PORT_IRQ_MASK);
 197
 198                 /* register linkup ports */
 199                 tmp = readl(port_mmio + PORT_SCR_STAT);
 200                 debug("Port %d status: 0x%x\n", i, tmp);
 201                 if ((tmp & 0xf) == 0x03)
 202                         probe_ent->link_port_map |= (0x01 << i);
 203         }
 204
 205         tmp = readl(mmio + HOST_CTL);
 206         debug("HOST_CTL 0x%x\n", tmp);
 207         writel(tmp | HOST_IRQ_EN, mmio + HOST_CTL);
 208         tmp = readl(mmio + HOST_CTL);
 209         debug("HOST_CTL 0x%x\n", tmp);
 210 #ifndef CONFIG_SCSI_AHCI_PLAT
 211         pci_read_config_word(pdev, PCI_COMMAND, &tmp16);
 212         tmp |= PCI_COMMAND_MASTER;
 213         pci_write_config_word(pdev, PCI_COMMAND, tmp16);
 214 #endif
 215         return 0;
 216 }
 217
 218
 219 static void ahci_print_info(struct ahci_probe_ent *probe_ent)
 220 {
 221 #ifndef CONFIG_SCSI_AHCI_PLAT
 222         pci_dev_t pdev = probe_ent->dev;
 223         u16 cc;
 224 #endif
 225         volatile u8 *mmio = (volatile u8 *)probe_ent->mmio_base;
 226         u32 vers, cap, cap2, impl, speed;
 227         const char *speed_s;
 228         const char *scc_s;
 229
 230         vers = readl(mmio + HOST_VERSION);
 231         cap = probe_ent->cap;
 232         cap2 = readl(mmio + HOST_CAP2);
 233         impl = probe_ent->port_map;
 234
 235         speed = (cap >> 20) & 0xf;
 236         if (speed == 1)
 237                 speed_s = "1.5";
 238         else if (speed == 2)
 239                 speed_s = "3";
 240         else if (speed == 3)
 241                 speed_s = "6";
 242         else
 243                 speed_s = "?";
 244
 245 #ifdef CONFIG_SCSI_AHCI_PLAT
 246         scc_s = "SATA";
 247 #else
 248         pci_read_config_word(pdev, 0x0a, &cc);
 249         if (cc == 0x0101)
 250                 scc_s = "IDE";
 251         else if (cc == 0x0106)
 252                 scc_s = "SATA";
 253         else if (cc == 0x0104)
 254                 scc_s = "RAID";
 255         else
 256                 scc_s = "unknown";
 257 #endif
 258         printf("AHCI %02x%02x.%02x%02x "
 259                "%u slots %u ports %s Gbps 0x%x impl %s mode\n",
 260                (vers >> 24) & 0xff,
 261                (vers >> 16) & 0xff,
 262                (vers >> 8) & 0xff,
 263                vers & 0xff,
 264                ((cap >> 8) & 0x1f) + 1, (cap & 0x1f) + 1, speed_s, impl, scc_s);
 265
 266         printf("flags: "
 267                "%s%s%s%s%s%s%s"
 268                "%s%s%s%s%s%s%s"
 269                "%s%s%s%s%s%s\n",
 270                cap & (1 << 31) ? "64bit " : "",
 271                cap & (1 << 30) ? "ncq " : "",
 272                cap & (1 << 28) ? "ilck " : "",
 273                cap & (1 << 27) ? "stag " : "",
 274                cap & (1 << 26) ? "pm " : "",
 275                cap & (1 << 25) ? "led " : "",
 276                cap & (1 << 24) ? "clo " : "",
 277                cap & (1 << 19) ? "nz " : "",
 278                cap & (1 << 18) ? "only " : "",
 279                cap & (1 << 17) ? "pmp " : "",
 280                cap & (1 << 16) ? "fbss " : "",
 281                cap & (1 << 15) ? "pio " : "",
 282                cap & (1 << 14) ? "slum " : "",
 283                cap & (1 << 13) ? "part " : "",
 284                cap & (1 << 7) ? "ccc " : "",
 285                cap & (1 << 6) ? "ems " : "",
 286                cap & (1 << 5) ? "sxs " : "",
 287                cap2 & (1 << 2) ? "apst " : "",
 288                cap2 & (1 << 1) ? "nvmp " : "",
 289                cap2 & (1 << 0) ? "boh " : "");
 290 }
 291
 292 #ifndef CONFIG_SCSI_AHCI_PLAT
 293 static int ahci_init_one(pci_dev_t pdev)
 294 {
 295         u16 vendor;
 296         int rc;
 297
 298         memset((void *)ataid, 0, sizeof(hd_driveid_t *) * AHCI_MAX_PORTS);
 299
 300         probe_ent = malloc(sizeof(struct ahci_probe_ent));
 301         memset(probe_ent, 0, sizeof(struct ahci_probe_ent));
 302         probe_ent->dev = pdev;
 303
 304         probe_ent->host_flags = ATA_FLAG_SATA
 305                                 | ATA_FLAG_NO_LEGACY
 306                                 | ATA_FLAG_MMIO
 307                                 | ATA_FLAG_PIO_DMA
 308                                 | ATA_FLAG_NO_ATAPI;
 309         probe_ent->pio_mask = 0x1f;
 310         probe_ent->udma_mask = 0x7f;    /*Fixme,assume to support UDMA6 */
 311
 312         pci_read_config_dword(pdev, PCI_BASE_ADDRESS_5, &probe_ent->mmio_base);
 313         debug("ahci mmio_base=0x%08x\n", probe_ent->mmio_base);
 314
 315         /* Take from kernel:
 316          * JMicron-specific fixup:
 317          * make sure we're in AHCI mode
 318          */
 319         pci_read_config_word(pdev, PCI_VENDOR_ID, &vendor);
 320         if (vendor == 0x197b)
 321                 pci_write_config_byte(pdev, 0x41, 0xa1);
 322
 323         /* initialize adapter */
 324         rc = ahci_host_init(probe_ent);
 325         if (rc)
 326                 goto err_out;
 327
 328         ahci_print_info(probe_ent);
 329
 330         return 0;
 331
 332       err_out:
 333         return rc;
 334 }
 335 #endif
 336
 337 #define MAX_DATA_BYTE_COUNT  (4*1024*1024)
 338
 339 static int ahci_fill_sg(u8 port, unsigned char *buf, int buf_len)
 340 {
 341         struct ahci_ioports *pp = &(probe_ent->port[port]);
 342         struct ahci_sg *ahci_sg = pp->cmd_tbl_sg;
 343         u32 sg_count;
 344         int i;
 345
 346         sg_count = ((buf_len - 1) / MAX_DATA_BYTE_COUNT) + 1;
 347         if (sg_count > AHCI_MAX_SG) {
 348                 printf("Error:Too much sg!\n");
 349                 return -1;
 350         }
 351
 352         for (i = 0; i < sg_count; i++) {
 353                 ahci_sg->addr =
 354                     cpu_to_le32((u32) buf + i * MAX_DATA_BYTE_COUNT);
 355                 ahci_sg->addr_hi = 0;
 356                 ahci_sg->flags_size = cpu_to_le32(0x3fffff &
 357                                           (buf_len < MAX_DATA_BYTE_COUNT
 358                                            ? (buf_len - 1)
 359                                            : (MAX_DATA_BYTE_COUNT - 1)));
 360                 ahci_sg++;
 361                 buf_len -= MAX_DATA_BYTE_COUNT;
 362         }
 363
 364         return sg_count;
 365 }
 366
 367
 368 static void ahci_fill_cmd_slot(struct ahci_ioports *pp, u32 opts)
 369 {
 370         pp->cmd_slot->opts = cpu_to_le32(opts);
 371         pp->cmd_slot->status = 0;
 372         pp->cmd_slot->tbl_addr = cpu_to_le32(pp->cmd_tbl & 0xffffffff);
 373         pp->cmd_slot->tbl_addr_hi = 0;
 374 }
 375
 376
 377 #ifdef CONFIG_AHCI_SETFEATURES_XFER
 378 static void ahci_set_feature(u8 port)
 379 {
 380         struct ahci_ioports *pp = &(probe_ent->port[port]);
 381         volatile u8 *port_mmio = (volatile u8 *)pp->port_mmio;
 382         u32 cmd_fis_len = 5;    /* five dwords */
 383         u8 fis[20];
 384
 385         /* set feature */
 386         memset(fis, 0, sizeof(fis));
 387         fis[0] = 0x27;
 388         fis[1] = 1 << 7;
 389         fis[2] = ATA_CMD_SETF;
 390         fis[3] = SETFEATURES_XFER;
 391         fis[12] = __ilog2(probe_ent->udma_mask + 1) + 0x40 - 0x01;
 392
 393         memcpy((unsigned char *)pp->cmd_tbl, fis, sizeof(fis));
 394         ahci_fill_cmd_slot(pp, cmd_fis_len);
 395         writel(1, port_mmio + PORT_CMD_ISSUE);
 396         readl(port_mmio + PORT_CMD_ISSUE);
 397
 398         if (waiting_for_cmd_completed(port_mmio + PORT_CMD_ISSUE, 150, 0x1)) {
 399                 printf("set feature error on port %d!\n", port);
 400         }
 401 }
 402 #endif
 403
 404
 405 static int ahci_port_start(u8 port)
 406 {
 407         struct ahci_ioports *pp = &(probe_ent->port[port]);
 408         volatile u8 *port_mmio = (volatile u8 *)pp->port_mmio;
 409         u32 port_status;
 410         u32 mem;
 411
 412         debug("Enter start port: %d\n", port);
 413         port_status = readl(port_mmio + PORT_SCR_STAT);
 414         debug("Port %d status: %x\n", port, port_status);
 415         if ((port_status & 0xf) != 0x03) {
 416                 printf("No Link on this port!\n");
 417                 return -1;
 418         }
 419
 420         mem = (u32) malloc(AHCI_PORT_PRIV_DMA_SZ + 2048);
 421         if (!mem) {
 422                 free(pp);
 423                 printf("No mem for table!\n");
 424                 return -ENOMEM;
 425         }
 426
 427         mem = (mem + 0x800) & (~0x7ff); /* Aligned to 2048-bytes */
 428         memset((u8 *) mem, 0, AHCI_PORT_PRIV_DMA_SZ);
 429
 430         /*
 431          * First item in chunk of DMA memory: 32-slot command table,
 432          * 32 bytes each in size
 433          */
 434         pp->cmd_slot =
 435                 (struct ahci_cmd_hdr *)(uintptr_t)virt_to_phys((void *)mem);
 436         debug("cmd_slot = 0x%x\n", (unsigned)pp->cmd_slot);
 437         mem += (AHCI_CMD_SLOT_SZ + 224);
 438
 439         /*
 440          * Second item: Received-FIS area
 441          */
 442         pp->rx_fis = virt_to_phys((void *)mem);
 443         mem += AHCI_RX_FIS_SZ;
 444
 445         /*
 446          * Third item: data area for storing a single command
 447          * and its scatter-gather table
 448          */
 449         pp->cmd_tbl = virt_to_phys((void *)mem);
 450         debug("cmd_tbl_dma = 0x%x\n", pp->cmd_tbl);
 451
 452         mem += AHCI_CMD_TBL_HDR;
 453         pp->cmd_tbl_sg =
 454                         (struct ahci_sg *)(uintptr_t)virt_to_phys((void *)mem);
 455
 456         writel_with_flush((u32) pp->cmd_slot, port_mmio + PORT_LST_ADDR);
 457
 458         writel_with_flush(pp->rx_fis, port_mmio + PORT_FIS_ADDR);
 459
 460         writel_with_flush(PORT_CMD_ICC_ACTIVE | PORT_CMD_FIS_RX |
 461                           PORT_CMD_POWER_ON | PORT_CMD_SPIN_UP |
 462                           PORT_CMD_START, port_mmio + PORT_CMD);
 463
 464         debug("Exit start port %d\n", port);
 465
 466         return 0;
 467 }
 468
 469
 470 static int ahci_device_data_io(u8 port, u8 *fis, int fis_len, u8 *buf,
 471                                 int buf_len, u8 is_write)
 472 {
 473
 474         struct ahci_ioports *pp = &(probe_ent->port[port]);
 475         volatile u8 *port_mmio = (volatile u8 *)pp->port_mmio;
 476         u32 opts;
 477         u32 port_status;
 478         int sg_count;
 479
 480         debug("Enter %s: for port %d\n", __func__, port);
 481
 482         if (port > probe_ent->n_ports) {
 483                 printf("Invalid port number %d\n", port);
 484                 return -1;
 485         }
 486
 487         port_status = readl(port_mmio + PORT_SCR_STAT);
 488         if ((port_status & 0xf) != 0x03) {
 489                 debug("No Link on port %d!\n", port);
 490                 return -1;
 491         }
 492
 493         memcpy((unsigned char *)pp->cmd_tbl, fis, fis_len);
 494
 495         sg_count = ahci_fill_sg(port, buf, buf_len);
 496         opts = (fis_len >> 2) | (sg_count << 16) | (is_write << 6);
 497         ahci_fill_cmd_slot(pp, opts);
 498
 499         writel_with_flush(1, port_mmio + PORT_CMD_ISSUE);
 500
 501         if (waiting_for_cmd_completed(port_mmio + PORT_CMD_ISSUE, 150, 0x1)) {
 502                 printf("timeout exit!\n");
 503                 return -1;
 504         }
 505         debug("%s: %d byte transferred.\n", __func__, pp->cmd_slot->status);
 506
 507         return 0;
 508 }
 509
 510
 511 static char *ata_id_strcpy(u16 *target, u16 *src, int len)
 512 {
 513         int i;
 514         for (i = 0; i < len / 2; i++)
 515                 target[i] = swab16(src[i]);
 516         return (char *)target;
 517 }
 518
 519
 520 static void dump_ataid(hd_driveid_t *ataid)
 521 {
 522         debug("(49)ataid->capability = 0x%x\n", ataid->capability);
 523         debug("(53)ataid->field_valid =0x%x\n", ataid->field_valid);
 524         debug("(63)ataid->dma_mword = 0x%x\n", ataid->dma_mword);
 525         debug("(64)ataid->eide_pio_modes = 0x%x\n", ataid->eide_pio_modes);
 526         debug("(75)ataid->queue_depth = 0x%x\n", ataid->queue_depth);
 527         debug("(80)ataid->major_rev_num = 0x%x\n", ataid->major_rev_num);
 528         debug("(81)ataid->minor_rev_num = 0x%x\n", ataid->minor_rev_num);
 529         debug("(82)ataid->command_set_1 = 0x%x\n", ataid->command_set_1);
 530         debug("(83)ataid->command_set_2 = 0x%x\n", ataid->command_set_2);
 531         debug("(84)ataid->cfsse = 0x%x\n", ataid->cfsse);
 532         debug("(85)ataid->cfs_enable_1 = 0x%x\n", ataid->cfs_enable_1);
 533         debug("(86)ataid->cfs_enable_2 = 0x%x\n", ataid->cfs_enable_2);
 534         debug("(87)ataid->csf_default = 0x%x\n", ataid->csf_default);
 535         debug("(88)ataid->dma_ultra = 0x%x\n", ataid->dma_ultra);
 536         debug("(93)ataid->hw_config = 0x%x\n", ataid->hw_config);
 537 }
 538
 539
 540 /*
 541  * SCSI INQUIRY command operation.
 542  */
 543 static int ata_scsiop_inquiry(ccb *pccb)
 544 {
 545         u8 hdr[] = {
 546                 0,
 547                 0,
 548                 0x5,            /* claim SPC-3 version compatibility */
 549                 2,
 550                 95 - 4,
 551         };
 552         u8 fis[20];
 553         u8 *tmpid;
 554         u8 port;
 555
 556         /* Clean ccb data buffer */
 557         memset(pccb->pdata, 0, pccb->datalen);
 558
 559         memcpy(pccb->pdata, hdr, sizeof(hdr));
 560
 561         if (pccb->datalen <= 35)
 562                 return 0;
 563
 564         memset(fis, 0, sizeof(fis));
 565         /* Construct the FIS */
 566         fis[0] = 0x27;          /* Host to device FIS. */
 567         fis[1] = 1 << 7;        /* Command FIS. */
 568         fis[2] = ATA_CMD_IDENT; /* Command byte. */
 569
 570         /* Read id from sata */
 571         port = pccb->target;
 572         if (!(tmpid = malloc(sizeof(hd_driveid_t))))
 573                 return -ENOMEM;
 574
 575         if (ahci_device_data_io(port, (u8 *) &fis, sizeof(fis), tmpid,
 576                                 sizeof(hd_driveid_t), 0)) {
 577                 debug("scsi_ahci: SCSI inquiry command failure.\n");
 578                 return -EIO;
 579         }
 580
 581         if (ataid[port])
 582                 free(ataid[port]);
 583         ataid[port] = (hd_driveid_t *) tmpid;
 584
 585         memcpy(&pccb->pdata[8], "ATA     ", 8);
 586         ata_id_strcpy((u16 *) &pccb->pdata[16], (u16 *)ataid[port]->model, 16);
 587         ata_id_strcpy((u16 *) &pccb->pdata[32], (u16 *)ataid[port]->fw_rev, 4);
 588
 589         dump_ataid(ataid[port]);
 590         return 0;
 591 }
 592
 593
 594 /*
 595  * SCSI READ10/WRITE10 command operation.
 596  */
 597 static int ata_scsiop_read_write(ccb *pccb, u8 is_write)
 598 {
 599         u32 lba = 0;
 600         u16 blocks = 0;
 601         u8 fis[20];
 602         u8 *user_buffer = pccb->pdata;
 603         u32 user_buffer_size = pccb->datalen;
 604
 605         /* Retrieve the base LBA number from the ccb structure. */
 606         memcpy(&lba, pccb->cmd + 2, sizeof(lba));
 607         lba = be32_to_cpu(lba);
 608
 609         /*
 610          * And the number of blocks.
 611          *
 612          * For 10-byte and 16-byte SCSI R/W commands, transfer
 613          * length 0 means transfer 0 block of data.
 614          * However, for ATA R/W commands, sector count 0 means
 615          * 256 or 65536 sectors, not 0 sectors as in SCSI.
 616          *
 617          * WARNING: one or two older ATA drives treat 0 as 0...
 618          */
 619         blocks = (((u16)pccb->cmd[7]) << 8) | ((u16) pccb->cmd[8]);
 620
 621         debug("scsi_ahci: %s %d blocks starting from lba 0x%x\n",
 622               is_write ?  "write" : "read", (unsigned)lba, blocks);
 623
 624         /* Preset the FIS */
 625         memset(fis, 0, sizeof(fis));
 626         fis[0] = 0x27;           /* Host to device FIS. */
 627         fis[1] = 1 << 7;         /* Command FIS. */
 628         /* Command byte (read/write). */
 629         fis[2] = is_write ? ATA_CMD_WR_DMA : ATA_CMD_RD_DMA;
 630
 631         while (blocks) {
 632                 u16 now_blocks; /* number of blocks per iteration */
 633                 u32 transfer_size; /* number of bytes per iteration */
 634
 635                 now_blocks = min(MAX_SATA_BLOCKS_READ_WRITE, blocks);
 636
 637                 transfer_size = ATA_BLOCKSIZE * now_blocks;
 638                 if (transfer_size > user_buffer_size) {
 639                         printf("scsi_ahci: Error: buffer too small.\n");
 640                         return -EIO;
 641                 }
 642
 643                 /* LBA address, only support LBA28 in this driver */
 644                 fis[4] = (lba >> 0) & 0xff;
 645                 fis[5] = (lba >> 8) & 0xff;
 646                 fis[6] = (lba >> 16) & 0xff;
 647                 fis[7] = ((lba >> 24) & 0xf) | 0xe0;
 648
 649                 /* Block (sector) count */
 650                 fis[12] = (now_blocks >> 0) & 0xff;
 651                 fis[13] = (now_blocks >> 8) & 0xff;
 652
 653                 /* Read/Write from ahci */
 654                 if (ahci_device_data_io(pccb->target, (u8 *) &fis, sizeof(fis),
 655                                         user_buffer, user_buffer_size,
 656                                         is_write)) {
 657                         debug("scsi_ahci: SCSI %s10 command failure.\n",
 658                               is_write ? "WRITE" : "READ");
 659                         return -EIO;
 660                 }
 661                 user_buffer += transfer_size;
 662                 user_buffer_size -= transfer_size;
 663                 blocks -= now_blocks;
 664                 lba += now_blocks;
 665         }
 666
 667         return 0;
 668 }
 669
 670
 671 /*
 672  * SCSI READ CAPACITY10 command operation.
 673  */
 674 static int ata_scsiop_read_capacity10(ccb *pccb)
 675 {
 676         u32 cap;
 677         u32 block_size;
 678
 679         if (!ataid[pccb->target]) {
 680                 printf("scsi_ahci: SCSI READ CAPACITY10 command failure. "
 681                        "\tNo ATA info!\n"
 682                        "\tPlease run SCSI commmand INQUIRY firstly!\n");
 683                 return -EPERM;
 684         }
 685
 686         cap = le32_to_cpu(ataid[pccb->target]->lba_capacity);
 687         if (cap == 0xfffffff) {
 688                 unsigned short *cap48 = ataid[pccb->target]->lba48_capacity;
 689                 if (cap48[2] || cap48[3]) {
 690                         cap = 0xffffffff;
 691                 } else {
 692                         cap = (le16_to_cpu(cap48[1]) << 16) |
 693                               (le16_to_cpu(cap48[0]));
 694                 }
 695         }
 696
 697         cap = cpu_to_be32(cap);
 698         memcpy(pccb->pdata, &cap, sizeof(cap));
 699
 700         block_size = cpu_to_be32((u32)512);
 701         memcpy(&pccb->pdata[4], &block_size, 4);
 702
 703         return 0;
 704 }
 705
 706
 707 /*
 708  * SCSI READ CAPACITY16 command operation.
 709  */
 710 static int ata_scsiop_read_capacity16(ccb *pccb)
 711 {
 712         u64 cap;
 713         u64 block_size;
 714
 715         if (!ataid[pccb->target]) {
 716                 printf("scsi_ahci: SCSI READ CAPACITY16 command failure. "
 717                        "\tNo ATA info!\n"
 718                        "\tPlease run SCSI commmand INQUIRY firstly!\n");
 719                 return -EPERM;
 720         }
 721
 722         cap = le32_to_cpu(ataid[pccb->target]->lba_capacity);
 723         if (cap == 0xfffffff) {
 724                 memcpy(&cap, ataid[pccb->target]->lba48_capacity, sizeof(cap));
 725                 cap = le64_to_cpu(cap);
 726         }
 727
 728         cap = cpu_to_be64(cap);
 729         memcpy(pccb->pdata, &cap, sizeof(cap));
 730
 731         block_size = cpu_to_be64((u64)512);
 732         memcpy(&pccb->pdata[8], &block_size, 8);
 733
 734         return 0;
 735 }
 736
 737
 738 /*
 739  * SCSI TEST UNIT READY command operation.
 740  */
 741 static int ata_scsiop_test_unit_ready(ccb *pccb)
 742 {
 743         return (ataid[pccb->target]) ? 0 : -EPERM;
 744 }
 745
 746
 747 int scsi_exec(ccb *pccb)
 748 {
 749         int ret;
 750
 751         switch (pccb->cmd[0]) {
 752         case SCSI_READ10:
 753                 ret = ata_scsiop_read_write(pccb, 0);
 754                 break;
 755         case SCSI_WRITE10:
 756                 ret = ata_scsiop_read_write(pccb, 1);
 757                 break;
 758         case SCSI_RD_CAPAC10:
 759                 ret = ata_scsiop_read_capacity10(pccb);
 760                 break;
 761         case SCSI_RD_CAPAC16:
 762                 ret = ata_scsiop_read_capacity16(pccb);
 763                 break;
 764         case SCSI_TST_U_RDY:
 765                 ret = ata_scsiop_test_unit_ready(pccb);
 766                 break;
 767         case SCSI_INQUIRY:
 768                 ret = ata_scsiop_inquiry(pccb);
 769                 break;
 770         default:
 771                 printf("Unsupport SCSI command 0x%02x\n", pccb->cmd[0]);
 772                 return FALSE;
 773         }
 774
 775         if (ret) {
 776                 debug("SCSI command 0x%02x ret errno %d\n", pccb->cmd[0], ret);
 777                 return FALSE;
 778         }
 779         return TRUE;
 780
 781 }
 782
 783
 784 void scsi_low_level_init(int busdevfunc)
 785 {
 786         int i;
 787         u32 linkmap;
 788
 789 #ifndef CONFIG_SCSI_AHCI_PLAT
 790         ahci_init_one(busdevfunc);
 791 #endif
 792
 793         linkmap = probe_ent->link_port_map;
 794
 795         for (i = 0; i < CONFIG_SYS_SCSI_MAX_SCSI_ID; i++) {
 796                 if (((linkmap >> i) & 0x01)) {
 797                         if (ahci_port_start((u8) i)) {
 798                                 printf("Can not start port %d\n", i);
 799                                 continue;
 800                         }
 801 #ifdef CONFIG_AHCI_SETFEATURES_XFER
 802                         ahci_set_feature((u8) i);
 803 #endif
 804                 }
 805         }
 806 }
 807
 808 #ifdef CONFIG_SCSI_AHCI_PLAT
 809 int ahci_init(u32 base)
 810 {
 811         int i, rc = 0;
 812         u32 linkmap;
 813
 814         memset(ataid, 0, sizeof(ataid));
 815
 816         probe_ent = malloc(sizeof(struct ahci_probe_ent));
 817         memset(probe_ent, 0, sizeof(struct ahci_probe_ent));
 818
 819         probe_ent->host_flags = ATA_FLAG_SATA
 820                                 | ATA_FLAG_NO_LEGACY
 821                                 | ATA_FLAG_MMIO
 822                                 | ATA_FLAG_PIO_DMA
 823                                 | ATA_FLAG_NO_ATAPI;
 824         probe_ent->pio_mask = 0x1f;
 825         probe_ent->udma_mask = 0x7f;    /*Fixme,assume to support UDMA6 */
 826
 827         probe_ent->mmio_base = base;
 828
 829         /* initialize adapter */
 830         rc = ahci_host_init(probe_ent);
 831         if (rc)
 832                 goto err_out;
 833
 834         ahci_print_info(probe_ent);
 835
 836         linkmap = probe_ent->link_port_map;
 837
 838         for (i = 0; i < CONFIG_SYS_SCSI_MAX_SCSI_ID; i++) {
 839                 if (((linkmap >> i) & 0x01)) {
 840                         if (ahci_port_start((u8) i)) {
 841                                 printf("Can not start port %d\n", i);
 842                                 continue;
 843                         }
 844 #ifdef CONFIG_AHCI_SETFEATURES_XFER
 845                         ahci_set_feature((u8) i);
 846 #endif
 847                 }
 848         }
 849 err_out:
 850         return rc;
 851 }
 852 #endif
 853
 854 void scsi_bus_reset(void)
 855 {
 856         /*Not implement*/
 857 }
 858
 859
 860 void scsi_print_error(ccb * pccb)
 861 {
 862         /*The ahci error info can be read in the ahci driver*/
 863 }