2 * Copyright (C) 2008 Freescale Semiconductor, Inc.
3 * Dave Liu <daveliu@freescale.com>
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of
8 * the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29 extern block_dev_desc_t sata_dev_desc
[CONFIG_SYS_SATA_MAX_DEVICE
];
31 #ifndef CONFIG_SYS_SATA1_FLAGS
32 #define CONFIG_SYS_SATA1_FLAGS FLAGS_DMA
34 #ifndef CONFIG_SYS_SATA2_FLAGS
35 #define CONFIG_SYS_SATA2_FLAGS FLAGS_DMA
38 static struct fsl_sata_info fsl_sata_info
[] = {
40 {CONFIG_SYS_SATA1
, CONFIG_SYS_SATA1_FLAGS
},
45 {CONFIG_SYS_SATA2
, CONFIG_SYS_SATA2_FLAGS
},
51 static inline void mdelay(unsigned long msec
)
54 for (i
= 0; i
< msec
; i
++)
58 static inline void sdelay(unsigned long sec
)
61 for (i
= 0; i
< sec
; i
++)
65 void dprint_buffer(unsigned char *buf
, int len
)
73 for (i
= 0; i
< len
; i
++) {
74 printf("%02x ", *buf
++);
84 static void fsl_sata_dump_sfis(struct sfis
*s
)
86 printf("Status FIS dump:\n\r");
87 printf("fis_type: %02x\n\r", s
->fis_type
);
88 printf("pm_port_i: %02x\n\r", s
->pm_port_i
);
89 printf("status: %02x\n\r", s
->status
);
90 printf("error: %02x\n\r", s
->error
);
91 printf("lba_low: %02x\n\r", s
->lba_low
);
92 printf("lba_mid: %02x\n\r", s
->lba_mid
);
93 printf("lba_high: %02x\n\r", s
->lba_high
);
94 printf("device: %02x\n\r", s
->device
);
95 printf("lba_low_exp: %02x\n\r", s
->lba_low_exp
);
96 printf("lba_mid_exp: %02x\n\r", s
->lba_mid_exp
);
97 printf("lba_high_exp: %02x\n\r", s
->lba_high_exp
);
98 printf("res1: %02x\n\r", s
->res1
);
99 printf("sector_count: %02x\n\r", s
->sector_count
);
100 printf("sector_count_exp: %02x\n\r", s
->sector_count_exp
);
103 static int ata_wait_register(volatile unsigned *addr
, u32 mask
,
104 u32 val
, u32 timeout_msec
)
109 for (i
= 0; (((temp
= in_le32(addr
)) & mask
) != val
)
110 && i
< timeout_msec
; i
++)
112 return (i
< timeout_msec
) ? 0 : -1;
115 int init_sata(int dev
)
118 cmd_hdr_tbl_t
*cmd_hdr
;
126 if (dev
< 0 || dev
> (CONFIG_SYS_SATA_MAX_DEVICE
- 1)) {
127 printf("the sata index %d is out of ranges\n\r", dev
);
131 /* Allocate SATA device driver struct */
132 sata
= (fsl_sata_t
*)malloc(sizeof(fsl_sata_t
));
134 printf("alloc the sata device struct failed\n\r");
137 /* Zero all of the device driver struct */
138 memset((void *)sata
, 0, sizeof(fsl_sata_t
));
140 /* Save the private struct to block device struct */
141 sata_dev_desc
[dev
].priv
= (void *)sata
;
143 sprintf(sata
->name
, "SATA%d", dev
);
145 /* Set the controller register base address to device struct */
146 reg
= (fsl_sata_reg_t
*)(fsl_sata_info
[dev
].sata_reg_base
);
147 sata
->reg_base
= reg
;
149 /* Allocate the command header table, 4 bytes aligned */
150 length
= sizeof(struct cmd_hdr_tbl
);
151 align
= SATA_HC_CMD_HDR_TBL_ALIGN
;
152 sata
->cmd_hdr_tbl_offset
= (void *)malloc(length
+ align
);
154 printf("alloc the command header failed\n\r");
158 cmd_hdr
= (cmd_hdr_tbl_t
*)(((u32
)sata
->cmd_hdr_tbl_offset
+ align
)
160 sata
->cmd_hdr
= cmd_hdr
;
162 /* Zero all of the command header table */
163 memset((void *)sata
->cmd_hdr_tbl_offset
, 0, length
+ align
);
165 /* Allocate command descriptor for all command */
166 length
= sizeof(struct cmd_desc
) * SATA_HC_MAX_CMD
;
167 align
= SATA_HC_CMD_DESC_ALIGN
;
168 sata
->cmd_desc_offset
= (void *)malloc(length
+ align
);
169 if (!sata
->cmd_desc_offset
) {
170 printf("alloc the command descriptor failed\n\r");
173 sata
->cmd_desc
= (cmd_desc_t
*)(((u32
)sata
->cmd_desc_offset
+ align
)
175 /* Zero all of command descriptor */
176 memset((void *)sata
->cmd_desc_offset
, 0, length
+ align
);
178 /* Link the command descriptor to command header */
179 for (i
= 0; i
< SATA_HC_MAX_CMD
; i
++) {
180 cda
= ((u32
)sata
->cmd_desc
+ SATA_HC_CMD_DESC_SIZE
* i
)
181 & ~(CMD_HDR_CDA_ALIGN
- 1);
182 cmd_hdr
->cmd_slot
[i
].cda
= cpu_to_le32(cda
);
185 /* To have safe state, force the controller offline */
186 val32
= in_le32(®
->hcontrol
);
187 val32
&= ~HCONTROL_ONOFF
;
188 val32
|= HCONTROL_FORCE_OFFLINE
;
189 out_le32(®
->hcontrol
, val32
);
191 /* Wait the controller offline */
192 ata_wait_register(®
->hstatus
, HSTATUS_ONOFF
, 0, 1000);
194 /* Set the command header base address to CHBA register to tell DMA */
195 out_le32(®
->chba
, (u32
)cmd_hdr
& ~0x3);
197 /* Snoop for the command header */
198 val32
= in_le32(®
->hcontrol
);
199 val32
|= HCONTROL_HDR_SNOOP
;
200 out_le32(®
->hcontrol
, val32
);
202 /* Disable all of interrupts */
203 val32
= in_le32(®
->hcontrol
);
204 val32
&= ~HCONTROL_INT_EN_ALL
;
205 out_le32(®
->hcontrol
, val32
);
207 /* Clear all of interrupts */
208 val32
= in_le32(®
->hstatus
);
209 out_le32(®
->hstatus
, val32
);
211 /* Set the ICC, no interrupt coalescing */
212 out_le32(®
->icc
, 0x01000000);
214 /* No PM attatched, the SATA device direct connect */
215 out_le32(®
->cqpmp
, 0);
217 /* Clear SError register */
218 val32
= in_le32(®
->serror
);
219 out_le32(®
->serror
, val32
);
221 /* Clear CER register */
222 val32
= in_le32(®
->cer
);
223 out_le32(®
->cer
, val32
);
225 /* Clear DER register */
226 val32
= in_le32(®
->der
);
227 out_le32(®
->der
, val32
);
229 /* No device detection or initialization action requested */
230 out_le32(®
->scontrol
, 0x00000300);
232 /* Configure the transport layer, default value */
233 out_le32(®
->transcfg
, 0x08000016);
235 /* Configure the link layer, default value */
236 out_le32(®
->linkcfg
, 0x0000ff34);
238 /* Bring the controller online */
239 val32
= in_le32(®
->hcontrol
);
240 val32
|= HCONTROL_ONOFF
;
241 out_le32(®
->hcontrol
, val32
);
245 /* print sata device name */
247 printf("%s ", sata
->name
);
249 printf(" %s ", sata
->name
);
251 /* Wait PHY RDY signal changed for 500ms */
252 ata_wait_register(®
->hstatus
, HSTATUS_PHY_RDY
,
253 HSTATUS_PHY_RDY
, 500);
256 val32
= in_le32(®
->hstatus
);
257 if (val32
& HSTATUS_PHY_RDY
) {
261 printf("(No RDY)\n\r");
265 /* Wait for signature updated, which is 1st D2H */
266 ata_wait_register(®
->hstatus
, HSTATUS_SIGNATURE
,
267 HSTATUS_SIGNATURE
, 10000);
269 if (val32
& HSTATUS_SIGNATURE
) {
270 sig
= in_le32(®
->sig
);
271 debug("Signature updated, the sig =%08x\n\r", sig
);
272 sata
->ata_device_type
= ata_dev_classify(sig
);
275 /* Check the speed */
276 val32
= in_le32(®
->sstatus
);
277 if ((val32
& SSTATUS_SPD_MASK
) == SSTATUS_SPD_GEN1
)
278 printf("(1.5 Gbps)\n\r");
279 else if ((val32
& SSTATUS_SPD_MASK
) == SSTATUS_SPD_GEN2
)
280 printf("(3 Gbps)\n\r");
285 /* Hardware reset, like Power-on and COMRESET */
286 void fsl_sata_hardware_reset(u32 reg_base
)
288 fsl_sata_reg_t
*reg
= (fsl_sata_reg_t
*)reg_base
;
291 /* Disable the SATA interface and put PHY offline */
292 scontrol
= in_le32(®
->scontrol
);
293 scontrol
= (scontrol
& 0x0f0) | 0x304;
294 out_le32(®
->scontrol
, scontrol
);
296 /* No speed strict */
297 scontrol
= in_le32(®
->scontrol
);
298 scontrol
= scontrol
& ~0x0f0;
299 out_le32(®
->scontrol
, scontrol
);
301 /* Issue PHY wake/reset, Hardware_reset_asserted */
302 scontrol
= in_le32(®
->scontrol
);
303 scontrol
= (scontrol
& 0x0f0) | 0x301;
304 out_le32(®
->scontrol
, scontrol
);
308 /* Resume PHY, COMRESET negated, the device initialize hardware
309 * and execute diagnostics, send good status-signature to host,
310 * which is D2H register FIS, and then the device enter idle state.
312 scontrol
= in_le32(®
->scontrol
);
313 scontrol
= (scontrol
& 0x0f0) | 0x300;
314 out_le32(®
->scontrol
, scontrol
);
320 static void fsl_sata_dump_regs(fsl_sata_reg_t
*reg
)
322 printf("\n\rSATA: %08x\n\r", (u32
)reg
);
323 printf("CQR: %08x\n\r", in_le32(®
->cqr
));
324 printf("CAR: %08x\n\r", in_le32(®
->car
));
325 printf("CCR: %08x\n\r", in_le32(®
->ccr
));
326 printf("CER: %08x\n\r", in_le32(®
->cer
));
327 printf("CQR: %08x\n\r", in_le32(®
->cqr
));
328 printf("DER: %08x\n\r", in_le32(®
->der
));
329 printf("CHBA: %08x\n\r", in_le32(®
->chba
));
330 printf("HStatus: %08x\n\r", in_le32(®
->hstatus
));
331 printf("HControl: %08x\n\r", in_le32(®
->hcontrol
));
332 printf("CQPMP: %08x\n\r", in_le32(®
->cqpmp
));
333 printf("SIG: %08x\n\r", in_le32(®
->sig
));
334 printf("ICC: %08x\n\r", in_le32(®
->icc
));
335 printf("SStatus: %08x\n\r", in_le32(®
->sstatus
));
336 printf("SError: %08x\n\r", in_le32(®
->serror
));
337 printf("SControl: %08x\n\r", in_le32(®
->scontrol
));
338 printf("SNotification: %08x\n\r", in_le32(®
->snotification
));
339 printf("TransCfg: %08x\n\r", in_le32(®
->transcfg
));
340 printf("TransStatus: %08x\n\r", in_le32(®
->transstatus
));
341 printf("LinkCfg: %08x\n\r", in_le32(®
->linkcfg
));
342 printf("LinkCfg1: %08x\n\r", in_le32(®
->linkcfg1
));
343 printf("LinkCfg2: %08x\n\r", in_le32(®
->linkcfg2
));
344 printf("LinkStatus: %08x\n\r", in_le32(®
->linkstatus
));
345 printf("LinkStatus1: %08x\n\r", in_le32(®
->linkstatus1
));
346 printf("PhyCtrlCfg: %08x\n\r", in_le32(®
->phyctrlcfg
));
347 printf("SYSPR: %08x\n\r", in_be32(®
->syspr
));
350 static int fsl_ata_exec_ata_cmd(struct fsl_sata
*sata
, struct cfis
*cfis
,
351 int is_ncq
, int tag
, u8
*buffer
, u32 len
)
353 cmd_hdr_entry_t
*cmd_hdr
;
354 cmd_desc_t
*cmd_desc
;
361 fsl_sata_reg_t
*reg
= sata
->reg_base
;
364 /* Check xfer length */
365 if (len
> SATA_HC_MAX_XFER_LEN
) {
366 printf("max transfer length is 64MB\n\r");
370 /* Setup the command descriptor */
371 cmd_desc
= sata
->cmd_desc
+ tag
;
373 /* Get the pointer cfis of command descriptor */
374 h2d
= (sata_fis_h2d_t
*)cmd_desc
->cfis
;
376 /* Zero the cfis of command descriptor */
377 memset((void *)h2d
, 0, SATA_HC_CMD_DESC_CFIS_SIZE
);
379 /* Copy the cfis from user to command descriptor */
380 h2d
->fis_type
= cfis
->fis_type
;
381 h2d
->pm_port_c
= cfis
->pm_port_c
;
382 h2d
->command
= cfis
->command
;
384 h2d
->features
= cfis
->features
;
385 h2d
->features_exp
= cfis
->features_exp
;
387 h2d
->lba_low
= cfis
->lba_low
;
388 h2d
->lba_mid
= cfis
->lba_mid
;
389 h2d
->lba_high
= cfis
->lba_high
;
390 h2d
->lba_low_exp
= cfis
->lba_low_exp
;
391 h2d
->lba_mid_exp
= cfis
->lba_mid_exp
;
392 h2d
->lba_high_exp
= cfis
->lba_high_exp
;
395 h2d
->sector_count
= cfis
->sector_count
;
396 h2d
->sector_count_exp
= cfis
->sector_count_exp
;
398 h2d
->sector_count
= (u8
)(tag
<< 3);
401 h2d
->device
= cfis
->device
;
402 h2d
->control
= cfis
->control
;
404 /* Setup the PRD table */
405 prde
= (prd_entry_t
*)cmd_desc
->prdt
;
406 memset((void *)prde
, 0, sizeof(struct prdt
));
410 for (i
= 0; i
< SATA_HC_MAX_PRD_DIRECT
; i
++) {
413 prde
->dba
= cpu_to_le32((u32
)buffer
& ~0x3);
414 debug("dba = %08x\n\r", (u32
)buffer
);
416 if (len
< PRD_ENTRY_MAX_XFER_SZ
) {
417 ext_c_ddc
= PRD_ENTRY_DATA_SNOOP
| len
;
418 debug("ext_c_ddc1 = %08x, len = %08x\n\r", ext_c_ddc
, len
);
419 prde
->ext_c_ddc
= cpu_to_le32(ext_c_ddc
);
424 ext_c_ddc
= PRD_ENTRY_DATA_SNOOP
; /* 4M bytes */
425 debug("ext_c_ddc2 = %08x, len = %08x\n\r", ext_c_ddc
, len
);
426 prde
->ext_c_ddc
= cpu_to_le32(ext_c_ddc
);
427 buffer
+= PRD_ENTRY_MAX_XFER_SZ
;
428 len
-= PRD_ENTRY_MAX_XFER_SZ
;
434 /* Setup the command slot of cmd hdr */
435 cmd_hdr
= (cmd_hdr_entry_t
*)&sata
->cmd_hdr
->cmd_slot
[tag
];
437 cmd_hdr
->cda
= cpu_to_le32((u32
)cmd_desc
& ~0x3);
439 val32
= prde_count
<< CMD_HDR_PRD_ENTRY_SHIFT
;
440 val32
|= sizeof(sata_fis_h2d_t
);
441 cmd_hdr
->prde_fis_len
= cpu_to_le32(val32
);
443 cmd_hdr
->ttl
= cpu_to_le32(ttl
);
446 val32
= CMD_HDR_ATTR_RES
| CMD_HDR_ATTR_SNOOP
;
448 val32
= CMD_HDR_ATTR_RES
| CMD_HDR_ATTR_SNOOP
| CMD_HDR_ATTR_FPDMA
;
451 tag
&= CMD_HDR_ATTR_TAG
;
454 debug("attribute = %08x\n\r", val32
);
455 cmd_hdr
->attribute
= cpu_to_le32(val32
);
457 /* Make sure cmd desc and cmd slot valid before commmand issue */
461 val32
= (u32
)(h2d
->pm_port_c
& 0x0f);
462 out_le32(®
->cqpmp
, val32
);
465 if (ata_wait_register(®
->car
, (1 << tag
), 0, 10000))
466 printf("Wait no active time out\n\r");
469 if (!(in_le32(®
->cqr
) & (1 << tag
))) {
471 out_le32(®
->cqr
, val32
);
474 /* Wait command completed for 10s */
475 if (ata_wait_register(®
->ccr
, (1 << tag
), (1 << tag
), 10000)) {
477 printf("Non-NCQ command time out\n\r");
479 printf("NCQ command time out\n\r");
482 val32
= in_le32(®
->cer
);
486 fsl_sata_dump_sfis((struct sfis
*)cmd_desc
->sfis
);
487 printf("CE at device\n\r");
488 fsl_sata_dump_regs(reg
);
489 der
= in_le32(®
->der
);
490 out_le32(®
->cer
, val32
);
491 out_le32(®
->der
, der
);
494 /* Clear complete flags */
495 val32
= in_le32(®
->ccr
);
496 out_le32(®
->ccr
, val32
);
501 static int fsl_ata_exec_reset_cmd(struct fsl_sata
*sata
, struct cfis
*cfis
,
502 int tag
, u8
*buffer
, u32 len
)
507 static int fsl_sata_exec_cmd(struct fsl_sata
*sata
, struct cfis
*cfis
,
508 enum cmd_type command_type
, int tag
, u8
*buffer
, u32 len
)
512 if (tag
> SATA_HC_MAX_CMD
|| tag
< 0) {
513 printf("tag is out of range, tag=%d\n\r", tag
);
517 switch (command_type
) {
519 rc
= fsl_ata_exec_ata_cmd(sata
, cfis
, 0, tag
, buffer
, len
);
522 rc
= fsl_ata_exec_reset_cmd(sata
, cfis
, tag
, buffer
, len
);
525 rc
= fsl_ata_exec_ata_cmd(sata
, cfis
, 1, tag
, buffer
, len
);
528 case CMD_VENDOR_BIST
:
530 printf("not support now\n\r");
539 static void fsl_sata_identify(int dev
, u16
*id
)
541 fsl_sata_t
*sata
= (fsl_sata_t
*)sata_dev_desc
[dev
].priv
;
542 struct sata_fis_h2d h2d
;
545 cfis
= (struct cfis
*)&h2d
;
546 memset((void *)cfis
, 0, sizeof(struct cfis
));
548 cfis
->fis_type
= SATA_FIS_TYPE_REGISTER_H2D
;
549 cfis
->pm_port_c
= 0x80; /* is command */
550 cfis
->command
= ATA_CMD_ID_ATA
;
552 fsl_sata_exec_cmd(sata
, cfis
, CMD_ATA
, 0, (u8
*)id
, ATA_ID_WORDS
* 2);
553 ata_swap_buf_le16(id
, ATA_ID_WORDS
);
556 static void fsl_sata_xfer_mode(int dev
, u16
*id
)
558 fsl_sata_t
*sata
= (fsl_sata_t
*)sata_dev_desc
[dev
].priv
;
560 sata
->pio
= id
[ATA_ID_PIO_MODES
];
561 sata
->mwdma
= id
[ATA_ID_MWDMA_MODES
];
562 sata
->udma
= id
[ATA_ID_UDMA_MODES
];
563 debug("pio %04x, mwdma %04x, udma %04x\n\r", sata
->pio
, sata
->mwdma
, sata
->udma
);
566 static void fsl_sata_set_features(int dev
)
568 fsl_sata_t
*sata
= (fsl_sata_t
*)sata_dev_desc
[dev
].priv
;
569 struct sata_fis_h2d h2d
;
573 cfis
= (struct cfis
*)&h2d
;
574 memset((void *)cfis
, 0, sizeof(struct cfis
));
576 cfis
->fis_type
= SATA_FIS_TYPE_REGISTER_H2D
;
577 cfis
->pm_port_c
= 0x80; /* is command */
578 cfis
->command
= ATA_CMD_SET_FEATURES
;
579 cfis
->features
= SETFEATURES_XFER
;
581 /* First check the device capablity */
582 udma_cap
= (u8
)(sata
->udma
& 0xff);
583 debug("udma_cap %02x\n\r", udma_cap
);
585 if (udma_cap
== ATA_UDMA6
)
586 cfis
->sector_count
= XFER_UDMA_6
;
587 if (udma_cap
== ATA_UDMA5
)
588 cfis
->sector_count
= XFER_UDMA_5
;
589 if (udma_cap
== ATA_UDMA4
)
590 cfis
->sector_count
= XFER_UDMA_4
;
591 if (udma_cap
== ATA_UDMA3
)
592 cfis
->sector_count
= XFER_UDMA_3
;
594 fsl_sata_exec_cmd(sata
, cfis
, CMD_ATA
, 0, NULL
, 0);
597 static u32
fsl_sata_rw_cmd(int dev
, u32 start
, u32 blkcnt
, u8
*buffer
, int is_write
)
599 fsl_sata_t
*sata
= (fsl_sata_t
*)sata_dev_desc
[dev
].priv
;
600 struct sata_fis_h2d h2d
;
605 cfis
= (struct cfis
*)&h2d
;
607 memset((void *)cfis
, 0, sizeof(struct cfis
));
609 cfis
->fis_type
= SATA_FIS_TYPE_REGISTER_H2D
;
610 cfis
->pm_port_c
= 0x80; /* is command */
611 cfis
->command
= (is_write
) ? ATA_CMD_WRITE
: ATA_CMD_READ
;
612 cfis
->device
= ATA_LBA
;
614 cfis
->device
|= (block
>> 24) & 0xf;
615 cfis
->lba_high
= (block
>> 16) & 0xff;
616 cfis
->lba_mid
= (block
>> 8) & 0xff;
617 cfis
->lba_low
= block
& 0xff;
618 cfis
->sector_count
= (u8
)(blkcnt
& 0xff);
620 fsl_sata_exec_cmd(sata
, cfis
, CMD_ATA
, 0, buffer
, ATA_SECT_SIZE
* blkcnt
);
624 void fsl_sata_flush_cache(int dev
)
626 fsl_sata_t
*sata
= (fsl_sata_t
*)sata_dev_desc
[dev
].priv
;
627 struct sata_fis_h2d h2d
;
630 cfis
= (struct cfis
*)&h2d
;
632 memset((void *)cfis
, 0, sizeof(struct cfis
));
634 cfis
->fis_type
= SATA_FIS_TYPE_REGISTER_H2D
;
635 cfis
->pm_port_c
= 0x80; /* is command */
636 cfis
->command
= ATA_CMD_FLUSH
;
638 fsl_sata_exec_cmd(sata
, cfis
, CMD_ATA
, 0, NULL
, 0);
641 static u32
fsl_sata_rw_cmd_ext(int dev
, u32 start
, u32 blkcnt
, u8
*buffer
, int is_write
)
643 fsl_sata_t
*sata
= (fsl_sata_t
*)sata_dev_desc
[dev
].priv
;
644 struct sata_fis_h2d h2d
;
649 cfis
= (struct cfis
*)&h2d
;
651 memset((void *)cfis
, 0, sizeof(struct cfis
));
653 cfis
->fis_type
= SATA_FIS_TYPE_REGISTER_H2D
;
654 cfis
->pm_port_c
= 0x80; /* is command */
656 cfis
->command
= (is_write
) ? ATA_CMD_WRITE_EXT
659 cfis
->lba_high_exp
= (block
>> 40) & 0xff;
660 cfis
->lba_mid_exp
= (block
>> 32) & 0xff;
661 cfis
->lba_low_exp
= (block
>> 24) & 0xff;
662 cfis
->lba_high
= (block
>> 16) & 0xff;
663 cfis
->lba_mid
= (block
>> 8) & 0xff;
664 cfis
->lba_low
= block
& 0xff;
665 cfis
->device
= ATA_LBA
;
666 cfis
->sector_count_exp
= (blkcnt
>> 8) & 0xff;
667 cfis
->sector_count
= blkcnt
& 0xff;
669 fsl_sata_exec_cmd(sata
, cfis
, CMD_ATA
, 0, buffer
, ATA_SECT_SIZE
* blkcnt
);
673 u32
fsl_sata_rw_ncq_cmd(int dev
, u32 start
, u32 blkcnt
, u8
*buffer
, int is_write
)
675 fsl_sata_t
*sata
= (fsl_sata_t
*)sata_dev_desc
[dev
].priv
;
676 struct sata_fis_h2d h2d
;
681 if (sata_dev_desc
[dev
].lba48
!= 1) {
682 printf("execute FPDMA command on non-LBA48 hard disk\n\r");
687 cfis
= (struct cfis
*)&h2d
;
689 memset((void *)cfis
, 0, sizeof(struct cfis
));
691 cfis
->fis_type
= SATA_FIS_TYPE_REGISTER_H2D
;
692 cfis
->pm_port_c
= 0x80; /* is command */
694 cfis
->command
= (is_write
) ? ATA_CMD_FPDMA_WRITE
695 : ATA_CMD_FPDMA_READ
;
697 cfis
->lba_high_exp
= (block
>> 40) & 0xff;
698 cfis
->lba_mid_exp
= (block
>> 32) & 0xff;
699 cfis
->lba_low_exp
= (block
>> 24) & 0xff;
700 cfis
->lba_high
= (block
>> 16) & 0xff;
701 cfis
->lba_mid
= (block
>> 8) & 0xff;
702 cfis
->lba_low
= block
& 0xff;
704 cfis
->device
= ATA_LBA
;
705 cfis
->features_exp
= (blkcnt
>> 8) & 0xff;
706 cfis
->features
= blkcnt
& 0xff;
708 if (sata
->queue_depth
>= SATA_HC_MAX_CMD
)
709 ncq_channel
= SATA_HC_MAX_CMD
- 1;
711 ncq_channel
= sata
->queue_depth
- 1;
713 /* Use the latest queue */
714 fsl_sata_exec_cmd(sata
, cfis
, CMD_NCQ
, ncq_channel
, buffer
, ATA_SECT_SIZE
* blkcnt
);
718 void fsl_sata_flush_cache_ext(int dev
)
720 fsl_sata_t
*sata
= (fsl_sata_t
*)sata_dev_desc
[dev
].priv
;
721 struct sata_fis_h2d h2d
;
724 cfis
= (struct cfis
*)&h2d
;
726 memset((void *)cfis
, 0, sizeof(struct cfis
));
728 cfis
->fis_type
= SATA_FIS_TYPE_REGISTER_H2D
;
729 cfis
->pm_port_c
= 0x80; /* is command */
730 cfis
->command
= ATA_CMD_FLUSH_EXT
;
732 fsl_sata_exec_cmd(sata
, cfis
, CMD_ATA
, 0, NULL
, 0);
735 /* Software reset, set SRST of the Device Control register */
736 void fsl_sata_software_reset(int dev
)
741 static void fsl_sata_init_wcache(int dev
, u16
*id
)
743 fsl_sata_t
*sata
= (fsl_sata_t
*)sata_dev_desc
[dev
].priv
;
745 if (ata_id_has_wcache(id
) && ata_id_wcache_enabled(id
))
747 if (ata_id_has_flush(id
))
749 if (ata_id_has_flush_ext(id
))
753 static int fsl_sata_get_wcache(int dev
)
755 fsl_sata_t
*sata
= (fsl_sata_t
*)sata_dev_desc
[dev
].priv
;
759 static int fsl_sata_get_flush(int dev
)
761 fsl_sata_t
*sata
= (fsl_sata_t
*)sata_dev_desc
[dev
].priv
;
765 static int fsl_sata_get_flush_ext(int dev
)
767 fsl_sata_t
*sata
= (fsl_sata_t
*)sata_dev_desc
[dev
].priv
;
768 return sata
->flush_ext
;
771 u32
ata_low_level_rw_lba48(int dev
, u32 blknr
, u32 blkcnt
, void *buffer
, int is_write
)
781 max_blks
= ATA_MAX_SECTORS_LBA48
;
783 if (blks
> max_blks
) {
784 if (fsl_sata_info
[dev
].flags
!= FLAGS_FPDMA
)
785 fsl_sata_rw_cmd_ext(dev
, start
, max_blks
, addr
, is_write
);
787 fsl_sata_rw_ncq_cmd(dev
, start
, max_blks
, addr
, is_write
);
790 addr
+= ATA_SECT_SIZE
* max_blks
;
792 if (fsl_sata_info
[dev
].flags
!= FLAGS_FPDMA
)
793 fsl_sata_rw_cmd_ext(dev
, start
, blks
, addr
, is_write
);
795 fsl_sata_rw_ncq_cmd(dev
, start
, blks
, addr
, is_write
);
798 addr
+= ATA_SECT_SIZE
* blks
;
805 u32
ata_low_level_rw_lba28(int dev
, u32 blknr
, u32 blkcnt
, void *buffer
, int is_write
)
815 max_blks
= ATA_MAX_SECTORS
;
817 if (blks
> max_blks
) {
818 fsl_sata_rw_cmd(dev
, start
, max_blks
, addr
, is_write
);
821 addr
+= ATA_SECT_SIZE
* max_blks
;
823 fsl_sata_rw_cmd(dev
, start
, blks
, addr
, is_write
);
826 addr
+= ATA_SECT_SIZE
* blks
;
834 * SATA interface between low level driver and command layer
836 ulong
sata_read(int dev
, u32 blknr
, u32 blkcnt
, void *buffer
)
840 if (sata_dev_desc
[dev
].lba48
)
841 rc
= ata_low_level_rw_lba48(dev
, blknr
, blkcnt
, buffer
, READ_CMD
);
843 rc
= ata_low_level_rw_lba28(dev
, blknr
, blkcnt
, buffer
, READ_CMD
);
847 ulong
sata_write(int dev
, u32 blknr
, u32 blkcnt
, void *buffer
)
851 if (sata_dev_desc
[dev
].lba48
) {
852 rc
= ata_low_level_rw_lba48(dev
, blknr
, blkcnt
, buffer
, WRITE_CMD
);
853 if (fsl_sata_get_wcache(dev
) && fsl_sata_get_flush_ext(dev
))
854 fsl_sata_flush_cache_ext(dev
);
856 rc
= ata_low_level_rw_lba28(dev
, blknr
, blkcnt
, buffer
, WRITE_CMD
);
857 if (fsl_sata_get_wcache(dev
) && fsl_sata_get_flush(dev
))
858 fsl_sata_flush_cache(dev
);
863 int scan_sata(int dev
)
865 fsl_sata_t
*sata
= (fsl_sata_t
*)sata_dev_desc
[dev
].priv
;
866 unsigned char serial
[ATA_ID_SERNO_LEN
+ 1];
867 unsigned char firmware
[ATA_ID_FW_REV_LEN
+ 1];
868 unsigned char product
[ATA_ID_PROD_LEN
+ 1];
872 /* if no detected link */
876 id
= (u16
*)malloc(ATA_ID_WORDS
* 2);
878 printf("id malloc failed\n\r");
882 /* Identify device to get information */
883 fsl_sata_identify(dev
, id
);
886 ata_id_c_string(id
, serial
, ATA_ID_SERNO
, sizeof(serial
));
887 memcpy(sata_dev_desc
[dev
].product
, serial
, sizeof(serial
));
889 /* Firmware version */
890 ata_id_c_string(id
, firmware
, ATA_ID_FW_REV
, sizeof(firmware
));
891 memcpy(sata_dev_desc
[dev
].revision
, firmware
, sizeof(firmware
));
894 ata_id_c_string(id
, product
, ATA_ID_PROD
, sizeof(product
));
895 memcpy(sata_dev_desc
[dev
].vendor
, product
, sizeof(product
));
898 n_sectors
= ata_id_n_sectors(id
);
899 sata_dev_desc
[dev
].lba
= (u32
)n_sectors
;
901 /* Check if support LBA48 */
902 if (ata_id_has_lba48(id
)) {
903 sata_dev_desc
[dev
].lba48
= 1;
904 debug("Device support LBA48\n\r");
907 /* Get the NCQ queue depth from device */
908 sata
->queue_depth
= ata_id_queue_depth(id
);
910 /* Get the xfer mode from device */
911 fsl_sata_xfer_mode(dev
, id
);
913 /* Get the write cache status from device */
914 fsl_sata_init_wcache(dev
, id
);
916 /* Set the xfer mode to highest speed */
917 fsl_sata_set_features(dev
);
919 fsl_sata_identify(dev
, id
);