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1 /*
2 * (C) Copyright 2000-2011
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7
8 #include <common.h>
9 #include <ata.h>
10 #include <dm.h>
11 #include <ide.h>
12 #include <watchdog.h>
13 #include <asm/io.h>
14
15 #ifdef __PPC__
16 # define EIEIO __asm__ volatile ("eieio")
17 # define SYNC __asm__ volatile ("sync")
18 #else
19 # define EIEIO /* nothing */
20 # define SYNC /* nothing */
21 #endif
22
23 /* Current offset for IDE0 / IDE1 bus access */
24 ulong ide_bus_offset[CONFIG_SYS_IDE_MAXBUS] = {
25 #if defined(CONFIG_SYS_ATA_IDE0_OFFSET)
26 CONFIG_SYS_ATA_IDE0_OFFSET,
27 #endif
28 #if defined(CONFIG_SYS_ATA_IDE1_OFFSET) && (CONFIG_SYS_IDE_MAXBUS > 1)
29 CONFIG_SYS_ATA_IDE1_OFFSET,
30 #endif
31 };
32
33 static int ide_bus_ok[CONFIG_SYS_IDE_MAXBUS];
34
35 struct blk_desc ide_dev_desc[CONFIG_SYS_IDE_MAXDEVICE];
36
37 #define IDE_TIME_OUT 2000 /* 2 sec timeout */
38
39 #define ATAPI_TIME_OUT 7000 /* 7 sec timeout (5 sec seems to work...) */
40
41 #define IDE_SPIN_UP_TIME_OUT 5000 /* 5 sec spin-up timeout */
42
43 #ifndef CONFIG_SYS_ATA_PORT_ADDR
44 #define CONFIG_SYS_ATA_PORT_ADDR(port) (port)
45 #endif
46
47 #ifdef CONFIG_IDE_RESET
48 extern void ide_set_reset(int idereset);
49
50 static void ide_reset(void)
51 {
52 int i;
53
54 for (i = 0; i < CONFIG_SYS_IDE_MAXBUS; ++i)
55 ide_bus_ok[i] = 0;
56 for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; ++i)
57 ide_dev_desc[i].type = DEV_TYPE_UNKNOWN;
58
59 ide_set_reset(1); /* assert reset */
60
61 /* the reset signal shall be asserted for et least 25 us */
62 udelay(25);
63
64 WATCHDOG_RESET();
65
66 /* de-assert RESET signal */
67 ide_set_reset(0);
68
69 /* wait 250 ms */
70 for (i = 0; i < 250; ++i)
71 udelay(1000);
72 }
73 #else
74 #define ide_reset() /* dummy */
75 #endif /* CONFIG_IDE_RESET */
76
77 /*
78 * Wait until Busy bit is off, or timeout (in ms)
79 * Return last status
80 */
81 static uchar ide_wait(int dev, ulong t)
82 {
83 ulong delay = 10 * t; /* poll every 100 us */
84 uchar c;
85
86 while ((c = ide_inb(dev, ATA_STATUS)) & ATA_STAT_BUSY) {
87 udelay(100);
88 if (delay-- == 0)
89 break;
90 }
91 return c;
92 }
93
94 /*
95 * copy src to dest, skipping leading and trailing blanks and null
96 * terminate the string
97 * "len" is the size of available memory including the terminating '\0'
98 */
99 static void ident_cpy(unsigned char *dst, unsigned char *src,
100 unsigned int len)
101 {
102 unsigned char *end, *last;
103
104 last = dst;
105 end = src + len - 1;
106
107 /* reserve space for '\0' */
108 if (len < 2)
109 goto OUT;
110
111 /* skip leading white space */
112 while ((*src) && (src < end) && (*src == ' '))
113 ++src;
114
115 /* copy string, omitting trailing white space */
116 while ((*src) && (src < end)) {
117 *dst++ = *src;
118 if (*src++ != ' ')
119 last = dst;
120 }
121 OUT:
122 *last = '\0';
123 }
124
125 #ifdef CONFIG_ATAPI
126 /****************************************************************************
127 * ATAPI Support
128 */
129
130 #if defined(CONFIG_IDE_SWAP_IO)
131 /* since ATAPI may use commands with not 4 bytes alligned length
132 * we have our own transfer functions, 2 bytes alligned */
133 __weak void ide_output_data_shorts(int dev, ushort *sect_buf, int shorts)
134 {
135 ushort *dbuf;
136 volatile ushort *pbuf;
137
138 pbuf = (ushort *)(ATA_CURR_BASE(dev) + ATA_DATA_REG);
139 dbuf = (ushort *)sect_buf;
140
141 debug("in output data shorts base for read is %lx\n",
142 (unsigned long) pbuf);
143
144 while (shorts--) {
145 EIEIO;
146 *pbuf = *dbuf++;
147 }
148 }
149
150 __weak void ide_input_data_shorts(int dev, ushort *sect_buf, int shorts)
151 {
152 ushort *dbuf;
153 volatile ushort *pbuf;
154
155 pbuf = (ushort *)(ATA_CURR_BASE(dev) + ATA_DATA_REG);
156 dbuf = (ushort *)sect_buf;
157
158 debug("in input data shorts base for read is %lx\n",
159 (unsigned long) pbuf);
160
161 while (shorts--) {
162 EIEIO;
163 *dbuf++ = *pbuf;
164 }
165 }
166
167 #else /* ! CONFIG_IDE_SWAP_IO */
168 __weak void ide_output_data_shorts(int dev, ushort *sect_buf, int shorts)
169 {
170 outsw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, shorts);
171 }
172
173 __weak void ide_input_data_shorts(int dev, ushort *sect_buf, int shorts)
174 {
175 insw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, shorts);
176 }
177
178 #endif /* CONFIG_IDE_SWAP_IO */
179
180 /*
181 * Wait until (Status & mask) == res, or timeout (in ms)
182 * Return last status
183 * This is used since some ATAPI CD ROMs clears their Busy Bit first
184 * and then they set their DRQ Bit
185 */
186 static uchar atapi_wait_mask(int dev, ulong t, uchar mask, uchar res)
187 {
188 ulong delay = 10 * t; /* poll every 100 us */
189 uchar c;
190
191 /* prevents to read the status before valid */
192 c = ide_inb(dev, ATA_DEV_CTL);
193
194 while (((c = ide_inb(dev, ATA_STATUS)) & mask) != res) {
195 /* break if error occurs (doesn't make sense to wait more) */
196 if ((c & ATA_STAT_ERR) == ATA_STAT_ERR)
197 break;
198 udelay(100);
199 if (delay-- == 0)
200 break;
201 }
202 return c;
203 }
204
205 /*
206 * issue an atapi command
207 */
208 unsigned char atapi_issue(int device, unsigned char *ccb, int ccblen,
209 unsigned char *buffer, int buflen)
210 {
211 unsigned char c, err, mask, res;
212 int n;
213
214 /* Select device
215 */
216 mask = ATA_STAT_BUSY | ATA_STAT_DRQ;
217 res = 0;
218 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
219 c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
220 if ((c & mask) != res) {
221 printf("ATAPI_ISSUE: device %d not ready status %X\n", device,
222 c);
223 err = 0xFF;
224 goto AI_OUT;
225 }
226 /* write taskfile */
227 ide_outb(device, ATA_ERROR_REG, 0); /* no DMA, no overlaped */
228 ide_outb(device, ATA_SECT_CNT, 0);
229 ide_outb(device, ATA_SECT_NUM, 0);
230 ide_outb(device, ATA_CYL_LOW, (unsigned char) (buflen & 0xFF));
231 ide_outb(device, ATA_CYL_HIGH,
232 (unsigned char) ((buflen >> 8) & 0xFF));
233 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
234
235 ide_outb(device, ATA_COMMAND, ATAPI_CMD_PACKET);
236 udelay(50);
237
238 mask = ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR;
239 res = ATA_STAT_DRQ;
240 c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
241
242 if ((c & mask) != res) { /* DRQ must be 1, BSY 0 */
243 printf("ATAPI_ISSUE: Error (no IRQ) before sending ccb dev %d status 0x%02x\n",
244 device, c);
245 err = 0xFF;
246 goto AI_OUT;
247 }
248
249 /* write command block */
250 ide_output_data_shorts(device, (unsigned short *)ccb, ccblen / 2);
251
252 /* ATAPI Command written wait for completition */
253 udelay(5000); /* device must set bsy */
254
255 mask = ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR;
256 /*
257 * if no data wait for DRQ = 0 BSY = 0
258 * if data wait for DRQ = 1 BSY = 0
259 */
260 res = 0;
261 if (buflen)
262 res = ATA_STAT_DRQ;
263 c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
264 if ((c & mask) != res) {
265 if (c & ATA_STAT_ERR) {
266 err = (ide_inb(device, ATA_ERROR_REG)) >> 4;
267 debug("atapi_issue 1 returned sense key %X status %02X\n",
268 err, c);
269 } else {
270 printf("ATAPI_ISSUE: (no DRQ) after sending ccb (%x) status 0x%02x\n",
271 ccb[0], c);
272 err = 0xFF;
273 }
274 goto AI_OUT;
275 }
276 n = ide_inb(device, ATA_CYL_HIGH);
277 n <<= 8;
278 n += ide_inb(device, ATA_CYL_LOW);
279 if (n > buflen) {
280 printf("ERROR, transfer bytes %d requested only %d\n", n,
281 buflen);
282 err = 0xff;
283 goto AI_OUT;
284 }
285 if ((n == 0) && (buflen < 0)) {
286 printf("ERROR, transfer bytes %d requested %d\n", n, buflen);
287 err = 0xff;
288 goto AI_OUT;
289 }
290 if (n != buflen) {
291 debug("WARNING, transfer bytes %d not equal with requested %d\n",
292 n, buflen);
293 }
294 if (n != 0) { /* data transfer */
295 debug("ATAPI_ISSUE: %d Bytes to transfer\n", n);
296 /* we transfer shorts */
297 n >>= 1;
298 /* ok now decide if it is an in or output */
299 if ((ide_inb(device, ATA_SECT_CNT) & 0x02) == 0) {
300 debug("Write to device\n");
301 ide_output_data_shorts(device, (unsigned short *)buffer,
302 n);
303 } else {
304 debug("Read from device @ %p shorts %d\n", buffer, n);
305 ide_input_data_shorts(device, (unsigned short *)buffer,
306 n);
307 }
308 }
309 udelay(5000); /* seems that some CD ROMs need this... */
310 mask = ATA_STAT_BUSY | ATA_STAT_ERR;
311 res = 0;
312 c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
313 if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
314 err = (ide_inb(device, ATA_ERROR_REG) >> 4);
315 debug("atapi_issue 2 returned sense key %X status %X\n", err,
316 c);
317 } else {
318 err = 0;
319 }
320 AI_OUT:
321 return err;
322 }
323
324 /*
325 * sending the command to atapi_issue. If an status other than good
326 * returns, an request_sense will be issued
327 */
328
329 #define ATAPI_DRIVE_NOT_READY 100
330 #define ATAPI_UNIT_ATTN 10
331
332 unsigned char atapi_issue_autoreq(int device,
333 unsigned char *ccb,
334 int ccblen,
335 unsigned char *buffer, int buflen)
336 {
337 unsigned char sense_data[18], sense_ccb[12];
338 unsigned char res, key, asc, ascq;
339 int notready, unitattn;
340
341 unitattn = ATAPI_UNIT_ATTN;
342 notready = ATAPI_DRIVE_NOT_READY;
343
344 retry:
345 res = atapi_issue(device, ccb, ccblen, buffer, buflen);
346 if (res == 0)
347 return 0; /* Ok */
348
349 if (res == 0xFF)
350 return 0xFF; /* error */
351
352 debug("(auto_req)atapi_issue returned sense key %X\n", res);
353
354 memset(sense_ccb, 0, sizeof(sense_ccb));
355 memset(sense_data, 0, sizeof(sense_data));
356 sense_ccb[0] = ATAPI_CMD_REQ_SENSE;
357 sense_ccb[4] = 18; /* allocation Length */
358
359 res = atapi_issue(device, sense_ccb, 12, sense_data, 18);
360 key = (sense_data[2] & 0xF);
361 asc = (sense_data[12]);
362 ascq = (sense_data[13]);
363
364 debug("ATAPI_CMD_REQ_SENSE returned %x\n", res);
365 debug(" Sense page: %02X key %02X ASC %02X ASCQ %02X\n",
366 sense_data[0], key, asc, ascq);
367
368 if ((key == 0))
369 return 0; /* ok device ready */
370
371 if ((key == 6) || (asc == 0x29) || (asc == 0x28)) { /* Unit Attention */
372 if (unitattn-- > 0) {
373 udelay(200 * 1000);
374 goto retry;
375 }
376 printf("Unit Attention, tried %d\n", ATAPI_UNIT_ATTN);
377 goto error;
378 }
379 if ((asc == 0x4) && (ascq == 0x1)) {
380 /* not ready, but will be ready soon */
381 if (notready-- > 0) {
382 udelay(200 * 1000);
383 goto retry;
384 }
385 printf("Drive not ready, tried %d times\n",
386 ATAPI_DRIVE_NOT_READY);
387 goto error;
388 }
389 if (asc == 0x3a) {
390 debug("Media not present\n");
391 goto error;
392 }
393
394 printf("ERROR: Unknown Sense key %02X ASC %02X ASCQ %02X\n", key, asc,
395 ascq);
396 error:
397 debug("ERROR Sense key %02X ASC %02X ASCQ %02X\n", key, asc, ascq);
398 return 0xFF;
399 }
400
401 /*
402 * atapi_read:
403 * we transfer only one block per command, since the multiple DRQ per
404 * command is not yet implemented
405 */
406 #define ATAPI_READ_MAX_BYTES 2048 /* we read max 2kbytes */
407 #define ATAPI_READ_BLOCK_SIZE 2048 /* assuming CD part */
408 #define ATAPI_READ_MAX_BLOCK (ATAPI_READ_MAX_BYTES/ATAPI_READ_BLOCK_SIZE)
409
410 ulong atapi_read(struct blk_desc *block_dev, lbaint_t blknr, lbaint_t blkcnt,
411 void *buffer)
412 {
413 int device = block_dev->devnum;
414 ulong n = 0;
415 unsigned char ccb[12]; /* Command descriptor block */
416 ulong cnt;
417
418 debug("atapi_read dev %d start " LBAF " blocks " LBAF
419 " buffer at %lX\n", device, blknr, blkcnt, (ulong) buffer);
420
421 do {
422 if (blkcnt > ATAPI_READ_MAX_BLOCK)
423 cnt = ATAPI_READ_MAX_BLOCK;
424 else
425 cnt = blkcnt;
426
427 ccb[0] = ATAPI_CMD_READ_12;
428 ccb[1] = 0; /* reserved */
429 ccb[2] = (unsigned char) (blknr >> 24) & 0xFF; /* MSB Block */
430 ccb[3] = (unsigned char) (blknr >> 16) & 0xFF; /* */
431 ccb[4] = (unsigned char) (blknr >> 8) & 0xFF;
432 ccb[5] = (unsigned char) blknr & 0xFF; /* LSB Block */
433 ccb[6] = (unsigned char) (cnt >> 24) & 0xFF; /* MSB Block cnt */
434 ccb[7] = (unsigned char) (cnt >> 16) & 0xFF;
435 ccb[8] = (unsigned char) (cnt >> 8) & 0xFF;
436 ccb[9] = (unsigned char) cnt & 0xFF; /* LSB Block */
437 ccb[10] = 0; /* reserved */
438 ccb[11] = 0; /* reserved */
439
440 if (atapi_issue_autoreq(device, ccb, 12,
441 (unsigned char *)buffer,
442 cnt * ATAPI_READ_BLOCK_SIZE)
443 == 0xFF) {
444 return n;
445 }
446 n += cnt;
447 blkcnt -= cnt;
448 blknr += cnt;
449 buffer += (cnt * ATAPI_READ_BLOCK_SIZE);
450 } while (blkcnt > 0);
451 return n;
452 }
453
454 static void atapi_inquiry(struct blk_desc *dev_desc)
455 {
456 unsigned char ccb[12]; /* Command descriptor block */
457 unsigned char iobuf[64]; /* temp buf */
458 unsigned char c;
459 int device;
460
461 device = dev_desc->devnum;
462 dev_desc->type = DEV_TYPE_UNKNOWN; /* not yet valid */
463 #ifndef CONFIG_BLK
464 dev_desc->block_read = atapi_read;
465 #endif
466
467 memset(ccb, 0, sizeof(ccb));
468 memset(iobuf, 0, sizeof(iobuf));
469
470 ccb[0] = ATAPI_CMD_INQUIRY;
471 ccb[4] = 40; /* allocation Legnth */
472 c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *)iobuf, 40);
473
474 debug("ATAPI_CMD_INQUIRY returned %x\n", c);
475 if (c != 0)
476 return;
477
478 /* copy device ident strings */
479 ident_cpy((unsigned char *)dev_desc->vendor, &iobuf[8], 8);
480 ident_cpy((unsigned char *)dev_desc->product, &iobuf[16], 16);
481 ident_cpy((unsigned char *)dev_desc->revision, &iobuf[32], 5);
482
483 dev_desc->lun = 0;
484 dev_desc->lba = 0;
485 dev_desc->blksz = 0;
486 dev_desc->log2blksz = LOG2_INVALID(typeof(dev_desc->log2blksz));
487 dev_desc->type = iobuf[0] & 0x1f;
488
489 if ((iobuf[1] & 0x80) == 0x80)
490 dev_desc->removable = 1;
491 else
492 dev_desc->removable = 0;
493
494 memset(ccb, 0, sizeof(ccb));
495 memset(iobuf, 0, sizeof(iobuf));
496 ccb[0] = ATAPI_CMD_START_STOP;
497 ccb[4] = 0x03; /* start */
498
499 c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *)iobuf, 0);
500
501 debug("ATAPI_CMD_START_STOP returned %x\n", c);
502 if (c != 0)
503 return;
504
505 memset(ccb, 0, sizeof(ccb));
506 memset(iobuf, 0, sizeof(iobuf));
507 c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *)iobuf, 0);
508
509 debug("ATAPI_CMD_UNIT_TEST_READY returned %x\n", c);
510 if (c != 0)
511 return;
512
513 memset(ccb, 0, sizeof(ccb));
514 memset(iobuf, 0, sizeof(iobuf));
515 ccb[0] = ATAPI_CMD_READ_CAP;
516 c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *)iobuf, 8);
517 debug("ATAPI_CMD_READ_CAP returned %x\n", c);
518 if (c != 0)
519 return;
520
521 debug("Read Cap: LBA %02X%02X%02X%02X blksize %02X%02X%02X%02X\n",
522 iobuf[0], iobuf[1], iobuf[2], iobuf[3],
523 iobuf[4], iobuf[5], iobuf[6], iobuf[7]);
524
525 dev_desc->lba = ((unsigned long) iobuf[0] << 24) +
526 ((unsigned long) iobuf[1] << 16) +
527 ((unsigned long) iobuf[2] << 8) + ((unsigned long) iobuf[3]);
528 dev_desc->blksz = ((unsigned long) iobuf[4] << 24) +
529 ((unsigned long) iobuf[5] << 16) +
530 ((unsigned long) iobuf[6] << 8) + ((unsigned long) iobuf[7]);
531 dev_desc->log2blksz = LOG2(dev_desc->blksz);
532 #ifdef CONFIG_LBA48
533 /* ATAPI devices cannot use 48bit addressing (ATA/ATAPI v7) */
534 dev_desc->lba48 = 0;
535 #endif
536 return;
537 }
538
539 #endif /* CONFIG_ATAPI */
540
541 static void ide_ident(struct blk_desc *dev_desc)
542 {
543 unsigned char c;
544 hd_driveid_t iop;
545
546 #ifdef CONFIG_ATAPI
547 int retries = 0;
548 #endif
549 int device;
550
551 device = dev_desc->devnum;
552 printf(" Device %d: ", device);
553
554 /* Select device
555 */
556 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
557 dev_desc->if_type = IF_TYPE_IDE;
558 #ifdef CONFIG_ATAPI
559
560 retries = 0;
561
562 /* Warning: This will be tricky to read */
563 while (retries <= 1) {
564 /* check signature */
565 if ((ide_inb(device, ATA_SECT_CNT) == 0x01) &&
566 (ide_inb(device, ATA_SECT_NUM) == 0x01) &&
567 (ide_inb(device, ATA_CYL_LOW) == 0x14) &&
568 (ide_inb(device, ATA_CYL_HIGH) == 0xEB)) {
569 /* ATAPI Signature found */
570 dev_desc->if_type = IF_TYPE_ATAPI;
571 /*
572 * Start Ident Command
573 */
574 ide_outb(device, ATA_COMMAND, ATAPI_CMD_IDENT);
575 /*
576 * Wait for completion - ATAPI devices need more time
577 * to become ready
578 */
579 c = ide_wait(device, ATAPI_TIME_OUT);
580 } else
581 #endif
582 {
583 /*
584 * Start Ident Command
585 */
586 ide_outb(device, ATA_COMMAND, ATA_CMD_IDENT);
587
588 /*
589 * Wait for completion
590 */
591 c = ide_wait(device, IDE_TIME_OUT);
592 }
593
594 if (((c & ATA_STAT_DRQ) == 0) ||
595 ((c & (ATA_STAT_FAULT | ATA_STAT_ERR)) != 0)) {
596 #ifdef CONFIG_ATAPI
597 {
598 /*
599 * Need to soft reset the device
600 * in case it's an ATAPI...
601 */
602 debug("Retrying...\n");
603 ide_outb(device, ATA_DEV_HD,
604 ATA_LBA | ATA_DEVICE(device));
605 udelay(100000);
606 ide_outb(device, ATA_COMMAND, 0x08);
607 udelay(500000); /* 500 ms */
608 }
609 /*
610 * Select device
611 */
612 ide_outb(device, ATA_DEV_HD,
613 ATA_LBA | ATA_DEVICE(device));
614 retries++;
615 #else
616 return;
617 #endif
618 }
619 #ifdef CONFIG_ATAPI
620 else
621 break;
622 } /* see above - ugly to read */
623
624 if (retries == 2) /* Not found */
625 return;
626 #endif
627
628 ide_input_swap_data(device, (ulong *)&iop, ATA_SECTORWORDS);
629
630 ident_cpy((unsigned char *)dev_desc->revision, iop.fw_rev,
631 sizeof(dev_desc->revision));
632 ident_cpy((unsigned char *)dev_desc->vendor, iop.model,
633 sizeof(dev_desc->vendor));
634 ident_cpy((unsigned char *)dev_desc->product, iop.serial_no,
635 sizeof(dev_desc->product));
636 #ifdef __LITTLE_ENDIAN
637 /*
638 * firmware revision, model, and serial number have Big Endian Byte
639 * order in Word. Convert all three to little endian.
640 *
641 * See CF+ and CompactFlash Specification Revision 2.0:
642 * 6.2.1.6: Identify Drive, Table 39 for more details
643 */
644
645 strswab(dev_desc->revision);
646 strswab(dev_desc->vendor);
647 strswab(dev_desc->product);
648 #endif /* __LITTLE_ENDIAN */
649
650 if ((iop.config & 0x0080) == 0x0080)
651 dev_desc->removable = 1;
652 else
653 dev_desc->removable = 0;
654
655 #ifdef CONFIG_ATAPI
656 if (dev_desc->if_type == IF_TYPE_ATAPI) {
657 atapi_inquiry(dev_desc);
658 return;
659 }
660 #endif /* CONFIG_ATAPI */
661
662 #ifdef __BIG_ENDIAN
663 /* swap shorts */
664 dev_desc->lba = (iop.lba_capacity << 16) | (iop.lba_capacity >> 16);
665 #else /* ! __BIG_ENDIAN */
666 /*
667 * do not swap shorts on little endian
668 *
669 * See CF+ and CompactFlash Specification Revision 2.0:
670 * 6.2.1.6: Identfy Drive, Table 39, Word Address 57-58 for details.
671 */
672 dev_desc->lba = iop.lba_capacity;
673 #endif /* __BIG_ENDIAN */
674
675 #ifdef CONFIG_LBA48
676 if (iop.command_set_2 & 0x0400) { /* LBA 48 support */
677 dev_desc->lba48 = 1;
678 dev_desc->lba = (unsigned long long) iop.lba48_capacity[0] |
679 ((unsigned long long) iop.lba48_capacity[1] << 16) |
680 ((unsigned long long) iop.lba48_capacity[2] << 32) |
681 ((unsigned long long) iop.lba48_capacity[3] << 48);
682 } else {
683 dev_desc->lba48 = 0;
684 }
685 #endif /* CONFIG_LBA48 */
686 /* assuming HD */
687 dev_desc->type = DEV_TYPE_HARDDISK;
688 dev_desc->blksz = ATA_BLOCKSIZE;
689 dev_desc->log2blksz = LOG2(dev_desc->blksz);
690 dev_desc->lun = 0; /* just to fill something in... */
691
692 #if 0 /* only used to test the powersaving mode,
693 * if enabled, the drive goes after 5 sec
694 * in standby mode */
695 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
696 c = ide_wait(device, IDE_TIME_OUT);
697 ide_outb(device, ATA_SECT_CNT, 1);
698 ide_outb(device, ATA_LBA_LOW, 0);
699 ide_outb(device, ATA_LBA_MID, 0);
700 ide_outb(device, ATA_LBA_HIGH, 0);
701 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
702 ide_outb(device, ATA_COMMAND, 0xe3);
703 udelay(50);
704 c = ide_wait(device, IDE_TIME_OUT); /* can't take over 500 ms */
705 #endif
706 }
707
708 __weak void ide_outb(int dev, int port, unsigned char val)
709 {
710 debug("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n",
711 dev, port, val,
712 (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)));
713
714 #if defined(CONFIG_IDE_AHB)
715 if (port) {
716 /* write command */
717 ide_write_register(dev, port, val);
718 } else {
719 /* write data */
720 outb(val, (ATA_CURR_BASE(dev)));
721 }
722 #else
723 outb(val, (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)));
724 #endif
725 }
726
727 __weak unsigned char ide_inb(int dev, int port)
728 {
729 uchar val;
730
731 #if defined(CONFIG_IDE_AHB)
732 val = ide_read_register(dev, port);
733 #else
734 val = inb((ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)));
735 #endif
736
737 debug("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n",
738 dev, port,
739 (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)), val);
740 return val;
741 }
742
743 void ide_init(void)
744 {
745 unsigned char c;
746 int i, bus;
747
748 #ifdef CONFIG_IDE_PREINIT
749 WATCHDOG_RESET();
750
751 if (ide_preinit()) {
752 puts("ide_preinit failed\n");
753 return;
754 }
755 #endif /* CONFIG_IDE_PREINIT */
756
757 WATCHDOG_RESET();
758
759 /* ATAPI Drives seems to need a proper IDE Reset */
760 ide_reset();
761
762 /*
763 * Wait for IDE to get ready.
764 * According to spec, this can take up to 31 seconds!
765 */
766 for (bus = 0; bus < CONFIG_SYS_IDE_MAXBUS; ++bus) {
767 int dev =
768 bus * (CONFIG_SYS_IDE_MAXDEVICE /
769 CONFIG_SYS_IDE_MAXBUS);
770
771 printf("Bus %d: ", bus);
772
773 ide_bus_ok[bus] = 0;
774
775 /* Select device
776 */
777 udelay(100000); /* 100 ms */
778 ide_outb(dev, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(dev));
779 udelay(100000); /* 100 ms */
780 i = 0;
781 do {
782 udelay(10000); /* 10 ms */
783
784 c = ide_inb(dev, ATA_STATUS);
785 i++;
786 if (i > (ATA_RESET_TIME * 100)) {
787 puts("** Timeout **\n");
788 return;
789 }
790 if ((i >= 100) && ((i % 100) == 0))
791 putc('.');
792
793 } while (c & ATA_STAT_BUSY);
794
795 if (c & (ATA_STAT_BUSY | ATA_STAT_FAULT)) {
796 puts("not available ");
797 debug("Status = 0x%02X ", c);
798 #ifndef CONFIG_ATAPI /* ATAPI Devices do not set DRDY */
799 } else if ((c & ATA_STAT_READY) == 0) {
800 puts("not available ");
801 debug("Status = 0x%02X ", c);
802 #endif
803 } else {
804 puts("OK ");
805 ide_bus_ok[bus] = 1;
806 }
807 WATCHDOG_RESET();
808 }
809
810 putc('\n');
811
812 for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; ++i) {
813 ide_dev_desc[i].type = DEV_TYPE_UNKNOWN;
814 ide_dev_desc[i].if_type = IF_TYPE_IDE;
815 ide_dev_desc[i].devnum = i;
816 ide_dev_desc[i].part_type = PART_TYPE_UNKNOWN;
817 ide_dev_desc[i].blksz = 0;
818 ide_dev_desc[i].log2blksz =
819 LOG2_INVALID(typeof(ide_dev_desc[i].log2blksz));
820 ide_dev_desc[i].lba = 0;
821 #ifndef CONFIG_BLK
822 ide_dev_desc[i].block_read = ide_read;
823 ide_dev_desc[i].block_write = ide_write;
824 #endif
825 if (!ide_bus_ok[IDE_BUS(i)])
826 continue;
827 ide_ident(&ide_dev_desc[i]);
828 dev_print(&ide_dev_desc[i]);
829
830 if ((ide_dev_desc[i].lba > 0) && (ide_dev_desc[i].blksz > 0)) {
831 /* initialize partition type */
832 part_init(&ide_dev_desc[i]);
833 }
834 }
835 WATCHDOG_RESET();
836 }
837
838 /* We only need to swap data if we are running on a big endian cpu. */
839 #if defined(__LITTLE_ENDIAN)
840 __weak void ide_input_swap_data(int dev, ulong *sect_buf, int words)
841 {
842 ide_input_data(dev, sect_buf, words);
843 }
844 #else
845 __weak void ide_input_swap_data(int dev, ulong *sect_buf, int words)
846 {
847 volatile ushort *pbuf =
848 (ushort *)(ATA_CURR_BASE(dev) + ATA_DATA_REG);
849 ushort *dbuf = (ushort *)sect_buf;
850
851 debug("in input swap data base for read is %lx\n",
852 (unsigned long) pbuf);
853
854 while (words--) {
855 #ifdef __MIPS__
856 *dbuf++ = swab16p((u16 *)pbuf);
857 *dbuf++ = swab16p((u16 *)pbuf);
858 #else
859 *dbuf++ = ld_le16(pbuf);
860 *dbuf++ = ld_le16(pbuf);
861 #endif /* !MIPS */
862 }
863 }
864 #endif /* __LITTLE_ENDIAN */
865
866
867 #if defined(CONFIG_IDE_SWAP_IO)
868 __weak void ide_output_data(int dev, const ulong *sect_buf, int words)
869 {
870 ushort *dbuf;
871 volatile ushort *pbuf;
872
873 pbuf = (ushort *)(ATA_CURR_BASE(dev) + ATA_DATA_REG);
874 dbuf = (ushort *)sect_buf;
875 while (words--) {
876 EIEIO;
877 *pbuf = *dbuf++;
878 EIEIO;
879 *pbuf = *dbuf++;
880 }
881 }
882 #else /* ! CONFIG_IDE_SWAP_IO */
883 __weak void ide_output_data(int dev, const ulong *sect_buf, int words)
884 {
885 #if defined(CONFIG_IDE_AHB)
886 ide_write_data(dev, sect_buf, words);
887 #else
888 outsw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, words << 1);
889 #endif
890 }
891 #endif /* CONFIG_IDE_SWAP_IO */
892
893 #if defined(CONFIG_IDE_SWAP_IO)
894 __weak void ide_input_data(int dev, ulong *sect_buf, int words)
895 {
896 ushort *dbuf;
897 volatile ushort *pbuf;
898
899 pbuf = (ushort *)(ATA_CURR_BASE(dev) + ATA_DATA_REG);
900 dbuf = (ushort *)sect_buf;
901
902 debug("in input data base for read is %lx\n", (unsigned long) pbuf);
903
904 while (words--) {
905 EIEIO;
906 *dbuf++ = *pbuf;
907 EIEIO;
908 *dbuf++ = *pbuf;
909 }
910 }
911 #else /* ! CONFIG_IDE_SWAP_IO */
912 __weak void ide_input_data(int dev, ulong *sect_buf, int words)
913 {
914 #if defined(CONFIG_IDE_AHB)
915 ide_read_data(dev, sect_buf, words);
916 #else
917 insw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, words << 1);
918 #endif
919 }
920
921 #endif /* CONFIG_IDE_SWAP_IO */
922
923 #ifdef CONFIG_BLK
924 ulong ide_read(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt,
925 void *buffer)
926 #else
927 ulong ide_read(struct blk_desc *block_dev, lbaint_t blknr, lbaint_t blkcnt,
928 void *buffer)
929 #endif
930 {
931 #ifdef CONFIG_BLK
932 struct blk_desc *block_dev = dev_get_uclass_platdata(dev);
933 #endif
934 int device = block_dev->devnum;
935 ulong n = 0;
936 unsigned char c;
937 unsigned char pwrsave = 0; /* power save */
938
939 #ifdef CONFIG_LBA48
940 unsigned char lba48 = 0;
941
942 if (blknr & 0x0000fffff0000000ULL) {
943 /* more than 28 bits used, use 48bit mode */
944 lba48 = 1;
945 }
946 #endif
947 debug("ide_read dev %d start " LBAF ", blocks " LBAF " buffer at %lX\n",
948 device, blknr, blkcnt, (ulong) buffer);
949
950 /* Select device
951 */
952 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
953 c = ide_wait(device, IDE_TIME_OUT);
954
955 if (c & ATA_STAT_BUSY) {
956 printf("IDE read: device %d not ready\n", device);
957 goto IDE_READ_E;
958 }
959
960 /* first check if the drive is in Powersaving mode, if yes,
961 * increase the timeout value */
962 ide_outb(device, ATA_COMMAND, ATA_CMD_CHK_PWR);
963 udelay(50);
964
965 c = ide_wait(device, IDE_TIME_OUT); /* can't take over 500 ms */
966
967 if (c & ATA_STAT_BUSY) {
968 printf("IDE read: device %d not ready\n", device);
969 goto IDE_READ_E;
970 }
971 if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
972 printf("No Powersaving mode %X\n", c);
973 } else {
974 c = ide_inb(device, ATA_SECT_CNT);
975 debug("Powersaving %02X\n", c);
976 if (c == 0)
977 pwrsave = 1;
978 }
979
980
981 while (blkcnt-- > 0) {
982 c = ide_wait(device, IDE_TIME_OUT);
983
984 if (c & ATA_STAT_BUSY) {
985 printf("IDE read: device %d not ready\n", device);
986 break;
987 }
988 #ifdef CONFIG_LBA48
989 if (lba48) {
990 /* write high bits */
991 ide_outb(device, ATA_SECT_CNT, 0);
992 ide_outb(device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
993 #ifdef CONFIG_SYS_64BIT_LBA
994 ide_outb(device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
995 ide_outb(device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
996 #else
997 ide_outb(device, ATA_LBA_MID, 0);
998 ide_outb(device, ATA_LBA_HIGH, 0);
999 #endif
1000 }
1001 #endif
1002 ide_outb(device, ATA_SECT_CNT, 1);
1003 ide_outb(device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
1004 ide_outb(device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
1005 ide_outb(device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
1006
1007 #ifdef CONFIG_LBA48
1008 if (lba48) {
1009 ide_outb(device, ATA_DEV_HD,
1010 ATA_LBA | ATA_DEVICE(device));
1011 ide_outb(device, ATA_COMMAND, ATA_CMD_READ_EXT);
1012
1013 } else
1014 #endif
1015 {
1016 ide_outb(device, ATA_DEV_HD, ATA_LBA |
1017 ATA_DEVICE(device) | ((blknr >> 24) & 0xF));
1018 ide_outb(device, ATA_COMMAND, ATA_CMD_READ);
1019 }
1020
1021 udelay(50);
1022
1023 if (pwrsave) {
1024 /* may take up to 4 sec */
1025 c = ide_wait(device, IDE_SPIN_UP_TIME_OUT);
1026 pwrsave = 0;
1027 } else {
1028 /* can't take over 500 ms */
1029 c = ide_wait(device, IDE_TIME_OUT);
1030 }
1031
1032 if ((c & (ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR)) !=
1033 ATA_STAT_DRQ) {
1034 printf("Error (no IRQ) dev %d blk " LBAF
1035 ": status %#02x\n", device, blknr, c);
1036 break;
1037 }
1038
1039 ide_input_data(device, buffer, ATA_SECTORWORDS);
1040 (void) ide_inb(device, ATA_STATUS); /* clear IRQ */
1041
1042 ++n;
1043 ++blknr;
1044 buffer += ATA_BLOCKSIZE;
1045 }
1046 IDE_READ_E:
1047 return n;
1048 }
1049
1050 #ifdef CONFIG_BLK
1051 ulong ide_write(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt,
1052 const void *buffer)
1053 #else
1054 ulong ide_write(struct blk_desc *block_dev, lbaint_t blknr, lbaint_t blkcnt,
1055 const void *buffer)
1056 #endif
1057 {
1058 #ifdef CONFIG_BLK
1059 struct blk_desc *block_dev = dev_get_uclass_platdata(dev);
1060 #endif
1061 int device = block_dev->devnum;
1062 ulong n = 0;
1063 unsigned char c;
1064
1065 #ifdef CONFIG_LBA48
1066 unsigned char lba48 = 0;
1067
1068 if (blknr & 0x0000fffff0000000ULL) {
1069 /* more than 28 bits used, use 48bit mode */
1070 lba48 = 1;
1071 }
1072 #endif
1073
1074 /* Select device
1075 */
1076 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1077
1078 while (blkcnt-- > 0) {
1079 c = ide_wait(device, IDE_TIME_OUT);
1080
1081 if (c & ATA_STAT_BUSY) {
1082 printf("IDE read: device %d not ready\n", device);
1083 goto WR_OUT;
1084 }
1085 #ifdef CONFIG_LBA48
1086 if (lba48) {
1087 /* write high bits */
1088 ide_outb(device, ATA_SECT_CNT, 0);
1089 ide_outb(device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
1090 #ifdef CONFIG_SYS_64BIT_LBA
1091 ide_outb(device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
1092 ide_outb(device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
1093 #else
1094 ide_outb(device, ATA_LBA_MID, 0);
1095 ide_outb(device, ATA_LBA_HIGH, 0);
1096 #endif
1097 }
1098 #endif
1099 ide_outb(device, ATA_SECT_CNT, 1);
1100 ide_outb(device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
1101 ide_outb(device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
1102 ide_outb(device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
1103
1104 #ifdef CONFIG_LBA48
1105 if (lba48) {
1106 ide_outb(device, ATA_DEV_HD,
1107 ATA_LBA | ATA_DEVICE(device));
1108 ide_outb(device, ATA_COMMAND, ATA_CMD_WRITE_EXT);
1109
1110 } else
1111 #endif
1112 {
1113 ide_outb(device, ATA_DEV_HD, ATA_LBA |
1114 ATA_DEVICE(device) | ((blknr >> 24) & 0xF));
1115 ide_outb(device, ATA_COMMAND, ATA_CMD_WRITE);
1116 }
1117
1118 udelay(50);
1119
1120 /* can't take over 500 ms */
1121 c = ide_wait(device, IDE_TIME_OUT);
1122
1123 if ((c & (ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR)) !=
1124 ATA_STAT_DRQ) {
1125 printf("Error (no IRQ) dev %d blk " LBAF
1126 ": status %#02x\n", device, blknr, c);
1127 goto WR_OUT;
1128 }
1129
1130 ide_output_data(device, buffer, ATA_SECTORWORDS);
1131 c = ide_inb(device, ATA_STATUS); /* clear IRQ */
1132 ++n;
1133 ++blknr;
1134 buffer += ATA_BLOCKSIZE;
1135 }
1136 WR_OUT:
1137 return n;
1138 }
1139
1140 #if defined(CONFIG_OF_IDE_FIXUP)
1141 int ide_device_present(int dev)
1142 {
1143 if (dev >= CONFIG_SYS_IDE_MAXBUS)
1144 return 0;
1145 return ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN ? 0 : 1;
1146 }
1147 #endif
1148
1149 #ifdef CONFIG_BLK
1150 static const struct blk_ops ide_blk_ops = {
1151 .read = ide_read,
1152 .write = ide_write,
1153 };
1154
1155 U_BOOT_DRIVER(ide_blk) = {
1156 .name = "ide_blk",
1157 .id = UCLASS_BLK,
1158 .ops = &ide_blk_ops,
1159 };
1160 #else
1161 U_BOOT_LEGACY_BLK(ide) = {
1162 .if_typename = "ide",
1163 .if_type = IF_TYPE_IDE,
1164 .max_devs = CONFIG_SYS_IDE_MAXDEVICE,
1165 .desc = ide_dev_desc,
1166 };
1167 #endif