2 * (C) Copyright 2002-2004
3 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
5 * Copyright (C) 2003 Arabella Software Ltd.
6 * Yuli Barcohen <yuli@arabellasw.com>
7 * Modified to work with AMD flashes
11 * Modified to work with little-endian systems.
13 * See file CREDITS for list of people who contributed to this
16 * This program is free software; you can redistribute it and/or
17 * modify it under the terms of the GNU General Public License as
18 * published by the Free Software Foundation; either version 2 of
19 * the License, or (at your option) any later version.
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
32 * 01/20/2004 - combined variants of original driver.
33 * 01/22/2004 - Write performance enhancements for parallel chips (Tolunay)
34 * 01/23/2004 - Support for x8/x16 chips (Rune Raknerud)
35 * 01/27/2004 - Little endian support Ed Okerson
37 * Tested Architectures
38 * Port Width Chip Width # of banks Flash Chip Board
39 * 32 16 1 28F128J3 seranoa/eagle
40 * 64 16 1 28F128J3 seranoa/falcon
44 /* The DEBUG define must be before common to enable debugging */
48 #include <asm/processor.h>
49 #include <asm/byteorder.h>
50 #include <environment.h>
51 #ifdef CFG_FLASH_CFI_DRIVER
54 * This file implements a Common Flash Interface (CFI) driver for U-Boot.
55 * The width of the port and the width of the chips are determined at initialization.
56 * These widths are used to calculate the address for access CFI data structures.
57 * It has been tested on an Intel Strataflash implementation and AMD 29F016D.
60 * JEDEC Standard JESD68 - Common Flash Interface (CFI)
61 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
62 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
63 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
67 * Use Primary Extended Query table (PRI) and Alternate Algorithm Query
68 * Table (ALT) to determine if protection is available
70 * Add support for other command sets Use the PRI and ALT to determine command set
71 * Verify erase and program timeouts.
74 #ifndef CFG_FLASH_BANKS_LIST
75 #define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
78 #define FLASH_CMD_CFI 0x98
79 #define FLASH_CMD_READ_ID 0x90
80 #define FLASH_CMD_RESET 0xff
81 #define FLASH_CMD_BLOCK_ERASE 0x20
82 #define FLASH_CMD_ERASE_CONFIRM 0xD0
83 #define FLASH_CMD_WRITE 0x40
84 #define FLASH_CMD_PROTECT 0x60
85 #define FLASH_CMD_PROTECT_SET 0x01
86 #define FLASH_CMD_PROTECT_CLEAR 0xD0
87 #define FLASH_CMD_CLEAR_STATUS 0x50
88 #define FLASH_CMD_WRITE_TO_BUFFER 0xE8
89 #define FLASH_CMD_WRITE_BUFFER_CONFIRM 0xD0
91 #define FLASH_STATUS_DONE 0x80
92 #define FLASH_STATUS_ESS 0x40
93 #define FLASH_STATUS_ECLBS 0x20
94 #define FLASH_STATUS_PSLBS 0x10
95 #define FLASH_STATUS_VPENS 0x08
96 #define FLASH_STATUS_PSS 0x04
97 #define FLASH_STATUS_DPS 0x02
98 #define FLASH_STATUS_R 0x01
99 #define FLASH_STATUS_PROTECT 0x01
101 #define AMD_CMD_RESET 0xF0
102 #define AMD_CMD_WRITE 0xA0
103 #define AMD_CMD_ERASE_START 0x80
104 #define AMD_CMD_ERASE_SECTOR 0x30
105 #define AMD_CMD_UNLOCK_START 0xAA
106 #define AMD_CMD_UNLOCK_ACK 0x55
107 #define AMD_CMD_WRITE_TO_BUFFER 0x25
108 #define AMD_CMD_WRITE_BUFFER_CONFIRM 0x29
110 #define AMD_STATUS_TOGGLE 0x40
111 #define AMD_STATUS_ERROR 0x20
113 #define AMD_ADDR_ERASE_START ((info->portwidth == FLASH_CFI_8BIT) ? 0xAAA : 0x555)
114 #define AMD_ADDR_START ((info->portwidth == FLASH_CFI_8BIT) ? 0xAAA : 0x555)
115 #define AMD_ADDR_ACK ((info->portwidth == FLASH_CFI_8BIT) ? 0x555 : 0x2AA)
117 #define FLASH_OFFSET_CFI 0x55
118 #define FLASH_OFFSET_CFI_RESP 0x10
119 #define FLASH_OFFSET_PRIMARY_VENDOR 0x13
120 #define FLASH_OFFSET_WTOUT 0x1F
121 #define FLASH_OFFSET_WBTOUT 0x20
122 #define FLASH_OFFSET_ETOUT 0x21
123 #define FLASH_OFFSET_CETOUT 0x22
124 #define FLASH_OFFSET_WMAX_TOUT 0x23
125 #define FLASH_OFFSET_WBMAX_TOUT 0x24
126 #define FLASH_OFFSET_EMAX_TOUT 0x25
127 #define FLASH_OFFSET_CEMAX_TOUT 0x26
128 #define FLASH_OFFSET_SIZE 0x27
129 #define FLASH_OFFSET_INTERFACE 0x28
130 #define FLASH_OFFSET_BUFFER_SIZE 0x2A
131 #define FLASH_OFFSET_NUM_ERASE_REGIONS 0x2C
132 #define FLASH_OFFSET_ERASE_REGIONS 0x2D
133 #define FLASH_OFFSET_PROTECT 0x02
134 #define FLASH_OFFSET_USER_PROTECTION 0x85
135 #define FLASH_OFFSET_INTEL_PROTECTION 0x81
138 #define FLASH_MAN_CFI 0x01000000
140 #define CFI_CMDSET_NONE 0
141 #define CFI_CMDSET_INTEL_EXTENDED 1
142 #define CFI_CMDSET_AMD_STANDARD 2
143 #define CFI_CMDSET_INTEL_STANDARD 3
144 #define CFI_CMDSET_AMD_EXTENDED 4
145 #define CFI_CMDSET_MITSU_STANDARD 256
146 #define CFI_CMDSET_MITSU_EXTENDED 257
147 #define CFI_CMDSET_SST 258
150 #ifdef CFG_FLASH_CFI_AMD_RESET /* needed for STM_ID_29W320DB on UC100 */
151 # undef FLASH_CMD_RESET
152 # define FLASH_CMD_RESET AMD_CMD_RESET /* use AMD-Reset instead */
160 unsigned long long ll
;
164 volatile unsigned char *cp
;
165 volatile unsigned short *wp
;
166 volatile unsigned long *lp
;
167 volatile unsigned long long *llp
;
170 #define NUM_ERASE_REGIONS 4
172 /* use CFG_MAX_FLASH_BANKS_DETECT if defined */
173 #ifdef CFG_MAX_FLASH_BANKS_DETECT
174 static ulong bank_base
[CFG_MAX_FLASH_BANKS_DETECT
] = CFG_FLASH_BANKS_LIST
;
175 flash_info_t flash_info
[CFG_MAX_FLASH_BANKS_DETECT
]; /* FLASH chips info */
177 static ulong bank_base
[CFG_MAX_FLASH_BANKS
] = CFG_FLASH_BANKS_LIST
;
178 flash_info_t flash_info
[CFG_MAX_FLASH_BANKS
]; /* FLASH chips info */
182 * Check if chip width is defined. If not, start detecting with 8bit.
184 #ifndef CFG_FLASH_CFI_WIDTH
185 #define CFG_FLASH_CFI_WIDTH FLASH_CFI_8BIT
189 /*-----------------------------------------------------------------------
193 typedef unsigned long flash_sect_t
;
195 static void flash_add_byte (flash_info_t
* info
, cfiword_t
* cword
, uchar c
);
196 static void flash_make_cmd (flash_info_t
* info
, uchar cmd
, void *cmdbuf
);
197 static void flash_write_cmd (flash_info_t
* info
, flash_sect_t sect
, uint offset
, uchar cmd
);
198 static void flash_unlock_seq (flash_info_t
* info
, flash_sect_t sect
);
199 static int flash_isequal (flash_info_t
* info
, flash_sect_t sect
, uint offset
, uchar cmd
);
200 static int flash_isset (flash_info_t
* info
, flash_sect_t sect
, uint offset
, uchar cmd
);
201 static int flash_toggle (flash_info_t
* info
, flash_sect_t sect
, uint offset
, uchar cmd
);
202 static int flash_detect_cfi (flash_info_t
* info
);
203 static int flash_write_cfiword (flash_info_t
* info
, ulong dest
, cfiword_t cword
);
204 static int flash_full_status_check (flash_info_t
* info
, flash_sect_t sector
,
205 ulong tout
, char *prompt
);
206 ulong
flash_get_size (ulong base
, int banknum
);
207 #if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
208 static flash_info_t
*flash_get_info(ulong base
);
210 #ifdef CFG_FLASH_USE_BUFFER_WRITE
211 static int flash_write_cfibuffer (flash_info_t
* info
, ulong dest
, uchar
* cp
, int len
);
214 /*-----------------------------------------------------------------------
215 * create an address based on the offset and the port width
217 inline uchar
*flash_make_addr (flash_info_t
* info
, flash_sect_t sect
, uint offset
)
219 return ((uchar
*) (info
->start
[sect
] + (offset
* info
->portwidth
)));
223 /*-----------------------------------------------------------------------
226 void print_longlong (char *str
, unsigned long long data
)
231 cp
= (unsigned char *) &data
;
232 for (i
= 0; i
< 8; i
++)
233 sprintf (&str
[i
* 2], "%2.2x", *cp
++);
235 static void flash_printqry (flash_info_t
* info
, flash_sect_t sect
)
240 for (x
= 0; x
< 0x40; x
+= 16U / info
->portwidth
) {
242 flash_make_addr (info
, sect
,
243 x
+ FLASH_OFFSET_CFI_RESP
);
244 debug ("%p : ", cptr
.cp
);
245 for (y
= 0; y
< 16; y
++) {
246 debug ("%2.2x ", cptr
.cp
[y
]);
249 for (y
= 0; y
< 16; y
++) {
250 if (cptr
.cp
[y
] >= 0x20 && cptr
.cp
[y
] <= 0x7e) {
251 debug ("%c", cptr
.cp
[y
]);
262 /*-----------------------------------------------------------------------
263 * read a character at a port width address
265 inline uchar
flash_read_uchar (flash_info_t
* info
, uint offset
)
269 cp
= flash_make_addr (info
, 0, offset
);
270 #if defined(__LITTLE_ENDIAN)
273 return (cp
[info
->portwidth
- 1]);
277 /*-----------------------------------------------------------------------
278 * read a short word by swapping for ppc format.
280 ushort
flash_read_ushort (flash_info_t
* info
, flash_sect_t sect
, uint offset
)
288 addr
= flash_make_addr (info
, sect
, offset
);
291 debug ("ushort addr is at %p info->portwidth = %d\n", addr
,
293 for (x
= 0; x
< 2 * info
->portwidth
; x
++) {
294 debug ("addr[%x] = 0x%x\n", x
, addr
[x
]);
297 #if defined(__LITTLE_ENDIAN)
298 retval
= ((addr
[(info
->portwidth
)] << 8) | addr
[0]);
300 retval
= ((addr
[(2 * info
->portwidth
) - 1] << 8) |
301 addr
[info
->portwidth
- 1]);
304 debug ("retval = 0x%x\n", retval
);
308 /*-----------------------------------------------------------------------
309 * read a long word by picking the least significant byte of each maiximum
310 * port size word. Swap for ppc format.
312 ulong
flash_read_long (flash_info_t
* info
, flash_sect_t sect
, uint offset
)
320 addr
= flash_make_addr (info
, sect
, offset
);
323 debug ("long addr is at %p info->portwidth = %d\n", addr
,
325 for (x
= 0; x
< 4 * info
->portwidth
; x
++) {
326 debug ("addr[%x] = 0x%x\n", x
, addr
[x
]);
329 #if defined(__LITTLE_ENDIAN)
330 retval
= (addr
[0] << 16) | (addr
[(info
->portwidth
)] << 24) |
331 (addr
[(2 * info
->portwidth
)]) | (addr
[(3 * info
->portwidth
)] << 8);
333 retval
= (addr
[(2 * info
->portwidth
) - 1] << 24) |
334 (addr
[(info
->portwidth
) - 1] << 16) |
335 (addr
[(4 * info
->portwidth
) - 1] << 8) |
336 addr
[(3 * info
->portwidth
) - 1];
342 /*-----------------------------------------------------------------------
344 unsigned long flash_init (void)
346 unsigned long size
= 0;
349 /* Init: no FLASHes known */
350 for (i
= 0; i
< CFG_MAX_FLASH_BANKS
; ++i
) {
351 flash_info
[i
].flash_id
= FLASH_UNKNOWN
;
352 size
+= flash_info
[i
].size
= flash_get_size (bank_base
[i
], i
);
353 if (flash_info
[i
].flash_id
== FLASH_UNKNOWN
) {
354 #ifndef CFG_FLASH_QUIET_TEST
355 printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n",
356 i
, flash_info
[i
].size
, flash_info
[i
].size
<< 20);
357 #endif /* CFG_FLASH_QUIET_TEST */
359 #ifdef CFG_FLASH_PROTECTION
361 char *s
= getenv("unlock");
363 if (((s
= getenv("unlock")) != NULL
) && (strcmp(s
, "yes") == 0)) {
365 * Only the U-Boot image and it's environment is protected,
366 * all other sectors are unprotected (unlocked) if flash
367 * hardware protection is used (CFG_FLASH_PROTECTION) and
368 * the environment variable "unlock" is set to "yes".
370 flash_protect (FLAG_PROTECT_CLEAR
,
371 flash_info
[i
].start
[0],
372 flash_info
[i
].start
[0] + flash_info
[i
].size
- 1,
376 #endif /* CFG_FLASH_PROTECTION */
379 /* Monitor protection ON by default */
380 #if (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
381 flash_protect (FLAG_PROTECT_SET
,
383 CFG_MONITOR_BASE
+ monitor_flash_len
- 1,
384 flash_get_info(CFG_MONITOR_BASE
));
387 /* Environment protection ON by default */
388 #ifdef CFG_ENV_IS_IN_FLASH
389 flash_protect (FLAG_PROTECT_SET
,
391 CFG_ENV_ADDR
+ CFG_ENV_SECT_SIZE
- 1,
392 flash_get_info(CFG_ENV_ADDR
));
395 /* Redundant environment protection ON by default */
396 #ifdef CFG_ENV_ADDR_REDUND
397 flash_protect (FLAG_PROTECT_SET
,
399 CFG_ENV_ADDR_REDUND
+ CFG_ENV_SIZE_REDUND
- 1,
400 flash_get_info(CFG_ENV_ADDR_REDUND
));
405 /*-----------------------------------------------------------------------
407 #if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
408 static flash_info_t
*flash_get_info(ulong base
)
411 flash_info_t
* info
= 0;
413 for (i
= 0; i
< CFG_MAX_FLASH_BANKS
; i
++) {
414 info
= & flash_info
[i
];
415 if (info
->size
&& info
->start
[0] <= base
&&
416 base
<= info
->start
[0] + info
->size
- 1)
420 return i
== CFG_MAX_FLASH_BANKS
? 0 : info
;
424 /*-----------------------------------------------------------------------
426 int flash_erase (flash_info_t
* info
, int s_first
, int s_last
)
432 if (info
->flash_id
!= FLASH_MAN_CFI
) {
433 puts ("Can't erase unknown flash type - aborted\n");
436 if ((s_first
< 0) || (s_first
> s_last
)) {
437 puts ("- no sectors to erase\n");
442 for (sect
= s_first
; sect
<= s_last
; ++sect
) {
443 if (info
->protect
[sect
]) {
448 printf ("- Warning: %d protected sectors will not be erased!\n", prot
);
454 for (sect
= s_first
; sect
<= s_last
; sect
++) {
455 if (info
->protect
[sect
] == 0) { /* not protected */
456 switch (info
->vendor
) {
457 case CFI_CMDSET_INTEL_STANDARD
:
458 case CFI_CMDSET_INTEL_EXTENDED
:
459 flash_write_cmd (info
, sect
, 0, FLASH_CMD_CLEAR_STATUS
);
460 flash_write_cmd (info
, sect
, 0, FLASH_CMD_BLOCK_ERASE
);
461 flash_write_cmd (info
, sect
, 0, FLASH_CMD_ERASE_CONFIRM
);
463 case CFI_CMDSET_AMD_STANDARD
:
464 case CFI_CMDSET_AMD_EXTENDED
:
465 flash_unlock_seq (info
, sect
);
466 flash_write_cmd (info
, sect
, AMD_ADDR_ERASE_START
,
467 AMD_CMD_ERASE_START
);
468 flash_unlock_seq (info
, sect
);
469 flash_write_cmd (info
, sect
, 0, AMD_CMD_ERASE_SECTOR
);
472 debug ("Unkown flash vendor %d\n",
477 if (flash_full_status_check
478 (info
, sect
, info
->erase_blk_tout
, "erase")) {
488 /*-----------------------------------------------------------------------
490 void flash_print_info (flash_info_t
* info
)
494 if (info
->flash_id
!= FLASH_MAN_CFI
) {
495 puts ("missing or unknown FLASH type\n");
499 printf ("CFI conformant FLASH (%d x %d)",
500 (info
->portwidth
<< 3), (info
->chipwidth
<< 3));
501 printf (" Size: %ld MB in %d Sectors\n",
502 info
->size
>> 20, info
->sector_count
);
503 printf (" Erase timeout %ld ms, write timeout %ld ms, buffer write timeout %ld ms, buffer size %d\n",
504 info
->erase_blk_tout
,
506 info
->buffer_write_tout
,
509 puts (" Sector Start Addresses:");
510 for (i
= 0; i
< info
->sector_count
; ++i
) {
511 #ifdef CFG_FLASH_EMPTY_INFO
515 volatile unsigned long *flash
;
518 * Check if whole sector is erased
520 if (i
!= (info
->sector_count
- 1))
521 size
= info
->start
[i
+ 1] - info
->start
[i
];
523 size
= info
->start
[0] + info
->size
- info
->start
[i
];
525 flash
= (volatile unsigned long *) info
->start
[i
];
526 size
= size
>> 2; /* divide by 4 for longword access */
527 for (k
= 0; k
< size
; k
++) {
528 if (*flash
++ != 0xffffffff) {
536 /* print empty and read-only info */
537 printf (" %08lX%s%s",
540 info
->protect
[i
] ? "RO " : " ");
541 #else /* ! CFG_FLASH_EMPTY_INFO */
545 info
->start
[i
], info
->protect
[i
] ? " (RO)" : " ");
552 /*-----------------------------------------------------------------------
553 * Copy memory to flash, returns:
556 * 2 - Flash not erased
558 int write_buff (flash_info_t
* info
, uchar
* src
, ulong addr
, ulong cnt
)
566 #ifdef CFG_FLASH_USE_BUFFER_WRITE
569 /* get lower aligned address */
570 /* get lower aligned address */
571 wp
= (addr
& ~(info
->portwidth
- 1));
573 /* handle unaligned start */
574 if ((aln
= addr
- wp
) != 0) {
577 for (i
= 0; i
< aln
; ++i
, ++cp
)
578 flash_add_byte (info
, &cword
, (*(uchar
*) cp
));
580 for (; (i
< info
->portwidth
) && (cnt
> 0); i
++) {
581 flash_add_byte (info
, &cword
, *src
++);
585 for (; (cnt
== 0) && (i
< info
->portwidth
); ++i
, ++cp
)
586 flash_add_byte (info
, &cword
, (*(uchar
*) cp
));
587 if ((rc
= flash_write_cfiword (info
, wp
, cword
)) != 0)
592 /* handle the aligned part */
593 #ifdef CFG_FLASH_USE_BUFFER_WRITE
594 buffered_size
= (info
->portwidth
/ info
->chipwidth
);
595 buffered_size
*= info
->buffer_size
;
596 while (cnt
>= info
->portwidth
) {
597 /* prohibit buffer write when buffer_size is 1 */
598 if (info
->buffer_size
== 1) {
600 for (i
= 0; i
< info
->portwidth
; i
++)
601 flash_add_byte (info
, &cword
, *src
++);
602 if ((rc
= flash_write_cfiword (info
, wp
, cword
)) != 0)
604 wp
+= info
->portwidth
;
605 cnt
-= info
->portwidth
;
609 /* write buffer until next buffered_size aligned boundary */
610 i
= buffered_size
- (wp
% buffered_size
);
613 if ((rc
= flash_write_cfibuffer (info
, wp
, src
, i
)) != ERR_OK
)
615 i
-= i
& (info
->portwidth
- 1);
621 while (cnt
>= info
->portwidth
) {
623 for (i
= 0; i
< info
->portwidth
; i
++) {
624 flash_add_byte (info
, &cword
, *src
++);
626 if ((rc
= flash_write_cfiword (info
, wp
, cword
)) != 0)
628 wp
+= info
->portwidth
;
629 cnt
-= info
->portwidth
;
631 #endif /* CFG_FLASH_USE_BUFFER_WRITE */
637 * handle unaligned tail bytes
640 for (i
= 0, cp
= wp
; (i
< info
->portwidth
) && (cnt
> 0); ++i
, ++cp
) {
641 flash_add_byte (info
, &cword
, *src
++);
644 for (; i
< info
->portwidth
; ++i
, ++cp
) {
645 flash_add_byte (info
, &cword
, (*(uchar
*) cp
));
648 return flash_write_cfiword (info
, wp
, cword
);
651 /*-----------------------------------------------------------------------
653 #ifdef CFG_FLASH_PROTECTION
655 int flash_real_protect (flash_info_t
* info
, long sector
, int prot
)
659 flash_write_cmd (info
, sector
, 0, FLASH_CMD_CLEAR_STATUS
);
660 flash_write_cmd (info
, sector
, 0, FLASH_CMD_PROTECT
);
662 flash_write_cmd (info
, sector
, 0, FLASH_CMD_PROTECT_SET
);
664 flash_write_cmd (info
, sector
, 0, FLASH_CMD_PROTECT_CLEAR
);
667 flash_full_status_check (info
, sector
, info
->erase_blk_tout
,
668 prot
? "protect" : "unprotect")) == 0) {
670 info
->protect
[sector
] = prot
;
671 /* Intel's unprotect unprotects all locking */
675 for (i
= 0; i
< info
->sector_count
; i
++) {
676 if (info
->protect
[i
])
677 flash_real_protect (info
, i
, 1);
684 /*-----------------------------------------------------------------------
685 * flash_read_user_serial - read the OneTimeProgramming cells
687 void flash_read_user_serial (flash_info_t
* info
, void *buffer
, int offset
,
694 src
= flash_make_addr (info
, 0, FLASH_OFFSET_USER_PROTECTION
);
695 flash_write_cmd (info
, 0, 0, FLASH_CMD_READ_ID
);
696 memcpy (dst
, src
+ offset
, len
);
697 flash_write_cmd (info
, 0, 0, info
->cmd_reset
);
701 * flash_read_factory_serial - read the device Id from the protection area
703 void flash_read_factory_serial (flash_info_t
* info
, void *buffer
, int offset
,
708 src
= flash_make_addr (info
, 0, FLASH_OFFSET_INTEL_PROTECTION
);
709 flash_write_cmd (info
, 0, 0, FLASH_CMD_READ_ID
);
710 memcpy (buffer
, src
+ offset
, len
);
711 flash_write_cmd (info
, 0, 0, info
->cmd_reset
);
714 #endif /* CFG_FLASH_PROTECTION */
717 * flash_is_busy - check to see if the flash is busy
718 * This routine checks the status of the chip and returns true if the chip is busy
720 static int flash_is_busy (flash_info_t
* info
, flash_sect_t sect
)
724 switch (info
->vendor
) {
725 case CFI_CMDSET_INTEL_STANDARD
:
726 case CFI_CMDSET_INTEL_EXTENDED
:
727 retval
= !flash_isset (info
, sect
, 0, FLASH_STATUS_DONE
);
729 case CFI_CMDSET_AMD_STANDARD
:
730 case CFI_CMDSET_AMD_EXTENDED
:
731 retval
= flash_toggle (info
, sect
, 0, AMD_STATUS_TOGGLE
);
736 debug ("flash_is_busy: %d\n", retval
);
740 /*-----------------------------------------------------------------------
741 * wait for XSR.7 to be set. Time out with an error if it does not.
742 * This routine does not set the flash to read-array mode.
744 static int flash_status_check (flash_info_t
* info
, flash_sect_t sector
,
745 ulong tout
, char *prompt
)
749 /* Wait for command completion */
750 start
= get_timer (0);
751 while (flash_is_busy (info
, sector
)) {
752 if (get_timer (start
) > tout
) {
753 printf ("Flash %s timeout at address %lx data %lx\n",
754 prompt
, info
->start
[sector
],
755 flash_read_long (info
, sector
, 0));
756 flash_write_cmd (info
, sector
, 0, info
->cmd_reset
);
763 /*-----------------------------------------------------------------------
764 * Wait for XSR.7 to be set, if it times out print an error, otherwise do a full status check.
765 * This routine sets the flash to read-array mode.
767 static int flash_full_status_check (flash_info_t
* info
, flash_sect_t sector
,
768 ulong tout
, char *prompt
)
772 retcode
= flash_status_check (info
, sector
, tout
, prompt
);
773 switch (info
->vendor
) {
774 case CFI_CMDSET_INTEL_EXTENDED
:
775 case CFI_CMDSET_INTEL_STANDARD
:
776 if ((retcode
== ERR_OK
)
777 && !flash_isequal (info
, sector
, 0, FLASH_STATUS_DONE
)) {
779 printf ("Flash %s error at address %lx\n", prompt
,
780 info
->start
[sector
]);
781 if (flash_isset (info
, sector
, 0, FLASH_STATUS_ECLBS
| FLASH_STATUS_PSLBS
)) {
782 puts ("Command Sequence Error.\n");
783 } else if (flash_isset (info
, sector
, 0, FLASH_STATUS_ECLBS
)) {
784 puts ("Block Erase Error.\n");
785 retcode
= ERR_NOT_ERASED
;
786 } else if (flash_isset (info
, sector
, 0, FLASH_STATUS_PSLBS
)) {
787 puts ("Locking Error\n");
789 if (flash_isset (info
, sector
, 0, FLASH_STATUS_DPS
)) {
790 puts ("Block locked.\n");
791 retcode
= ERR_PROTECTED
;
793 if (flash_isset (info
, sector
, 0, FLASH_STATUS_VPENS
))
794 puts ("Vpp Low Error.\n");
796 flash_write_cmd (info
, sector
, 0, info
->cmd_reset
);
804 /*-----------------------------------------------------------------------
806 static void flash_add_byte (flash_info_t
* info
, cfiword_t
* cword
, uchar c
)
808 #if defined(__LITTLE_ENDIAN)
811 unsigned long long ll
;
814 switch (info
->portwidth
) {
818 case FLASH_CFI_16BIT
:
819 #if defined(__LITTLE_ENDIAN)
822 cword
->w
= (cword
->w
>> 8) | w
;
824 cword
->w
= (cword
->w
<< 8) | c
;
827 case FLASH_CFI_32BIT
:
828 #if defined(__LITTLE_ENDIAN)
831 cword
->l
= (cword
->l
>> 8) | l
;
833 cword
->l
= (cword
->l
<< 8) | c
;
836 case FLASH_CFI_64BIT
:
837 #if defined(__LITTLE_ENDIAN)
840 cword
->ll
= (cword
->ll
>> 8) | ll
;
842 cword
->ll
= (cword
->ll
<< 8) | c
;
849 /*-----------------------------------------------------------------------
850 * make a proper sized command based on the port and chip widths
852 static void flash_make_cmd (flash_info_t
* info
, uchar cmd
, void *cmdbuf
)
855 uchar
*cp
= (uchar
*) cmdbuf
;
857 #if defined(__LITTLE_ENDIAN)
858 for (i
= info
->portwidth
; i
> 0; i
--)
860 for (i
= 1; i
<= info
->portwidth
; i
++)
862 *cp
++ = (i
& (info
->chipwidth
- 1)) ? '\0' : cmd
;
866 * Write a proper sized command to the correct address
868 static void flash_write_cmd (flash_info_t
* info
, flash_sect_t sect
, uint offset
, uchar cmd
)
871 volatile cfiptr_t addr
;
874 addr
.cp
= flash_make_addr (info
, sect
, offset
);
875 flash_make_cmd (info
, cmd
, &cword
);
876 switch (info
->portwidth
) {
878 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr
.cp
, cmd
,
879 cword
.c
, info
->chipwidth
<< CFI_FLASH_SHIFT_WIDTH
);
881 #ifdef CONFIG_BLACKFIN
885 case FLASH_CFI_16BIT
:
886 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr
.wp
,
888 info
->chipwidth
<< CFI_FLASH_SHIFT_WIDTH
);
890 #ifdef CONFIG_BLACKFIN
894 case FLASH_CFI_32BIT
:
895 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr
.lp
,
897 info
->chipwidth
<< CFI_FLASH_SHIFT_WIDTH
);
899 #ifdef CONFIG_BLACKFIN
903 case FLASH_CFI_64BIT
:
908 print_longlong (str
, cword
.ll
);
910 debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
912 info
->chipwidth
<< CFI_FLASH_SHIFT_WIDTH
);
915 *addr
.llp
= cword
.ll
;
916 #ifdef CONFIG_BLACKFIN
923 static void flash_unlock_seq (flash_info_t
* info
, flash_sect_t sect
)
925 flash_write_cmd (info
, sect
, AMD_ADDR_START
, AMD_CMD_UNLOCK_START
);
926 flash_write_cmd (info
, sect
, AMD_ADDR_ACK
, AMD_CMD_UNLOCK_ACK
);
929 /*-----------------------------------------------------------------------
931 static int flash_isequal (flash_info_t
* info
, flash_sect_t sect
, uint offset
, uchar cmd
)
937 cptr
.cp
= flash_make_addr (info
, sect
, offset
);
938 flash_make_cmd (info
, cmd
, &cword
);
940 debug ("is= cmd %x(%c) addr %p ", cmd
, cmd
, cptr
.cp
);
941 switch (info
->portwidth
) {
943 debug ("is= %x %x\n", cptr
.cp
[0], cword
.c
);
944 retval
= (cptr
.cp
[0] == cword
.c
);
946 case FLASH_CFI_16BIT
:
947 debug ("is= %4.4x %4.4x\n", cptr
.wp
[0], cword
.w
);
948 retval
= (cptr
.wp
[0] == cword
.w
);
950 case FLASH_CFI_32BIT
:
951 debug ("is= %8.8lx %8.8lx\n", cptr
.lp
[0], cword
.l
);
952 retval
= (cptr
.lp
[0] == cword
.l
);
954 case FLASH_CFI_64BIT
:
960 print_longlong (str1
, cptr
.llp
[0]);
961 print_longlong (str2
, cword
.ll
);
962 debug ("is= %s %s\n", str1
, str2
);
965 retval
= (cptr
.llp
[0] == cword
.ll
);
974 /*-----------------------------------------------------------------------
976 static int flash_isset (flash_info_t
* info
, flash_sect_t sect
, uint offset
, uchar cmd
)
982 cptr
.cp
= flash_make_addr (info
, sect
, offset
);
983 flash_make_cmd (info
, cmd
, &cword
);
984 switch (info
->portwidth
) {
986 retval
= ((cptr
.cp
[0] & cword
.c
) == cword
.c
);
988 case FLASH_CFI_16BIT
:
989 retval
= ((cptr
.wp
[0] & cword
.w
) == cword
.w
);
991 case FLASH_CFI_32BIT
:
992 retval
= ((cptr
.lp
[0] & cword
.l
) == cword
.l
);
994 case FLASH_CFI_64BIT
:
995 retval
= ((cptr
.llp
[0] & cword
.ll
) == cword
.ll
);
1004 /*-----------------------------------------------------------------------
1006 static int flash_toggle (flash_info_t
* info
, flash_sect_t sect
, uint offset
, uchar cmd
)
1012 cptr
.cp
= flash_make_addr (info
, sect
, offset
);
1013 flash_make_cmd (info
, cmd
, &cword
);
1014 switch (info
->portwidth
) {
1015 case FLASH_CFI_8BIT
:
1016 retval
= ((cptr
.cp
[0] & cword
.c
) != (cptr
.cp
[0] & cword
.c
));
1018 case FLASH_CFI_16BIT
:
1019 retval
= ((cptr
.wp
[0] & cword
.w
) != (cptr
.wp
[0] & cword
.w
));
1021 case FLASH_CFI_32BIT
:
1022 retval
= ((cptr
.lp
[0] & cword
.l
) != (cptr
.lp
[0] & cword
.l
));
1024 case FLASH_CFI_64BIT
:
1025 retval
= ((cptr
.llp
[0] & cword
.ll
) !=
1026 (cptr
.llp
[0] & cword
.ll
));
1035 /*-----------------------------------------------------------------------
1036 * detect if flash is compatible with the Common Flash Interface (CFI)
1037 * http://www.jedec.org/download/search/jesd68.pdf
1040 static int flash_detect_cfi (flash_info_t
* info
)
1042 debug ("flash detect cfi\n");
1044 for (info
->portwidth
= CFG_FLASH_CFI_WIDTH
;
1045 info
->portwidth
<= FLASH_CFI_64BIT
; info
->portwidth
<<= 1) {
1046 for (info
->chipwidth
= FLASH_CFI_BY8
;
1047 info
->chipwidth
<= info
->portwidth
;
1048 info
->chipwidth
<<= 1) {
1049 flash_write_cmd (info
, 0, 0, info
->cmd_reset
);
1050 flash_write_cmd (info
, 0, FLASH_OFFSET_CFI
, FLASH_CMD_CFI
);
1051 if (flash_isequal (info
, 0, FLASH_OFFSET_CFI_RESP
, 'Q')
1052 && flash_isequal (info
, 0, FLASH_OFFSET_CFI_RESP
+ 1, 'R')
1053 && flash_isequal (info
, 0, FLASH_OFFSET_CFI_RESP
+ 2, 'Y')) {
1054 info
->interface
= flash_read_ushort (info
, 0, FLASH_OFFSET_INTERFACE
);
1055 debug ("device interface is %d\n",
1057 debug ("found port %d chip %d ",
1058 info
->portwidth
, info
->chipwidth
);
1059 debug ("port %d bits chip %d bits\n",
1060 info
->portwidth
<< CFI_FLASH_SHIFT_WIDTH
,
1061 info
->chipwidth
<< CFI_FLASH_SHIFT_WIDTH
);
1066 debug ("not found\n");
1071 * The following code cannot be run from FLASH!
1074 ulong
flash_get_size (ulong base
, int banknum
)
1076 flash_info_t
*info
= &flash_info
[banknum
];
1078 flash_sect_t sect_cnt
;
1079 unsigned long sector
;
1082 uchar num_erase_regions
;
1083 int erase_region_size
;
1084 int erase_region_count
;
1086 info
->start
[0] = base
;
1088 if (flash_detect_cfi (info
)) {
1089 info
->vendor
= flash_read_ushort (info
, 0, FLASH_OFFSET_PRIMARY_VENDOR
);
1091 flash_printqry (info
, 0);
1093 switch (info
->vendor
) {
1094 case CFI_CMDSET_INTEL_STANDARD
:
1095 case CFI_CMDSET_INTEL_EXTENDED
:
1097 info
->cmd_reset
= FLASH_CMD_RESET
;
1099 case CFI_CMDSET_AMD_STANDARD
:
1100 case CFI_CMDSET_AMD_EXTENDED
:
1101 info
->cmd_reset
= AMD_CMD_RESET
;
1105 debug ("manufacturer is %d\n", info
->vendor
);
1106 size_ratio
= info
->portwidth
/ info
->chipwidth
;
1107 /* if the chip is x8/x16 reduce the ratio by half */
1108 if ((info
->interface
== FLASH_CFI_X8X16
)
1109 && (info
->chipwidth
== FLASH_CFI_BY8
)) {
1112 num_erase_regions
= flash_read_uchar (info
, FLASH_OFFSET_NUM_ERASE_REGIONS
);
1113 debug ("size_ratio %d port %d bits chip %d bits\n",
1114 size_ratio
, info
->portwidth
<< CFI_FLASH_SHIFT_WIDTH
,
1115 info
->chipwidth
<< CFI_FLASH_SHIFT_WIDTH
);
1116 debug ("found %d erase regions\n", num_erase_regions
);
1119 for (i
= 0; i
< num_erase_regions
; i
++) {
1120 if (i
> NUM_ERASE_REGIONS
) {
1121 printf ("%d erase regions found, only %d used\n",
1122 num_erase_regions
, NUM_ERASE_REGIONS
);
1125 tmp
= flash_read_long (info
, 0,
1126 FLASH_OFFSET_ERASE_REGIONS
+
1129 (tmp
& 0xffff) ? ((tmp
& 0xffff) * 256) : 128;
1131 erase_region_count
= (tmp
& 0xffff) + 1;
1132 debug ("erase_region_count = %d erase_region_size = %d\n",
1133 erase_region_count
, erase_region_size
);
1134 for (j
= 0; j
< erase_region_count
; j
++) {
1135 info
->start
[sect_cnt
] = sector
;
1136 sector
+= (erase_region_size
* size_ratio
);
1139 * Only read protection status from supported devices (intel...)
1141 switch (info
->vendor
) {
1142 case CFI_CMDSET_INTEL_EXTENDED
:
1143 case CFI_CMDSET_INTEL_STANDARD
:
1144 info
->protect
[sect_cnt
] =
1145 flash_isset (info
, sect_cnt
,
1146 FLASH_OFFSET_PROTECT
,
1147 FLASH_STATUS_PROTECT
);
1150 info
->protect
[sect_cnt
] = 0; /* default: not protected */
1157 info
->sector_count
= sect_cnt
;
1158 /* multiply the size by the number of chips */
1159 info
->size
= (1 << flash_read_uchar (info
, FLASH_OFFSET_SIZE
)) * size_ratio
;
1160 info
->buffer_size
= (1 << flash_read_ushort (info
, 0, FLASH_OFFSET_BUFFER_SIZE
));
1161 tmp
= 1 << flash_read_uchar (info
, FLASH_OFFSET_ETOUT
);
1162 info
->erase_blk_tout
= (tmp
* (1 << flash_read_uchar (info
, FLASH_OFFSET_EMAX_TOUT
)));
1163 tmp
= 1 << flash_read_uchar (info
, FLASH_OFFSET_WBTOUT
);
1164 info
->buffer_write_tout
= (tmp
* (1 << flash_read_uchar (info
, FLASH_OFFSET_WBMAX_TOUT
)));
1165 tmp
= (1 << flash_read_uchar (info
, FLASH_OFFSET_WTOUT
)) *
1166 (1 << flash_read_uchar (info
, FLASH_OFFSET_WMAX_TOUT
));
1167 info
->write_tout
= tmp
/ 1000 + (tmp
% 1000 ? 1 : 0); /* round up when converting to ms */
1168 info
->flash_id
= FLASH_MAN_CFI
;
1169 if ((info
->interface
== FLASH_CFI_X8X16
) && (info
->chipwidth
== FLASH_CFI_BY8
)) {
1170 info
->portwidth
>>= 1; /* XXX - Need to test on x8/x16 in parallel. */
1174 flash_write_cmd (info
, 0, 0, info
->cmd_reset
);
1175 return (info
->size
);
1178 /* loop through the sectors from the highest address
1179 * when the passed address is greater or equal to the sector address
1182 static flash_sect_t
find_sector (flash_info_t
* info
, ulong addr
)
1184 flash_sect_t sector
;
1186 for (sector
= info
->sector_count
- 1; sector
>= 0; sector
--) {
1187 if (addr
>= info
->start
[sector
])
1193 /*-----------------------------------------------------------------------
1195 static int flash_write_cfiword (flash_info_t
* info
, ulong dest
,
1202 ctladdr
.cp
= flash_make_addr (info
, 0, 0);
1203 cptr
.cp
= (uchar
*) dest
;
1206 /* Check if Flash is (sufficiently) erased */
1207 switch (info
->portwidth
) {
1208 case FLASH_CFI_8BIT
:
1209 flag
= ((cptr
.cp
[0] & cword
.c
) == cword
.c
);
1211 case FLASH_CFI_16BIT
:
1212 flag
= ((cptr
.wp
[0] & cword
.w
) == cword
.w
);
1214 case FLASH_CFI_32BIT
:
1215 flag
= ((cptr
.lp
[0] & cword
.l
) == cword
.l
);
1217 case FLASH_CFI_64BIT
:
1218 flag
= ((cptr
.llp
[0] & cword
.ll
) == cword
.ll
);
1226 /* Disable interrupts which might cause a timeout here */
1227 flag
= disable_interrupts ();
1229 switch (info
->vendor
) {
1230 case CFI_CMDSET_INTEL_EXTENDED
:
1231 case CFI_CMDSET_INTEL_STANDARD
:
1232 flash_write_cmd (info
, 0, 0, FLASH_CMD_CLEAR_STATUS
);
1233 flash_write_cmd (info
, 0, 0, FLASH_CMD_WRITE
);
1235 case CFI_CMDSET_AMD_EXTENDED
:
1236 case CFI_CMDSET_AMD_STANDARD
:
1237 flash_unlock_seq (info
, 0);
1238 flash_write_cmd (info
, 0, AMD_ADDR_START
, AMD_CMD_WRITE
);
1242 switch (info
->portwidth
) {
1243 case FLASH_CFI_8BIT
:
1244 cptr
.cp
[0] = cword
.c
;
1246 case FLASH_CFI_16BIT
:
1247 cptr
.wp
[0] = cword
.w
;
1249 case FLASH_CFI_32BIT
:
1250 cptr
.lp
[0] = cword
.l
;
1252 case FLASH_CFI_64BIT
:
1253 cptr
.llp
[0] = cword
.ll
;
1257 /* re-enable interrupts if necessary */
1259 enable_interrupts ();
1261 return flash_full_status_check (info
, find_sector (info
, dest
),
1262 info
->write_tout
, "write");
1265 #ifdef CFG_FLASH_USE_BUFFER_WRITE
1267 static int flash_write_cfibuffer (flash_info_t
* info
, ulong dest
, uchar
* cp
,
1270 flash_sect_t sector
;
1273 volatile cfiptr_t src
;
1274 volatile cfiptr_t dst
;
1276 switch (info
->vendor
) {
1277 case CFI_CMDSET_INTEL_STANDARD
:
1278 case CFI_CMDSET_INTEL_EXTENDED
:
1280 dst
.cp
= (uchar
*) dest
;
1281 sector
= find_sector (info
, dest
);
1282 flash_write_cmd (info
, sector
, 0, FLASH_CMD_CLEAR_STATUS
);
1283 flash_write_cmd (info
, sector
, 0, FLASH_CMD_WRITE_TO_BUFFER
);
1284 if ((retcode
= flash_status_check (info
, sector
, info
->buffer_write_tout
,
1285 "write to buffer")) == ERR_OK
) {
1286 /* reduce the number of loops by the width of the port */
1287 switch (info
->portwidth
) {
1288 case FLASH_CFI_8BIT
:
1291 case FLASH_CFI_16BIT
:
1294 case FLASH_CFI_32BIT
:
1297 case FLASH_CFI_64BIT
:
1304 flash_write_cmd (info
, sector
, 0, (uchar
) cnt
- 1);
1306 switch (info
->portwidth
) {
1307 case FLASH_CFI_8BIT
:
1308 *dst
.cp
++ = *src
.cp
++;
1310 case FLASH_CFI_16BIT
:
1311 *dst
.wp
++ = *src
.wp
++;
1313 case FLASH_CFI_32BIT
:
1314 *dst
.lp
++ = *src
.lp
++;
1316 case FLASH_CFI_64BIT
:
1317 *dst
.llp
++ = *src
.llp
++;
1324 flash_write_cmd (info
, sector
, 0,
1325 FLASH_CMD_WRITE_BUFFER_CONFIRM
);
1326 retcode
= flash_full_status_check (info
, sector
,
1327 info
->buffer_write_tout
,
1332 case CFI_CMDSET_AMD_STANDARD
:
1333 case CFI_CMDSET_AMD_EXTENDED
:
1335 dst
.cp
= (uchar
*) dest
;
1336 sector
= find_sector (info
, dest
);
1338 flash_unlock_seq(info
,0);
1339 flash_write_cmd (info
, sector
, 0, AMD_CMD_WRITE_TO_BUFFER
);
1341 switch (info
->portwidth
) {
1342 case FLASH_CFI_8BIT
:
1344 flash_write_cmd (info
, sector
, 0, (uchar
) cnt
- 1);
1345 while (cnt
-- > 0) *dst
.cp
++ = *src
.cp
++;
1347 case FLASH_CFI_16BIT
:
1349 flash_write_cmd (info
, sector
, 0, (uchar
) cnt
- 1);
1350 while (cnt
-- > 0) *dst
.wp
++ = *src
.wp
++;
1352 case FLASH_CFI_32BIT
:
1354 flash_write_cmd (info
, sector
, 0, (uchar
) cnt
- 1);
1355 while (cnt
-- > 0) *dst
.lp
++ = *src
.lp
++;
1357 case FLASH_CFI_64BIT
:
1359 flash_write_cmd (info
, sector
, 0, (uchar
) cnt
- 1);
1360 while (cnt
-- > 0) *dst
.llp
++ = *src
.llp
++;
1366 flash_write_cmd (info
, sector
, 0, AMD_CMD_WRITE_BUFFER_CONFIRM
);
1367 retcode
= flash_full_status_check (info
, sector
, info
->buffer_write_tout
,
1372 debug ("Unknown Command Set\n");
1376 #endif /* CFG_FLASH_USE_BUFFER_WRITE */
1377 #endif /* CFG_FLASH_CFI */