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[people/ms/u-boot.git] / drivers / cfi_flash.c
1 /*
2 * (C) Copyright 2002-2004
3 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
4 *
5 * Copyright (C) 2003 Arabella Software Ltd.
6 * Yuli Barcohen <yuli@arabellasw.com>
7 * Modified to work with AMD flashes
8 *
9 * Copyright (C) 2004
10 * Ed Okerson
11 * Modified to work with little-endian systems.
12 *
13 * See file CREDITS for list of people who contributed to this
14 * project.
15 *
16 * This program is free software; you can redistribute it and/or
17 * modify it under the terms of the GNU General Public License as
18 * published by the Free Software Foundation; either version 2 of
19 * the License, or (at your option) any later version.
20 *
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
25 *
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29 * MA 02111-1307 USA
30 *
31 * History
32 * 01/20/2004 - combined variants of original driver.
33 * 01/22/2004 - Write performance enhancements for parallel chips (Tolunay)
34 * 01/23/2004 - Support for x8/x16 chips (Rune Raknerud)
35 * 01/27/2004 - Little endian support Ed Okerson
36 *
37 * Tested Architectures
38 * Port Width Chip Width # of banks Flash Chip Board
39 * 32 16 1 28F128J3 seranoa/eagle
40 * 64 16 1 28F128J3 seranoa/falcon
41 *
42 */
43
44 /* The DEBUG define must be before common to enable debugging */
45 /* #define DEBUG */
46
47 #include <common.h>
48 #include <asm/processor.h>
49 #include <asm/byteorder.h>
50 #include <environment.h>
51 #ifdef CFG_FLASH_CFI_DRIVER
52
53 /*
54 * This file implements a Common Flash Interface (CFI) driver for U-Boot.
55 * The width of the port and the width of the chips are determined at initialization.
56 * These widths are used to calculate the address for access CFI data structures.
57 * It has been tested on an Intel Strataflash implementation and AMD 29F016D.
58 *
59 * References
60 * JEDEC Standard JESD68 - Common Flash Interface (CFI)
61 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
62 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
63 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
64 *
65 * TODO
66 *
67 * Use Primary Extended Query table (PRI) and Alternate Algorithm Query
68 * Table (ALT) to determine if protection is available
69 *
70 * Add support for other command sets Use the PRI and ALT to determine command set
71 * Verify erase and program timeouts.
72 */
73
74 #ifndef CFG_FLASH_BANKS_LIST
75 #define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
76 #endif
77
78 #define FLASH_CMD_CFI 0x98
79 #define FLASH_CMD_READ_ID 0x90
80 #define FLASH_CMD_RESET 0xff
81 #define FLASH_CMD_BLOCK_ERASE 0x20
82 #define FLASH_CMD_ERASE_CONFIRM 0xD0
83 #define FLASH_CMD_WRITE 0x40
84 #define FLASH_CMD_PROTECT 0x60
85 #define FLASH_CMD_PROTECT_SET 0x01
86 #define FLASH_CMD_PROTECT_CLEAR 0xD0
87 #define FLASH_CMD_CLEAR_STATUS 0x50
88 #define FLASH_CMD_WRITE_TO_BUFFER 0xE8
89 #define FLASH_CMD_WRITE_BUFFER_CONFIRM 0xD0
90
91 #define FLASH_STATUS_DONE 0x80
92 #define FLASH_STATUS_ESS 0x40
93 #define FLASH_STATUS_ECLBS 0x20
94 #define FLASH_STATUS_PSLBS 0x10
95 #define FLASH_STATUS_VPENS 0x08
96 #define FLASH_STATUS_PSS 0x04
97 #define FLASH_STATUS_DPS 0x02
98 #define FLASH_STATUS_R 0x01
99 #define FLASH_STATUS_PROTECT 0x01
100
101 #define AMD_CMD_RESET 0xF0
102 #define AMD_CMD_WRITE 0xA0
103 #define AMD_CMD_ERASE_START 0x80
104 #define AMD_CMD_ERASE_SECTOR 0x30
105 #define AMD_CMD_UNLOCK_START 0xAA
106 #define AMD_CMD_UNLOCK_ACK 0x55
107 #define AMD_CMD_WRITE_TO_BUFFER 0x25
108 #define AMD_CMD_WRITE_BUFFER_CONFIRM 0x29
109
110 #define AMD_STATUS_TOGGLE 0x40
111 #define AMD_STATUS_ERROR 0x20
112
113 #define AMD_ADDR_ERASE_START ((info->portwidth == FLASH_CFI_8BIT) ? 0xAAA : 0x555)
114 #define AMD_ADDR_START ((info->portwidth == FLASH_CFI_8BIT) ? 0xAAA : 0x555)
115 #define AMD_ADDR_ACK ((info->portwidth == FLASH_CFI_8BIT) ? 0x555 : 0x2AA)
116
117 #define FLASH_OFFSET_CFI 0x55
118 #define FLASH_OFFSET_CFI_RESP 0x10
119 #define FLASH_OFFSET_PRIMARY_VENDOR 0x13
120 #define FLASH_OFFSET_WTOUT 0x1F
121 #define FLASH_OFFSET_WBTOUT 0x20
122 #define FLASH_OFFSET_ETOUT 0x21
123 #define FLASH_OFFSET_CETOUT 0x22
124 #define FLASH_OFFSET_WMAX_TOUT 0x23
125 #define FLASH_OFFSET_WBMAX_TOUT 0x24
126 #define FLASH_OFFSET_EMAX_TOUT 0x25
127 #define FLASH_OFFSET_CEMAX_TOUT 0x26
128 #define FLASH_OFFSET_SIZE 0x27
129 #define FLASH_OFFSET_INTERFACE 0x28
130 #define FLASH_OFFSET_BUFFER_SIZE 0x2A
131 #define FLASH_OFFSET_NUM_ERASE_REGIONS 0x2C
132 #define FLASH_OFFSET_ERASE_REGIONS 0x2D
133 #define FLASH_OFFSET_PROTECT 0x02
134 #define FLASH_OFFSET_USER_PROTECTION 0x85
135 #define FLASH_OFFSET_INTEL_PROTECTION 0x81
136
137
138 #define FLASH_MAN_CFI 0x01000000
139
140 #define CFI_CMDSET_NONE 0
141 #define CFI_CMDSET_INTEL_EXTENDED 1
142 #define CFI_CMDSET_AMD_STANDARD 2
143 #define CFI_CMDSET_INTEL_STANDARD 3
144 #define CFI_CMDSET_AMD_EXTENDED 4
145 #define CFI_CMDSET_MITSU_STANDARD 256
146 #define CFI_CMDSET_MITSU_EXTENDED 257
147 #define CFI_CMDSET_SST 258
148
149
150 #ifdef CFG_FLASH_CFI_AMD_RESET /* needed for STM_ID_29W320DB on UC100 */
151 # undef FLASH_CMD_RESET
152 # define FLASH_CMD_RESET AMD_CMD_RESET /* use AMD-Reset instead */
153 #endif
154
155
156 typedef union {
157 unsigned char c;
158 unsigned short w;
159 unsigned long l;
160 unsigned long long ll;
161 } cfiword_t;
162
163 typedef union {
164 volatile unsigned char *cp;
165 volatile unsigned short *wp;
166 volatile unsigned long *lp;
167 volatile unsigned long long *llp;
168 } cfiptr_t;
169
170 #define NUM_ERASE_REGIONS 4
171
172 /* use CFG_MAX_FLASH_BANKS_DETECT if defined */
173 #ifdef CFG_MAX_FLASH_BANKS_DETECT
174 static ulong bank_base[CFG_MAX_FLASH_BANKS_DETECT] = CFG_FLASH_BANKS_LIST;
175 flash_info_t flash_info[CFG_MAX_FLASH_BANKS_DETECT]; /* FLASH chips info */
176 #else
177 static ulong bank_base[CFG_MAX_FLASH_BANKS] = CFG_FLASH_BANKS_LIST;
178 flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* FLASH chips info */
179 #endif
180
181 /*
182 * Check if chip width is defined. If not, start detecting with 8bit.
183 */
184 #ifndef CFG_FLASH_CFI_WIDTH
185 #define CFG_FLASH_CFI_WIDTH FLASH_CFI_8BIT
186 #endif
187
188
189 /*-----------------------------------------------------------------------
190 * Functions
191 */
192
193 typedef unsigned long flash_sect_t;
194
195 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c);
196 static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf);
197 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
198 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect);
199 static int flash_isequal (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
200 static int flash_isset (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
201 static int flash_toggle (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
202 static int flash_detect_cfi (flash_info_t * info);
203 static int flash_write_cfiword (flash_info_t * info, ulong dest, cfiword_t cword);
204 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
205 ulong tout, char *prompt);
206 ulong flash_get_size (ulong base, int banknum);
207 #if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
208 static flash_info_t *flash_get_info(ulong base);
209 #endif
210 #ifdef CFG_FLASH_USE_BUFFER_WRITE
211 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp, int len);
212 #endif
213
214 /*-----------------------------------------------------------------------
215 * create an address based on the offset and the port width
216 */
217 inline uchar *flash_make_addr (flash_info_t * info, flash_sect_t sect, uint offset)
218 {
219 return ((uchar *) (info->start[sect] + (offset * info->portwidth)));
220 }
221
222 #ifdef DEBUG
223 /*-----------------------------------------------------------------------
224 * Debug support
225 */
226 void print_longlong (char *str, unsigned long long data)
227 {
228 int i;
229 char *cp;
230
231 cp = (unsigned char *) &data;
232 for (i = 0; i < 8; i++)
233 sprintf (&str[i * 2], "%2.2x", *cp++);
234 }
235 static void flash_printqry (flash_info_t * info, flash_sect_t sect)
236 {
237 cfiptr_t cptr;
238 int x, y;
239
240 for (x = 0; x < 0x40; x += 16U / info->portwidth) {
241 cptr.cp =
242 flash_make_addr (info, sect,
243 x + FLASH_OFFSET_CFI_RESP);
244 debug ("%p : ", cptr.cp);
245 for (y = 0; y < 16; y++) {
246 debug ("%2.2x ", cptr.cp[y]);
247 }
248 debug (" ");
249 for (y = 0; y < 16; y++) {
250 if (cptr.cp[y] >= 0x20 && cptr.cp[y] <= 0x7e) {
251 debug ("%c", cptr.cp[y]);
252 } else {
253 debug (".");
254 }
255 }
256 debug ("\n");
257 }
258 }
259 #endif
260
261
262 /*-----------------------------------------------------------------------
263 * read a character at a port width address
264 */
265 inline uchar flash_read_uchar (flash_info_t * info, uint offset)
266 {
267 uchar *cp;
268
269 cp = flash_make_addr (info, 0, offset);
270 #if defined(__LITTLE_ENDIAN)
271 return (cp[0]);
272 #else
273 return (cp[info->portwidth - 1]);
274 #endif
275 }
276
277 /*-----------------------------------------------------------------------
278 * read a short word by swapping for ppc format.
279 */
280 ushort flash_read_ushort (flash_info_t * info, flash_sect_t sect, uint offset)
281 {
282 uchar *addr;
283 ushort retval;
284
285 #ifdef DEBUG
286 int x;
287 #endif
288 addr = flash_make_addr (info, sect, offset);
289
290 #ifdef DEBUG
291 debug ("ushort addr is at %p info->portwidth = %d\n", addr,
292 info->portwidth);
293 for (x = 0; x < 2 * info->portwidth; x++) {
294 debug ("addr[%x] = 0x%x\n", x, addr[x]);
295 }
296 #endif
297 #if defined(__LITTLE_ENDIAN)
298 retval = ((addr[(info->portwidth)] << 8) | addr[0]);
299 #else
300 retval = ((addr[(2 * info->portwidth) - 1] << 8) |
301 addr[info->portwidth - 1]);
302 #endif
303
304 debug ("retval = 0x%x\n", retval);
305 return retval;
306 }
307
308 /*-----------------------------------------------------------------------
309 * read a long word by picking the least significant byte of each maiximum
310 * port size word. Swap for ppc format.
311 */
312 ulong flash_read_long (flash_info_t * info, flash_sect_t sect, uint offset)
313 {
314 uchar *addr;
315 ulong retval;
316
317 #ifdef DEBUG
318 int x;
319 #endif
320 addr = flash_make_addr (info, sect, offset);
321
322 #ifdef DEBUG
323 debug ("long addr is at %p info->portwidth = %d\n", addr,
324 info->portwidth);
325 for (x = 0; x < 4 * info->portwidth; x++) {
326 debug ("addr[%x] = 0x%x\n", x, addr[x]);
327 }
328 #endif
329 #if defined(__LITTLE_ENDIAN)
330 retval = (addr[0] << 16) | (addr[(info->portwidth)] << 24) |
331 (addr[(2 * info->portwidth)]) | (addr[(3 * info->portwidth)] << 8);
332 #else
333 retval = (addr[(2 * info->portwidth) - 1] << 24) |
334 (addr[(info->portwidth) - 1] << 16) |
335 (addr[(4 * info->portwidth) - 1] << 8) |
336 addr[(3 * info->portwidth) - 1];
337 #endif
338 return retval;
339 }
340
341
342 /*-----------------------------------------------------------------------
343 */
344 unsigned long flash_init (void)
345 {
346 unsigned long size = 0;
347 int i;
348
349 /* Init: no FLASHes known */
350 for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
351 flash_info[i].flash_id = FLASH_UNKNOWN;
352 size += flash_info[i].size = flash_get_size (bank_base[i], i);
353 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
354 #ifndef CFG_FLASH_QUIET_TEST
355 printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n",
356 i, flash_info[i].size, flash_info[i].size << 20);
357 #endif /* CFG_FLASH_QUIET_TEST */
358 }
359 #ifdef CFG_FLASH_PROTECTION
360 else {
361 char *s = getenv("unlock");
362
363 if (((s = getenv("unlock")) != NULL) && (strcmp(s, "yes") == 0)) {
364 /*
365 * Only the U-Boot image and it's environment is protected,
366 * all other sectors are unprotected (unlocked) if flash
367 * hardware protection is used (CFG_FLASH_PROTECTION) and
368 * the environment variable "unlock" is set to "yes".
369 */
370 flash_protect (FLAG_PROTECT_CLEAR,
371 flash_info[i].start[0],
372 flash_info[i].start[0] + flash_info[i].size - 1,
373 &flash_info[i]);
374 }
375 }
376 #endif /* CFG_FLASH_PROTECTION */
377 }
378
379 /* Monitor protection ON by default */
380 #if (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
381 flash_protect (FLAG_PROTECT_SET,
382 CFG_MONITOR_BASE,
383 CFG_MONITOR_BASE + monitor_flash_len - 1,
384 flash_get_info(CFG_MONITOR_BASE));
385 #endif
386
387 /* Environment protection ON by default */
388 #ifdef CFG_ENV_IS_IN_FLASH
389 flash_protect (FLAG_PROTECT_SET,
390 CFG_ENV_ADDR,
391 CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1,
392 flash_get_info(CFG_ENV_ADDR));
393 #endif
394
395 /* Redundant environment protection ON by default */
396 #ifdef CFG_ENV_ADDR_REDUND
397 flash_protect (FLAG_PROTECT_SET,
398 CFG_ENV_ADDR_REDUND,
399 CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1,
400 flash_get_info(CFG_ENV_ADDR_REDUND));
401 #endif
402 return (size);
403 }
404
405 /*-----------------------------------------------------------------------
406 */
407 #if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
408 static flash_info_t *flash_get_info(ulong base)
409 {
410 int i;
411 flash_info_t * info = 0;
412
413 for (i = 0; i < CFG_MAX_FLASH_BANKS; i ++) {
414 info = & flash_info[i];
415 if (info->size && info->start[0] <= base &&
416 base <= info->start[0] + info->size - 1)
417 break;
418 }
419
420 return i == CFG_MAX_FLASH_BANKS ? 0 : info;
421 }
422 #endif
423
424 /*-----------------------------------------------------------------------
425 */
426 int flash_erase (flash_info_t * info, int s_first, int s_last)
427 {
428 int rcode = 0;
429 int prot;
430 flash_sect_t sect;
431
432 if (info->flash_id != FLASH_MAN_CFI) {
433 puts ("Can't erase unknown flash type - aborted\n");
434 return 1;
435 }
436 if ((s_first < 0) || (s_first > s_last)) {
437 puts ("- no sectors to erase\n");
438 return 1;
439 }
440
441 prot = 0;
442 for (sect = s_first; sect <= s_last; ++sect) {
443 if (info->protect[sect]) {
444 prot++;
445 }
446 }
447 if (prot) {
448 printf ("- Warning: %d protected sectors will not be erased!\n", prot);
449 } else {
450 putc ('\n');
451 }
452
453
454 for (sect = s_first; sect <= s_last; sect++) {
455 if (info->protect[sect] == 0) { /* not protected */
456 switch (info->vendor) {
457 case CFI_CMDSET_INTEL_STANDARD:
458 case CFI_CMDSET_INTEL_EXTENDED:
459 flash_write_cmd (info, sect, 0, FLASH_CMD_CLEAR_STATUS);
460 flash_write_cmd (info, sect, 0, FLASH_CMD_BLOCK_ERASE);
461 flash_write_cmd (info, sect, 0, FLASH_CMD_ERASE_CONFIRM);
462 break;
463 case CFI_CMDSET_AMD_STANDARD:
464 case CFI_CMDSET_AMD_EXTENDED:
465 flash_unlock_seq (info, sect);
466 flash_write_cmd (info, sect, AMD_ADDR_ERASE_START,
467 AMD_CMD_ERASE_START);
468 flash_unlock_seq (info, sect);
469 flash_write_cmd (info, sect, 0, AMD_CMD_ERASE_SECTOR);
470 break;
471 default:
472 debug ("Unkown flash vendor %d\n",
473 info->vendor);
474 break;
475 }
476
477 if (flash_full_status_check
478 (info, sect, info->erase_blk_tout, "erase")) {
479 rcode = 1;
480 } else
481 putc ('.');
482 }
483 }
484 puts (" done\n");
485 return rcode;
486 }
487
488 /*-----------------------------------------------------------------------
489 */
490 void flash_print_info (flash_info_t * info)
491 {
492 int i;
493
494 if (info->flash_id != FLASH_MAN_CFI) {
495 puts ("missing or unknown FLASH type\n");
496 return;
497 }
498
499 printf ("CFI conformant FLASH (%d x %d)",
500 (info->portwidth << 3), (info->chipwidth << 3));
501 printf (" Size: %ld MB in %d Sectors\n",
502 info->size >> 20, info->sector_count);
503 printf (" Erase timeout %ld ms, write timeout %ld ms, buffer write timeout %ld ms, buffer size %d\n",
504 info->erase_blk_tout,
505 info->write_tout,
506 info->buffer_write_tout,
507 info->buffer_size);
508
509 puts (" Sector Start Addresses:");
510 for (i = 0; i < info->sector_count; ++i) {
511 #ifdef CFG_FLASH_EMPTY_INFO
512 int k;
513 int size;
514 int erased;
515 volatile unsigned long *flash;
516
517 /*
518 * Check if whole sector is erased
519 */
520 if (i != (info->sector_count - 1))
521 size = info->start[i + 1] - info->start[i];
522 else
523 size = info->start[0] + info->size - info->start[i];
524 erased = 1;
525 flash = (volatile unsigned long *) info->start[i];
526 size = size >> 2; /* divide by 4 for longword access */
527 for (k = 0; k < size; k++) {
528 if (*flash++ != 0xffffffff) {
529 erased = 0;
530 break;
531 }
532 }
533
534 if ((i % 5) == 0)
535 printf ("\n");
536 /* print empty and read-only info */
537 printf (" %08lX%s%s",
538 info->start[i],
539 erased ? " E" : " ",
540 info->protect[i] ? "RO " : " ");
541 #else /* ! CFG_FLASH_EMPTY_INFO */
542 if ((i % 5) == 0)
543 printf ("\n ");
544 printf (" %08lX%s",
545 info->start[i], info->protect[i] ? " (RO)" : " ");
546 #endif
547 }
548 putc ('\n');
549 return;
550 }
551
552 /*-----------------------------------------------------------------------
553 * Copy memory to flash, returns:
554 * 0 - OK
555 * 1 - write timeout
556 * 2 - Flash not erased
557 */
558 int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
559 {
560 ulong wp;
561 ulong cp;
562 int aln;
563 cfiword_t cword;
564 int i, rc;
565
566 #ifdef CFG_FLASH_USE_BUFFER_WRITE
567 int buffered_size;
568 #endif
569 /* get lower aligned address */
570 /* get lower aligned address */
571 wp = (addr & ~(info->portwidth - 1));
572
573 /* handle unaligned start */
574 if ((aln = addr - wp) != 0) {
575 cword.l = 0;
576 cp = wp;
577 for (i = 0; i < aln; ++i, ++cp)
578 flash_add_byte (info, &cword, (*(uchar *) cp));
579
580 for (; (i < info->portwidth) && (cnt > 0); i++) {
581 flash_add_byte (info, &cword, *src++);
582 cnt--;
583 cp++;
584 }
585 for (; (cnt == 0) && (i < info->portwidth); ++i, ++cp)
586 flash_add_byte (info, &cword, (*(uchar *) cp));
587 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
588 return rc;
589 wp = cp;
590 }
591
592 /* handle the aligned part */
593 #ifdef CFG_FLASH_USE_BUFFER_WRITE
594 buffered_size = (info->portwidth / info->chipwidth);
595 buffered_size *= info->buffer_size;
596 while (cnt >= info->portwidth) {
597 /* prohibit buffer write when buffer_size is 1 */
598 if (info->buffer_size == 1) {
599 cword.l = 0;
600 for (i = 0; i < info->portwidth; i++)
601 flash_add_byte (info, &cword, *src++);
602 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
603 return rc;
604 wp += info->portwidth;
605 cnt -= info->portwidth;
606 continue;
607 }
608
609 /* write buffer until next buffered_size aligned boundary */
610 i = buffered_size - (wp % buffered_size);
611 if (i > cnt)
612 i = cnt;
613 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
614 return rc;
615 i -= i & (info->portwidth - 1);
616 wp += i;
617 src += i;
618 cnt -= i;
619 }
620 #else
621 while (cnt >= info->portwidth) {
622 cword.l = 0;
623 for (i = 0; i < info->portwidth; i++) {
624 flash_add_byte (info, &cword, *src++);
625 }
626 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
627 return rc;
628 wp += info->portwidth;
629 cnt -= info->portwidth;
630 }
631 #endif /* CFG_FLASH_USE_BUFFER_WRITE */
632 if (cnt == 0) {
633 return (0);
634 }
635
636 /*
637 * handle unaligned tail bytes
638 */
639 cword.l = 0;
640 for (i = 0, cp = wp; (i < info->portwidth) && (cnt > 0); ++i, ++cp) {
641 flash_add_byte (info, &cword, *src++);
642 --cnt;
643 }
644 for (; i < info->portwidth; ++i, ++cp) {
645 flash_add_byte (info, &cword, (*(uchar *) cp));
646 }
647
648 return flash_write_cfiword (info, wp, cword);
649 }
650
651 /*-----------------------------------------------------------------------
652 */
653 #ifdef CFG_FLASH_PROTECTION
654
655 int flash_real_protect (flash_info_t * info, long sector, int prot)
656 {
657 int retcode = 0;
658
659 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
660 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
661 if (prot)
662 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
663 else
664 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
665
666 if ((retcode =
667 flash_full_status_check (info, sector, info->erase_blk_tout,
668 prot ? "protect" : "unprotect")) == 0) {
669
670 info->protect[sector] = prot;
671 /* Intel's unprotect unprotects all locking */
672 if (prot == 0) {
673 flash_sect_t i;
674
675 for (i = 0; i < info->sector_count; i++) {
676 if (info->protect[i])
677 flash_real_protect (info, i, 1);
678 }
679 }
680 }
681 return retcode;
682 }
683
684 /*-----------------------------------------------------------------------
685 * flash_read_user_serial - read the OneTimeProgramming cells
686 */
687 void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
688 int len)
689 {
690 uchar *src;
691 uchar *dst;
692
693 dst = buffer;
694 src = flash_make_addr (info, 0, FLASH_OFFSET_USER_PROTECTION);
695 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
696 memcpy (dst, src + offset, len);
697 flash_write_cmd (info, 0, 0, info->cmd_reset);
698 }
699
700 /*
701 * flash_read_factory_serial - read the device Id from the protection area
702 */
703 void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
704 int len)
705 {
706 uchar *src;
707
708 src = flash_make_addr (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
709 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
710 memcpy (buffer, src + offset, len);
711 flash_write_cmd (info, 0, 0, info->cmd_reset);
712 }
713
714 #endif /* CFG_FLASH_PROTECTION */
715
716 /*
717 * flash_is_busy - check to see if the flash is busy
718 * This routine checks the status of the chip and returns true if the chip is busy
719 */
720 static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
721 {
722 int retval;
723
724 switch (info->vendor) {
725 case CFI_CMDSET_INTEL_STANDARD:
726 case CFI_CMDSET_INTEL_EXTENDED:
727 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
728 break;
729 case CFI_CMDSET_AMD_STANDARD:
730 case CFI_CMDSET_AMD_EXTENDED:
731 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
732 break;
733 default:
734 retval = 0;
735 }
736 debug ("flash_is_busy: %d\n", retval);
737 return retval;
738 }
739
740 /*-----------------------------------------------------------------------
741 * wait for XSR.7 to be set. Time out with an error if it does not.
742 * This routine does not set the flash to read-array mode.
743 */
744 static int flash_status_check (flash_info_t * info, flash_sect_t sector,
745 ulong tout, char *prompt)
746 {
747 ulong start;
748
749 /* Wait for command completion */
750 start = get_timer (0);
751 while (flash_is_busy (info, sector)) {
752 if (get_timer (start) > tout) {
753 printf ("Flash %s timeout at address %lx data %lx\n",
754 prompt, info->start[sector],
755 flash_read_long (info, sector, 0));
756 flash_write_cmd (info, sector, 0, info->cmd_reset);
757 return ERR_TIMOUT;
758 }
759 }
760 return ERR_OK;
761 }
762
763 /*-----------------------------------------------------------------------
764 * Wait for XSR.7 to be set, if it times out print an error, otherwise do a full status check.
765 * This routine sets the flash to read-array mode.
766 */
767 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
768 ulong tout, char *prompt)
769 {
770 int retcode;
771
772 retcode = flash_status_check (info, sector, tout, prompt);
773 switch (info->vendor) {
774 case CFI_CMDSET_INTEL_EXTENDED:
775 case CFI_CMDSET_INTEL_STANDARD:
776 if ((retcode == ERR_OK)
777 && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
778 retcode = ERR_INVAL;
779 printf ("Flash %s error at address %lx\n", prompt,
780 info->start[sector]);
781 if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS | FLASH_STATUS_PSLBS)) {
782 puts ("Command Sequence Error.\n");
783 } else if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS)) {
784 puts ("Block Erase Error.\n");
785 retcode = ERR_NOT_ERASED;
786 } else if (flash_isset (info, sector, 0, FLASH_STATUS_PSLBS)) {
787 puts ("Locking Error\n");
788 }
789 if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
790 puts ("Block locked.\n");
791 retcode = ERR_PROTECTED;
792 }
793 if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
794 puts ("Vpp Low Error.\n");
795 }
796 flash_write_cmd (info, sector, 0, info->cmd_reset);
797 break;
798 default:
799 break;
800 }
801 return retcode;
802 }
803
804 /*-----------------------------------------------------------------------
805 */
806 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
807 {
808 #if defined(__LITTLE_ENDIAN)
809 unsigned short w;
810 unsigned int l;
811 unsigned long long ll;
812 #endif
813
814 switch (info->portwidth) {
815 case FLASH_CFI_8BIT:
816 cword->c = c;
817 break;
818 case FLASH_CFI_16BIT:
819 #if defined(__LITTLE_ENDIAN)
820 w = c;
821 w <<= 8;
822 cword->w = (cword->w >> 8) | w;
823 #else
824 cword->w = (cword->w << 8) | c;
825 #endif
826 break;
827 case FLASH_CFI_32BIT:
828 #if defined(__LITTLE_ENDIAN)
829 l = c;
830 l <<= 24;
831 cword->l = (cword->l >> 8) | l;
832 #else
833 cword->l = (cword->l << 8) | c;
834 #endif
835 break;
836 case FLASH_CFI_64BIT:
837 #if defined(__LITTLE_ENDIAN)
838 ll = c;
839 ll <<= 56;
840 cword->ll = (cword->ll >> 8) | ll;
841 #else
842 cword->ll = (cword->ll << 8) | c;
843 #endif
844 break;
845 }
846 }
847
848
849 /*-----------------------------------------------------------------------
850 * make a proper sized command based on the port and chip widths
851 */
852 static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf)
853 {
854 int i;
855 uchar *cp = (uchar *) cmdbuf;
856
857 #if defined(__LITTLE_ENDIAN)
858 for (i = info->portwidth; i > 0; i--)
859 #else
860 for (i = 1; i <= info->portwidth; i++)
861 #endif
862 *cp++ = (i & (info->chipwidth - 1)) ? '\0' : cmd;
863 }
864
865 /*
866 * Write a proper sized command to the correct address
867 */
868 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
869 {
870
871 volatile cfiptr_t addr;
872 cfiword_t cword;
873
874 addr.cp = flash_make_addr (info, sect, offset);
875 flash_make_cmd (info, cmd, &cword);
876 switch (info->portwidth) {
877 case FLASH_CFI_8BIT:
878 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr.cp, cmd,
879 cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
880 *addr.cp = cword.c;
881 break;
882 case FLASH_CFI_16BIT:
883 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr.wp,
884 cmd, cword.w,
885 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
886 *addr.wp = cword.w;
887 break;
888 case FLASH_CFI_32BIT:
889 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr.lp,
890 cmd, cword.l,
891 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
892 *addr.lp = cword.l;
893 break;
894 case FLASH_CFI_64BIT:
895 #ifdef DEBUG
896 {
897 char str[20];
898
899 print_longlong (str, cword.ll);
900
901 debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
902 addr.llp, cmd, str,
903 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
904 }
905 #endif
906 *addr.llp = cword.ll;
907 break;
908 }
909 }
910
911 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
912 {
913 flash_write_cmd (info, sect, AMD_ADDR_START, AMD_CMD_UNLOCK_START);
914 flash_write_cmd (info, sect, AMD_ADDR_ACK, AMD_CMD_UNLOCK_ACK);
915 }
916
917 /*-----------------------------------------------------------------------
918 */
919 static int flash_isequal (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
920 {
921 cfiptr_t cptr;
922 cfiword_t cword;
923 int retval;
924
925 cptr.cp = flash_make_addr (info, sect, offset);
926 flash_make_cmd (info, cmd, &cword);
927
928 debug ("is= cmd %x(%c) addr %p ", cmd, cmd, cptr.cp);
929 switch (info->portwidth) {
930 case FLASH_CFI_8BIT:
931 debug ("is= %x %x\n", cptr.cp[0], cword.c);
932 retval = (cptr.cp[0] == cword.c);
933 break;
934 case FLASH_CFI_16BIT:
935 debug ("is= %4.4x %4.4x\n", cptr.wp[0], cword.w);
936 retval = (cptr.wp[0] == cword.w);
937 break;
938 case FLASH_CFI_32BIT:
939 debug ("is= %8.8lx %8.8lx\n", cptr.lp[0], cword.l);
940 retval = (cptr.lp[0] == cword.l);
941 break;
942 case FLASH_CFI_64BIT:
943 #ifdef DEBUG
944 {
945 char str1[20];
946 char str2[20];
947
948 print_longlong (str1, cptr.llp[0]);
949 print_longlong (str2, cword.ll);
950 debug ("is= %s %s\n", str1, str2);
951 }
952 #endif
953 retval = (cptr.llp[0] == cword.ll);
954 break;
955 default:
956 retval = 0;
957 break;
958 }
959 return retval;
960 }
961
962 /*-----------------------------------------------------------------------
963 */
964 static int flash_isset (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
965 {
966 cfiptr_t cptr;
967 cfiword_t cword;
968 int retval;
969
970 cptr.cp = flash_make_addr (info, sect, offset);
971 flash_make_cmd (info, cmd, &cword);
972 switch (info->portwidth) {
973 case FLASH_CFI_8BIT:
974 retval = ((cptr.cp[0] & cword.c) == cword.c);
975 break;
976 case FLASH_CFI_16BIT:
977 retval = ((cptr.wp[0] & cword.w) == cword.w);
978 break;
979 case FLASH_CFI_32BIT:
980 retval = ((cptr.lp[0] & cword.l) == cword.l);
981 break;
982 case FLASH_CFI_64BIT:
983 retval = ((cptr.llp[0] & cword.ll) == cword.ll);
984 break;
985 default:
986 retval = 0;
987 break;
988 }
989 return retval;
990 }
991
992 /*-----------------------------------------------------------------------
993 */
994 static int flash_toggle (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
995 {
996 cfiptr_t cptr;
997 cfiword_t cword;
998 int retval;
999
1000 cptr.cp = flash_make_addr (info, sect, offset);
1001 flash_make_cmd (info, cmd, &cword);
1002 switch (info->portwidth) {
1003 case FLASH_CFI_8BIT:
1004 retval = ((cptr.cp[0] & cword.c) != (cptr.cp[0] & cword.c));
1005 break;
1006 case FLASH_CFI_16BIT:
1007 retval = ((cptr.wp[0] & cword.w) != (cptr.wp[0] & cword.w));
1008 break;
1009 case FLASH_CFI_32BIT:
1010 retval = ((cptr.lp[0] & cword.l) != (cptr.lp[0] & cword.l));
1011 break;
1012 case FLASH_CFI_64BIT:
1013 retval = ((cptr.llp[0] & cword.ll) !=
1014 (cptr.llp[0] & cword.ll));
1015 break;
1016 default:
1017 retval = 0;
1018 break;
1019 }
1020 return retval;
1021 }
1022
1023 /*-----------------------------------------------------------------------
1024 * detect if flash is compatible with the Common Flash Interface (CFI)
1025 * http://www.jedec.org/download/search/jesd68.pdf
1026 *
1027 */
1028 static int flash_detect_cfi (flash_info_t * info)
1029 {
1030 debug ("flash detect cfi\n");
1031
1032 for (info->portwidth = CFG_FLASH_CFI_WIDTH;
1033 info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
1034 for (info->chipwidth = FLASH_CFI_BY8;
1035 info->chipwidth <= info->portwidth;
1036 info->chipwidth <<= 1) {
1037 flash_write_cmd (info, 0, 0, info->cmd_reset);
1038 flash_write_cmd (info, 0, FLASH_OFFSET_CFI, FLASH_CMD_CFI);
1039 if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
1040 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
1041 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
1042 info->interface = flash_read_ushort (info, 0, FLASH_OFFSET_INTERFACE);
1043 debug ("device interface is %d\n",
1044 info->interface);
1045 debug ("found port %d chip %d ",
1046 info->portwidth, info->chipwidth);
1047 debug ("port %d bits chip %d bits\n",
1048 info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1049 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1050 return 1;
1051 }
1052 }
1053 }
1054 debug ("not found\n");
1055 return 0;
1056 }
1057
1058 /*
1059 * The following code cannot be run from FLASH!
1060 *
1061 */
1062 ulong flash_get_size (ulong base, int banknum)
1063 {
1064 flash_info_t *info = &flash_info[banknum];
1065 int i, j;
1066 flash_sect_t sect_cnt;
1067 unsigned long sector;
1068 unsigned long tmp;
1069 int size_ratio;
1070 uchar num_erase_regions;
1071 int erase_region_size;
1072 int erase_region_count;
1073
1074 info->start[0] = base;
1075
1076 if (flash_detect_cfi (info)) {
1077 info->vendor = flash_read_ushort (info, 0, FLASH_OFFSET_PRIMARY_VENDOR);
1078 #ifdef DEBUG
1079 flash_printqry (info, 0);
1080 #endif
1081 switch (info->vendor) {
1082 case CFI_CMDSET_INTEL_STANDARD:
1083 case CFI_CMDSET_INTEL_EXTENDED:
1084 default:
1085 info->cmd_reset = FLASH_CMD_RESET;
1086 break;
1087 case CFI_CMDSET_AMD_STANDARD:
1088 case CFI_CMDSET_AMD_EXTENDED:
1089 info->cmd_reset = AMD_CMD_RESET;
1090 break;
1091 }
1092
1093 debug ("manufacturer is %d\n", info->vendor);
1094 size_ratio = info->portwidth / info->chipwidth;
1095 /* if the chip is x8/x16 reduce the ratio by half */
1096 if ((info->interface == FLASH_CFI_X8X16)
1097 && (info->chipwidth == FLASH_CFI_BY8)) {
1098 size_ratio >>= 1;
1099 }
1100 num_erase_regions = flash_read_uchar (info, FLASH_OFFSET_NUM_ERASE_REGIONS);
1101 debug ("size_ratio %d port %d bits chip %d bits\n",
1102 size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1103 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1104 debug ("found %d erase regions\n", num_erase_regions);
1105 sect_cnt = 0;
1106 sector = base;
1107 for (i = 0; i < num_erase_regions; i++) {
1108 if (i > NUM_ERASE_REGIONS) {
1109 printf ("%d erase regions found, only %d used\n",
1110 num_erase_regions, NUM_ERASE_REGIONS);
1111 break;
1112 }
1113 tmp = flash_read_long (info, 0,
1114 FLASH_OFFSET_ERASE_REGIONS +
1115 i * 4);
1116 erase_region_size =
1117 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
1118 tmp >>= 16;
1119 erase_region_count = (tmp & 0xffff) + 1;
1120 debug ("erase_region_count = %d erase_region_size = %d\n",
1121 erase_region_count, erase_region_size);
1122 for (j = 0; j < erase_region_count; j++) {
1123 info->start[sect_cnt] = sector;
1124 sector += (erase_region_size * size_ratio);
1125
1126 /*
1127 * Only read protection status from supported devices (intel...)
1128 */
1129 switch (info->vendor) {
1130 case CFI_CMDSET_INTEL_EXTENDED:
1131 case CFI_CMDSET_INTEL_STANDARD:
1132 info->protect[sect_cnt] =
1133 flash_isset (info, sect_cnt,
1134 FLASH_OFFSET_PROTECT,
1135 FLASH_STATUS_PROTECT);
1136 break;
1137 default:
1138 info->protect[sect_cnt] = 0; /* default: not protected */
1139 }
1140
1141 sect_cnt++;
1142 }
1143 }
1144
1145 info->sector_count = sect_cnt;
1146 /* multiply the size by the number of chips */
1147 info->size = (1 << flash_read_uchar (info, FLASH_OFFSET_SIZE)) * size_ratio;
1148 info->buffer_size = (1 << flash_read_ushort (info, 0, FLASH_OFFSET_BUFFER_SIZE));
1149 tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_ETOUT);
1150 info->erase_blk_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_EMAX_TOUT)));
1151 tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_WBTOUT);
1152 info->buffer_write_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_WBMAX_TOUT)));
1153 tmp = (1 << flash_read_uchar (info, FLASH_OFFSET_WTOUT)) *
1154 (1 << flash_read_uchar (info, FLASH_OFFSET_WMAX_TOUT));
1155 info->write_tout = tmp / 1000 + (tmp % 1000 ? 1 : 0); /* round up when converting to ms */
1156 info->flash_id = FLASH_MAN_CFI;
1157 if ((info->interface == FLASH_CFI_X8X16) && (info->chipwidth == FLASH_CFI_BY8)) {
1158 info->portwidth >>= 1; /* XXX - Need to test on x8/x16 in parallel. */
1159 }
1160 }
1161
1162 flash_write_cmd (info, 0, 0, info->cmd_reset);
1163 return (info->size);
1164 }
1165
1166 /* loop through the sectors from the highest address
1167 * when the passed address is greater or equal to the sector address
1168 * we have a match
1169 */
1170 static flash_sect_t find_sector (flash_info_t * info, ulong addr)
1171 {
1172 flash_sect_t sector;
1173
1174 for (sector = info->sector_count - 1; sector >= 0; sector--) {
1175 if (addr >= info->start[sector])
1176 break;
1177 }
1178 return sector;
1179 }
1180
1181 /*-----------------------------------------------------------------------
1182 */
1183 static int flash_write_cfiword (flash_info_t * info, ulong dest,
1184 cfiword_t cword)
1185 {
1186 cfiptr_t ctladdr;
1187 cfiptr_t cptr;
1188 int flag;
1189
1190 ctladdr.cp = flash_make_addr (info, 0, 0);
1191 cptr.cp = (uchar *) dest;
1192
1193
1194 /* Check if Flash is (sufficiently) erased */
1195 switch (info->portwidth) {
1196 case FLASH_CFI_8BIT:
1197 flag = ((cptr.cp[0] & cword.c) == cword.c);
1198 break;
1199 case FLASH_CFI_16BIT:
1200 flag = ((cptr.wp[0] & cword.w) == cword.w);
1201 break;
1202 case FLASH_CFI_32BIT:
1203 flag = ((cptr.lp[0] & cword.l) == cword.l);
1204 break;
1205 case FLASH_CFI_64BIT:
1206 flag = ((cptr.llp[0] & cword.ll) == cword.ll);
1207 break;
1208 default:
1209 return 2;
1210 }
1211 if (!flag)
1212 return 2;
1213
1214 /* Disable interrupts which might cause a timeout here */
1215 flag = disable_interrupts ();
1216
1217 switch (info->vendor) {
1218 case CFI_CMDSET_INTEL_EXTENDED:
1219 case CFI_CMDSET_INTEL_STANDARD:
1220 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
1221 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
1222 break;
1223 case CFI_CMDSET_AMD_EXTENDED:
1224 case CFI_CMDSET_AMD_STANDARD:
1225 flash_unlock_seq (info, 0);
1226 flash_write_cmd (info, 0, AMD_ADDR_START, AMD_CMD_WRITE);
1227 break;
1228 }
1229
1230 switch (info->portwidth) {
1231 case FLASH_CFI_8BIT:
1232 cptr.cp[0] = cword.c;
1233 break;
1234 case FLASH_CFI_16BIT:
1235 cptr.wp[0] = cword.w;
1236 break;
1237 case FLASH_CFI_32BIT:
1238 cptr.lp[0] = cword.l;
1239 break;
1240 case FLASH_CFI_64BIT:
1241 cptr.llp[0] = cword.ll;
1242 break;
1243 }
1244
1245 /* re-enable interrupts if necessary */
1246 if (flag)
1247 enable_interrupts ();
1248
1249 return flash_full_status_check (info, find_sector (info, dest),
1250 info->write_tout, "write");
1251 }
1252
1253 #ifdef CFG_FLASH_USE_BUFFER_WRITE
1254
1255 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
1256 int len)
1257 {
1258 flash_sect_t sector;
1259 int cnt;
1260 int retcode;
1261 volatile cfiptr_t src;
1262 volatile cfiptr_t dst;
1263
1264 switch (info->vendor) {
1265 case CFI_CMDSET_INTEL_STANDARD:
1266 case CFI_CMDSET_INTEL_EXTENDED:
1267 src.cp = cp;
1268 dst.cp = (uchar *) dest;
1269 sector = find_sector (info, dest);
1270 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1271 flash_write_cmd (info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER);
1272 if ((retcode = flash_status_check (info, sector, info->buffer_write_tout,
1273 "write to buffer")) == ERR_OK) {
1274 /* reduce the number of loops by the width of the port */
1275 switch (info->portwidth) {
1276 case FLASH_CFI_8BIT:
1277 cnt = len;
1278 break;
1279 case FLASH_CFI_16BIT:
1280 cnt = len >> 1;
1281 break;
1282 case FLASH_CFI_32BIT:
1283 cnt = len >> 2;
1284 break;
1285 case FLASH_CFI_64BIT:
1286 cnt = len >> 3;
1287 break;
1288 default:
1289 return ERR_INVAL;
1290 break;
1291 }
1292 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
1293 while (cnt-- > 0) {
1294 switch (info->portwidth) {
1295 case FLASH_CFI_8BIT:
1296 *dst.cp++ = *src.cp++;
1297 break;
1298 case FLASH_CFI_16BIT:
1299 *dst.wp++ = *src.wp++;
1300 break;
1301 case FLASH_CFI_32BIT:
1302 *dst.lp++ = *src.lp++;
1303 break;
1304 case FLASH_CFI_64BIT:
1305 *dst.llp++ = *src.llp++;
1306 break;
1307 default:
1308 return ERR_INVAL;
1309 break;
1310 }
1311 }
1312 flash_write_cmd (info, sector, 0,
1313 FLASH_CMD_WRITE_BUFFER_CONFIRM);
1314 retcode = flash_full_status_check (info, sector,
1315 info->buffer_write_tout,
1316 "buffer write");
1317 }
1318 return retcode;
1319
1320 case CFI_CMDSET_AMD_STANDARD:
1321 case CFI_CMDSET_AMD_EXTENDED:
1322 src.cp = cp;
1323 dst.cp = (uchar *) dest;
1324 sector = find_sector (info, dest);
1325
1326 flash_unlock_seq(info,0);
1327 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_TO_BUFFER);
1328
1329 switch (info->portwidth) {
1330 case FLASH_CFI_8BIT:
1331 cnt = len;
1332 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
1333 while (cnt-- > 0) *dst.cp++ = *src.cp++;
1334 break;
1335 case FLASH_CFI_16BIT:
1336 cnt = len >> 1;
1337 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
1338 while (cnt-- > 0) *dst.wp++ = *src.wp++;
1339 break;
1340 case FLASH_CFI_32BIT:
1341 cnt = len >> 2;
1342 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
1343 while (cnt-- > 0) *dst.lp++ = *src.lp++;
1344 break;
1345 case FLASH_CFI_64BIT:
1346 cnt = len >> 3;
1347 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
1348 while (cnt-- > 0) *dst.llp++ = *src.llp++;
1349 break;
1350 default:
1351 return ERR_INVAL;
1352 }
1353
1354 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
1355 retcode = flash_full_status_check (info, sector, info->buffer_write_tout,
1356 "buffer write");
1357 return retcode;
1358
1359 default:
1360 debug ("Unknown Command Set\n");
1361 return ERR_INVAL;
1362 }
1363 }
1364 #endif /* CFG_FLASH_USE_BUFFER_WRITE */
1365 #endif /* CFG_FLASH_CFI */
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