2 * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
11 #include <linux/clk-provider.h>
12 #include <linux/clkdev.h>
13 #include <linux/clk/at91_pmc.h>
15 #include <linux/of_address.h>
17 #include <linux/interrupt.h>
18 #include <linux/irq.h>
19 #include <linux/irqchip/chained_irq.h>
20 #include <linux/irqdomain.h>
21 #include <linux/of_irq.h>
23 #include <asm/proc-fns.h>
27 void __iomem
*at91_pmc_base
;
28 EXPORT_SYMBOL_GPL(at91_pmc_base
);
30 void at91rm9200_idle(void)
33 * Disable the processor clock. The processor will be automatically
34 * re-enabled by an interrupt or by a reset.
36 at91_pmc_write(AT91_PMC_SCDR
, AT91_PMC_PCK
);
39 void at91sam9_idle(void)
41 at91_pmc_write(AT91_PMC_SCDR
, AT91_PMC_PCK
);
45 int of_at91_get_clk_range(struct device_node
*np
, const char *propname
,
46 struct clk_range
*range
)
51 ret
= of_property_read_u32_index(np
, propname
, 0, &min
);
55 ret
= of_property_read_u32_index(np
, propname
, 1, &max
);
66 EXPORT_SYMBOL_GPL(of_at91_get_clk_range
);
68 static void pmc_irq_mask(struct irq_data
*d
)
70 struct at91_pmc
*pmc
= irq_data_get_irq_chip_data(d
);
72 pmc_write(pmc
, AT91_PMC_IDR
, 1 << d
->hwirq
);
75 static void pmc_irq_unmask(struct irq_data
*d
)
77 struct at91_pmc
*pmc
= irq_data_get_irq_chip_data(d
);
79 pmc_write(pmc
, AT91_PMC_IER
, 1 << d
->hwirq
);
82 static int pmc_irq_set_type(struct irq_data
*d
, unsigned type
)
84 if (type
!= IRQ_TYPE_LEVEL_HIGH
) {
85 pr_warn("PMC: type not supported (support only IRQ_TYPE_LEVEL_HIGH type)\n");
92 static struct irq_chip pmc_irq
= {
94 .irq_disable
= pmc_irq_mask
,
95 .irq_mask
= pmc_irq_mask
,
96 .irq_unmask
= pmc_irq_unmask
,
97 .irq_set_type
= pmc_irq_set_type
,
100 static struct lock_class_key pmc_lock_class
;
102 static int pmc_irq_map(struct irq_domain
*h
, unsigned int virq
,
105 struct at91_pmc
*pmc
= h
->host_data
;
107 irq_set_lockdep_class(virq
, &pmc_lock_class
);
109 irq_set_chip_and_handler(virq
, &pmc_irq
,
111 set_irq_flags(virq
, IRQF_VALID
);
112 irq_set_chip_data(virq
, pmc
);
117 static int pmc_irq_domain_xlate(struct irq_domain
*d
,
118 struct device_node
*ctrlr
,
119 const u32
*intspec
, unsigned int intsize
,
120 irq_hw_number_t
*out_hwirq
,
121 unsigned int *out_type
)
123 struct at91_pmc
*pmc
= d
->host_data
;
124 const struct at91_pmc_caps
*caps
= pmc
->caps
;
126 if (WARN_ON(intsize
< 1))
129 *out_hwirq
= intspec
[0];
131 if (!(caps
->available_irqs
& (1 << *out_hwirq
)))
134 *out_type
= IRQ_TYPE_LEVEL_HIGH
;
139 static struct irq_domain_ops pmc_irq_ops
= {
141 .xlate
= pmc_irq_domain_xlate
,
144 static irqreturn_t
pmc_irq_handler(int irq
, void *data
)
146 struct at91_pmc
*pmc
= (struct at91_pmc
*)data
;
150 sr
= pmc_read(pmc
, AT91_PMC_SR
) & pmc_read(pmc
, AT91_PMC_IMR
);
154 for_each_set_bit(n
, &sr
, BITS_PER_LONG
)
155 generic_handle_irq(irq_find_mapping(pmc
->irqdomain
, n
));
160 static const struct at91_pmc_caps at91rm9200_caps
= {
161 .available_irqs
= AT91_PMC_MOSCS
| AT91_PMC_LOCKA
| AT91_PMC_LOCKB
|
162 AT91_PMC_MCKRDY
| AT91_PMC_PCK0RDY
|
163 AT91_PMC_PCK1RDY
| AT91_PMC_PCK2RDY
|
167 static const struct at91_pmc_caps at91sam9260_caps
= {
168 .available_irqs
= AT91_PMC_MOSCS
| AT91_PMC_LOCKA
| AT91_PMC_LOCKB
|
169 AT91_PMC_MCKRDY
| AT91_PMC_PCK0RDY
|
173 static const struct at91_pmc_caps at91sam9g45_caps
= {
174 .available_irqs
= AT91_PMC_MOSCS
| AT91_PMC_LOCKA
| AT91_PMC_MCKRDY
|
175 AT91_PMC_LOCKU
| AT91_PMC_PCK0RDY
|
179 static const struct at91_pmc_caps at91sam9n12_caps
= {
180 .available_irqs
= AT91_PMC_MOSCS
| AT91_PMC_LOCKA
| AT91_PMC_LOCKB
|
181 AT91_PMC_MCKRDY
| AT91_PMC_PCK0RDY
|
182 AT91_PMC_PCK1RDY
| AT91_PMC_MOSCSELS
|
183 AT91_PMC_MOSCRCS
| AT91_PMC_CFDEV
,
186 static const struct at91_pmc_caps at91sam9x5_caps
= {
187 .available_irqs
= AT91_PMC_MOSCS
| AT91_PMC_LOCKA
| AT91_PMC_MCKRDY
|
188 AT91_PMC_LOCKU
| AT91_PMC_PCK0RDY
|
189 AT91_PMC_PCK1RDY
| AT91_PMC_MOSCSELS
|
190 AT91_PMC_MOSCRCS
| AT91_PMC_CFDEV
,
193 static const struct at91_pmc_caps sama5d3_caps
= {
194 .available_irqs
= AT91_PMC_MOSCS
| AT91_PMC_LOCKA
| AT91_PMC_MCKRDY
|
195 AT91_PMC_LOCKU
| AT91_PMC_PCK0RDY
|
196 AT91_PMC_PCK1RDY
| AT91_PMC_PCK2RDY
|
197 AT91_PMC_MOSCSELS
| AT91_PMC_MOSCRCS
|
201 static struct at91_pmc
*__init
at91_pmc_init(struct device_node
*np
,
202 void __iomem
*regbase
, int virq
,
203 const struct at91_pmc_caps
*caps
)
205 struct at91_pmc
*pmc
;
207 if (!regbase
|| !virq
|| !caps
)
210 at91_pmc_base
= regbase
;
212 pmc
= kzalloc(sizeof(*pmc
), GFP_KERNEL
);
216 spin_lock_init(&pmc
->lock
);
217 pmc
->regbase
= regbase
;
221 pmc
->irqdomain
= irq_domain_add_linear(np
, 32, &pmc_irq_ops
, pmc
);
226 pmc_write(pmc
, AT91_PMC_IDR
, 0xffffffff);
227 if (request_irq(pmc
->virq
, pmc_irq_handler
, IRQF_SHARED
, "pmc", pmc
))
228 goto out_remove_irqdomain
;
232 out_remove_irqdomain
:
233 irq_domain_remove(pmc
->irqdomain
);
240 static const struct of_device_id pmc_clk_ids
[] __initconst
= {
241 /* Slow oscillator */
243 .compatible
= "atmel,at91sam9260-clk-slow",
244 .data
= of_at91sam9260_clk_slow_setup
,
248 .compatible
= "atmel,at91rm9200-clk-main-osc",
249 .data
= of_at91rm9200_clk_main_osc_setup
,
252 .compatible
= "atmel,at91sam9x5-clk-main-rc-osc",
253 .data
= of_at91sam9x5_clk_main_rc_osc_setup
,
256 .compatible
= "atmel,at91rm9200-clk-main",
257 .data
= of_at91rm9200_clk_main_setup
,
260 .compatible
= "atmel,at91sam9x5-clk-main",
261 .data
= of_at91sam9x5_clk_main_setup
,
265 .compatible
= "atmel,at91rm9200-clk-pll",
266 .data
= of_at91rm9200_clk_pll_setup
,
269 .compatible
= "atmel,at91sam9g45-clk-pll",
270 .data
= of_at91sam9g45_clk_pll_setup
,
273 .compatible
= "atmel,at91sam9g20-clk-pllb",
274 .data
= of_at91sam9g20_clk_pllb_setup
,
277 .compatible
= "atmel,sama5d3-clk-pll",
278 .data
= of_sama5d3_clk_pll_setup
,
281 .compatible
= "atmel,at91sam9x5-clk-plldiv",
282 .data
= of_at91sam9x5_clk_plldiv_setup
,
286 .compatible
= "atmel,at91rm9200-clk-master",
287 .data
= of_at91rm9200_clk_master_setup
,
290 .compatible
= "atmel,at91sam9x5-clk-master",
291 .data
= of_at91sam9x5_clk_master_setup
,
295 .compatible
= "atmel,at91rm9200-clk-system",
296 .data
= of_at91rm9200_clk_sys_setup
,
298 /* Peripheral clocks */
300 .compatible
= "atmel,at91rm9200-clk-peripheral",
301 .data
= of_at91rm9200_clk_periph_setup
,
304 .compatible
= "atmel,at91sam9x5-clk-peripheral",
305 .data
= of_at91sam9x5_clk_periph_setup
,
307 /* Programmable clocks */
309 .compatible
= "atmel,at91rm9200-clk-programmable",
310 .data
= of_at91rm9200_clk_prog_setup
,
313 .compatible
= "atmel,at91sam9g45-clk-programmable",
314 .data
= of_at91sam9g45_clk_prog_setup
,
317 .compatible
= "atmel,at91sam9x5-clk-programmable",
318 .data
= of_at91sam9x5_clk_prog_setup
,
321 #if defined(CONFIG_HAVE_AT91_UTMI)
323 .compatible
= "atmel,at91sam9x5-clk-utmi",
324 .data
= of_at91sam9x5_clk_utmi_setup
,
328 #if defined(CONFIG_HAVE_AT91_USB_CLK)
330 .compatible
= "atmel,at91rm9200-clk-usb",
331 .data
= of_at91rm9200_clk_usb_setup
,
334 .compatible
= "atmel,at91sam9x5-clk-usb",
335 .data
= of_at91sam9x5_clk_usb_setup
,
338 .compatible
= "atmel,at91sam9n12-clk-usb",
339 .data
= of_at91sam9n12_clk_usb_setup
,
343 #if defined(CONFIG_HAVE_AT91_SMD)
345 .compatible
= "atmel,at91sam9x5-clk-smd",
346 .data
= of_at91sam9x5_clk_smd_setup
,
349 #if defined(CONFIG_HAVE_AT91_H32MX)
351 .compatible
= "atmel,sama5d4-clk-h32mx",
352 .data
= of_sama5d4_clk_h32mx_setup
,
358 static void __init
of_at91_pmc_setup(struct device_node
*np
,
359 const struct at91_pmc_caps
*caps
)
361 struct at91_pmc
*pmc
;
362 struct device_node
*childnp
;
363 void (*clk_setup
)(struct device_node
*, struct at91_pmc
*);
364 const struct of_device_id
*clk_id
;
365 void __iomem
*regbase
= of_iomap(np
, 0);
371 virq
= irq_of_parse_and_map(np
, 0);
375 pmc
= at91_pmc_init(np
, regbase
, virq
, caps
);
378 for_each_child_of_node(np
, childnp
) {
379 clk_id
= of_match_node(pmc_clk_ids
, childnp
);
382 clk_setup
= clk_id
->data
;
383 clk_setup(childnp
, pmc
);
387 static void __init
of_at91rm9200_pmc_setup(struct device_node
*np
)
389 of_at91_pmc_setup(np
, &at91rm9200_caps
);
391 CLK_OF_DECLARE(at91rm9200_clk_pmc
, "atmel,at91rm9200-pmc",
392 of_at91rm9200_pmc_setup
);
394 static void __init
of_at91sam9260_pmc_setup(struct device_node
*np
)
396 of_at91_pmc_setup(np
, &at91sam9260_caps
);
398 CLK_OF_DECLARE(at91sam9260_clk_pmc
, "atmel,at91sam9260-pmc",
399 of_at91sam9260_pmc_setup
);
401 static void __init
of_at91sam9g45_pmc_setup(struct device_node
*np
)
403 of_at91_pmc_setup(np
, &at91sam9g45_caps
);
405 CLK_OF_DECLARE(at91sam9g45_clk_pmc
, "atmel,at91sam9g45-pmc",
406 of_at91sam9g45_pmc_setup
);
408 static void __init
of_at91sam9n12_pmc_setup(struct device_node
*np
)
410 of_at91_pmc_setup(np
, &at91sam9n12_caps
);
412 CLK_OF_DECLARE(at91sam9n12_clk_pmc
, "atmel,at91sam9n12-pmc",
413 of_at91sam9n12_pmc_setup
);
415 static void __init
of_at91sam9x5_pmc_setup(struct device_node
*np
)
417 of_at91_pmc_setup(np
, &at91sam9x5_caps
);
419 CLK_OF_DECLARE(at91sam9x5_clk_pmc
, "atmel,at91sam9x5-pmc",
420 of_at91sam9x5_pmc_setup
);
422 static void __init
of_sama5d3_pmc_setup(struct device_node
*np
)
424 of_at91_pmc_setup(np
, &sama5d3_caps
);
426 CLK_OF_DECLARE(sama5d3_clk_pmc
, "atmel,sama5d3-pmc",
427 of_sama5d3_pmc_setup
);