drivers/crypto/nx/nx-842-powernv.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * Driver for IBM PowerNV 842 compression accelerator
   4  *
   5  * Copyright (C) 2015 Dan Streetman, IBM Corp
   6  */
   7
   8 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
   9
  10 #include "nx-842.h"
  11
  12 #include <linux/timer.h>
  13
  14 #include <asm/prom.h>
  15 #include <asm/icswx.h>
  16 #include <asm/vas.h>
  17 #include <asm/reg.h>
  18 #include <asm/opal-api.h>
  19 #include <asm/opal.h>
  20
  21 MODULE_LICENSE("GPL");
  22 MODULE_AUTHOR("Dan Streetman <ddstreet@ieee.org>");
  23 MODULE_DESCRIPTION("842 H/W Compression driver for IBM PowerNV processors");
  24 MODULE_ALIAS_CRYPTO("842");
  25 MODULE_ALIAS_CRYPTO("842-nx");
  26
  27 #define WORKMEM_ALIGN   (CRB_ALIGN)
  28 #define CSB_WAIT_MAX    (5000) /* ms */
  29 #define VAS_RETRIES     (10)
  30 /* # of requests allowed per RxFIFO at a time. 0 for unlimited */
  31 #define MAX_CREDITS_PER_RXFIFO  (1024)
  32
  33 struct nx842_workmem {
  34         /* Below fields must be properly aligned */
  35         struct coprocessor_request_block crb; /* CRB_ALIGN align */
  36         struct data_descriptor_entry ddl_in[DDL_LEN_MAX]; /* DDE_ALIGN align */
  37         struct data_descriptor_entry ddl_out[DDL_LEN_MAX]; /* DDE_ALIGN align */
  38         /* Above fields must be properly aligned */
  39
  40         ktime_t start;
  41
  42         char padding[WORKMEM_ALIGN]; /* unused, to allow alignment */
  43 } __packed __aligned(WORKMEM_ALIGN);
  44
  45 struct nx842_coproc {
  46         unsigned int chip_id;
  47         unsigned int ct;
  48         unsigned int ci;        /* Coprocessor instance, used with icswx */
  49         struct {
  50                 struct vas_window *rxwin;
  51                 int id;
  52         } vas;
  53         struct list_head list;
  54 };
  55
  56 /*
  57  * Send the request to NX engine on the chip for the corresponding CPU
  58  * where the process is executing. Use with VAS function.
  59  */
  60 static DEFINE_PER_CPU(struct vas_window *, cpu_txwin);
  61
  62 /* no cpu hotplug on powernv, so this list never changes after init */
  63 static LIST_HEAD(nx842_coprocs);
  64 static unsigned int nx842_ct;   /* used in icswx function */
  65
  66 static int (*nx842_powernv_exec)(const unsigned char *in,
  67                                 unsigned int inlen, unsigned char *out,
  68                                 unsigned int *outlenp, void *workmem, int fc);
  69
  70 /**
  71  * setup_indirect_dde - Setup an indirect DDE
  72  *
  73  * The DDE is setup with the the DDE count, byte count, and address of
  74  * first direct DDE in the list.
  75  */
  76 static void setup_indirect_dde(struct data_descriptor_entry *dde,
  77                                struct data_descriptor_entry *ddl,
  78                                unsigned int dde_count, unsigned int byte_count)
  79 {
  80         dde->flags = 0;
  81         dde->count = dde_count;
  82         dde->index = 0;
  83         dde->length = cpu_to_be32(byte_count);
  84         dde->address = cpu_to_be64(nx842_get_pa(ddl));
  85 }
  86
  87 /**
  88  * setup_direct_dde - Setup single DDE from buffer
  89  *
  90  * The DDE is setup with the buffer and length.  The buffer must be properly
  91  * aligned.  The used length is returned.
  92  * Returns:
  93  *   N    Successfully set up DDE with N bytes
  94  */
  95 static unsigned int setup_direct_dde(struct data_descriptor_entry *dde,
  96                                      unsigned long pa, unsigned int len)
  97 {
  98         unsigned int l = min_t(unsigned int, len, LEN_ON_PAGE(pa));
  99
 100         dde->flags = 0;
 101         dde->count = 0;
 102         dde->index = 0;
 103         dde->length = cpu_to_be32(l);
 104         dde->address = cpu_to_be64(pa);
 105
 106         return l;
 107 }
 108
 109 /**
 110  * setup_ddl - Setup DDL from buffer
 111  *
 112  * Returns:
 113  *   0          Successfully set up DDL
 114  */
 115 static int setup_ddl(struct data_descriptor_entry *dde,
 116                      struct data_descriptor_entry *ddl,
 117                      unsigned char *buf, unsigned int len,
 118                      bool in)
 119 {
 120         unsigned long pa = nx842_get_pa(buf);
 121         int i, ret, total_len = len;
 122
 123         if (!IS_ALIGNED(pa, DDE_BUFFER_ALIGN)) {
 124                 pr_debug("%s buffer pa 0x%lx not 0x%x-byte aligned\n",
 125                          in ? "input" : "output", pa, DDE_BUFFER_ALIGN);
 126                 return -EINVAL;
 127         }
 128
 129         /* only need to check last mult; since buffer must be
 130          * DDE_BUFFER_ALIGN aligned, and that is a multiple of
 131          * DDE_BUFFER_SIZE_MULT, and pre-last page DDE buffers
 132          * are guaranteed a multiple of DDE_BUFFER_SIZE_MULT.
 133          */
 134         if (len % DDE_BUFFER_LAST_MULT) {
 135                 pr_debug("%s buffer len 0x%x not a multiple of 0x%x\n",
 136                          in ? "input" : "output", len, DDE_BUFFER_LAST_MULT);
 137                 if (in)
 138                         return -EINVAL;
 139                 len = round_down(len, DDE_BUFFER_LAST_MULT);
 140         }
 141
 142         /* use a single direct DDE */
 143         if (len <= LEN_ON_PAGE(pa)) {
 144                 ret = setup_direct_dde(dde, pa, len);
 145                 WARN_ON(ret < len);
 146                 return 0;
 147         }
 148
 149         /* use the DDL */
 150         for (i = 0; i < DDL_LEN_MAX && len > 0; i++) {
 151                 ret = setup_direct_dde(&ddl[i], pa, len);
 152                 buf += ret;
 153                 len -= ret;
 154                 pa = nx842_get_pa(buf);
 155         }
 156
 157         if (len > 0) {
 158                 pr_debug("0x%x total %s bytes 0x%x too many for DDL.\n",
 159                          total_len, in ? "input" : "output", len);
 160                 if (in)
 161                         return -EMSGSIZE;
 162                 total_len -= len;
 163         }
 164         setup_indirect_dde(dde, ddl, i, total_len);
 165
 166         return 0;
 167 }
 168
 169 #define CSB_ERR(csb, msg, ...)                                  \
 170         pr_err("ERROR: " msg " : %02x %02x %02x %02x %08x\n",   \
 171                ##__VA_ARGS__, (csb)->flags,                     \
 172                (csb)->cs, (csb)->cc, (csb)->ce,                 \
 173                be32_to_cpu((csb)->count))
 174
 175 #define CSB_ERR_ADDR(csb, msg, ...)                             \
 176         CSB_ERR(csb, msg " at %lx", ##__VA_ARGS__,              \
 177                 (unsigned long)be64_to_cpu((csb)->address))
 178
 179 /**
 180  * wait_for_csb
 181  */
 182 static int wait_for_csb(struct nx842_workmem *wmem,
 183                         struct coprocessor_status_block *csb)
 184 {
 185         ktime_t start = wmem->start, now = ktime_get();
 186         ktime_t timeout = ktime_add_ms(start, CSB_WAIT_MAX);
 187
 188         while (!(READ_ONCE(csb->flags) & CSB_V)) {
 189                 cpu_relax();
 190                 now = ktime_get();
 191                 if (ktime_after(now, timeout))
 192                         break;
 193         }
 194
 195         /* hw has updated csb and output buffer */
 196         barrier();
 197
 198         /* check CSB flags */
 199         if (!(csb->flags & CSB_V)) {
 200                 CSB_ERR(csb, "CSB still not valid after %ld us, giving up",
 201                         (long)ktime_us_delta(now, start));
 202                 return -ETIMEDOUT;
 203         }
 204         if (csb->flags & CSB_F) {
 205                 CSB_ERR(csb, "Invalid CSB format");
 206                 return -EPROTO;
 207         }
 208         if (csb->flags & CSB_CH) {
 209                 CSB_ERR(csb, "Invalid CSB chaining state");
 210                 return -EPROTO;
 211         }
 212
 213         /* verify CSB completion sequence is 0 */
 214         if (csb->cs) {
 215                 CSB_ERR(csb, "Invalid CSB completion sequence");
 216                 return -EPROTO;
 217         }
 218
 219         /* check CSB Completion Code */
 220         switch (csb->cc) {
 221         /* no error */
 222         case CSB_CC_SUCCESS:
 223                 break;
 224         case CSB_CC_TPBC_GT_SPBC:
 225                 /* not an error, but the compressed data is
 226                  * larger than the uncompressed data :(
 227                  */
 228                 break;
 229
 230         /* input data errors */
 231         case CSB_CC_OPERAND_OVERLAP:
 232                 /* input and output buffers overlap */
 233                 CSB_ERR(csb, "Operand Overlap error");
 234                 return -EINVAL;
 235         case CSB_CC_INVALID_OPERAND:
 236                 CSB_ERR(csb, "Invalid operand");
 237                 return -EINVAL;
 238         case CSB_CC_NOSPC:
 239                 /* output buffer too small */
 240                 return -ENOSPC;
 241         case CSB_CC_ABORT:
 242                 CSB_ERR(csb, "Function aborted");
 243                 return -EINTR;
 244         case CSB_CC_CRC_MISMATCH:
 245                 CSB_ERR(csb, "CRC mismatch");
 246                 return -EINVAL;
 247         case CSB_CC_TEMPL_INVALID:
 248                 CSB_ERR(csb, "Compressed data template invalid");
 249                 return -EINVAL;
 250         case CSB_CC_TEMPL_OVERFLOW:
 251                 CSB_ERR(csb, "Compressed data template shows data past end");
 252                 return -EINVAL;
 253         case CSB_CC_EXCEED_BYTE_COUNT:  /* P9 or later */
 254                 /*
 255                  * DDE byte count exceeds the limit specified in Maximum
 256                  * byte count register.
 257                  */
 258                 CSB_ERR(csb, "DDE byte count exceeds the limit");
 259                 return -EINVAL;
 260
 261         /* these should not happen */
 262         case CSB_CC_INVALID_ALIGN:
 263                 /* setup_ddl should have detected this */
 264                 CSB_ERR_ADDR(csb, "Invalid alignment");
 265                 return -EINVAL;
 266         case CSB_CC_DATA_LENGTH:
 267                 /* setup_ddl should have detected this */
 268                 CSB_ERR(csb, "Invalid data length");
 269                 return -EINVAL;
 270         case CSB_CC_WR_TRANSLATION:
 271         case CSB_CC_TRANSLATION:
 272         case CSB_CC_TRANSLATION_DUP1:
 273         case CSB_CC_TRANSLATION_DUP2:
 274         case CSB_CC_TRANSLATION_DUP3:
 275         case CSB_CC_TRANSLATION_DUP4:
 276         case CSB_CC_TRANSLATION_DUP5:
 277         case CSB_CC_TRANSLATION_DUP6:
 278                 /* should not happen, we use physical addrs */
 279                 CSB_ERR_ADDR(csb, "Translation error");
 280                 return -EPROTO;
 281         case CSB_CC_WR_PROTECTION:
 282         case CSB_CC_PROTECTION:
 283         case CSB_CC_PROTECTION_DUP1:
 284         case CSB_CC_PROTECTION_DUP2:
 285         case CSB_CC_PROTECTION_DUP3:
 286         case CSB_CC_PROTECTION_DUP4:
 287         case CSB_CC_PROTECTION_DUP5:
 288         case CSB_CC_PROTECTION_DUP6:
 289                 /* should not happen, we use physical addrs */
 290                 CSB_ERR_ADDR(csb, "Protection error");
 291                 return -EPROTO;
 292         case CSB_CC_PRIVILEGE:
 293                 /* shouldn't happen, we're in HYP mode */
 294                 CSB_ERR(csb, "Insufficient Privilege error");
 295                 return -EPROTO;
 296         case CSB_CC_EXCESSIVE_DDE:
 297                 /* shouldn't happen, setup_ddl doesn't use many dde's */
 298                 CSB_ERR(csb, "Too many DDEs in DDL");
 299                 return -EINVAL;
 300         case CSB_CC_TRANSPORT:
 301         case CSB_CC_INVALID_CRB:        /* P9 or later */
 302                 /* shouldn't happen, we setup CRB correctly */
 303                 CSB_ERR(csb, "Invalid CRB");
 304                 return -EINVAL;
 305         case CSB_CC_INVALID_DDE:        /* P9 or later */
 306                 /*
 307                  * shouldn't happen, setup_direct/indirect_dde creates
 308                  * DDE right
 309                  */
 310                 CSB_ERR(csb, "Invalid DDE");
 311                 return -EINVAL;
 312         case CSB_CC_SEGMENTED_DDL:
 313                 /* shouldn't happen, setup_ddl creates DDL right */
 314                 CSB_ERR(csb, "Segmented DDL error");
 315                 return -EINVAL;
 316         case CSB_CC_DDE_OVERFLOW:
 317                 /* shouldn't happen, setup_ddl creates DDL right */
 318                 CSB_ERR(csb, "DDE overflow error");
 319                 return -EINVAL;
 320         case CSB_CC_SESSION:
 321                 /* should not happen with ICSWX */
 322                 CSB_ERR(csb, "Session violation error");
 323                 return -EPROTO;
 324         case CSB_CC_CHAIN:
 325                 /* should not happen, we don't use chained CRBs */
 326                 CSB_ERR(csb, "Chained CRB error");
 327                 return -EPROTO;
 328         case CSB_CC_SEQUENCE:
 329                 /* should not happen, we don't use chained CRBs */
 330                 CSB_ERR(csb, "CRB sequence number error");
 331                 return -EPROTO;
 332         case CSB_CC_UNKNOWN_CODE:
 333                 CSB_ERR(csb, "Unknown subfunction code");
 334                 return -EPROTO;
 335
 336         /* hardware errors */
 337         case CSB_CC_RD_EXTERNAL:
 338         case CSB_CC_RD_EXTERNAL_DUP1:
 339         case CSB_CC_RD_EXTERNAL_DUP2:
 340         case CSB_CC_RD_EXTERNAL_DUP3:
 341                 CSB_ERR_ADDR(csb, "Read error outside coprocessor");
 342                 return -EPROTO;
 343         case CSB_CC_WR_EXTERNAL:
 344                 CSB_ERR_ADDR(csb, "Write error outside coprocessor");
 345                 return -EPROTO;
 346         case CSB_CC_INTERNAL:
 347                 CSB_ERR(csb, "Internal error in coprocessor");
 348                 return -EPROTO;
 349         case CSB_CC_PROVISION:
 350                 CSB_ERR(csb, "Storage provision error");
 351                 return -EPROTO;
 352         case CSB_CC_HW:
 353                 CSB_ERR(csb, "Correctable hardware error");
 354                 return -EPROTO;
 355         case CSB_CC_HW_EXPIRED_TIMER:   /* P9 or later */
 356                 CSB_ERR(csb, "Job did not finish within allowed time");
 357                 return -EPROTO;
 358
 359         default:
 360                 CSB_ERR(csb, "Invalid CC %d", csb->cc);
 361                 return -EPROTO;
 362         }
 363
 364         /* check Completion Extension state */
 365         if (csb->ce & CSB_CE_TERMINATION) {
 366                 CSB_ERR(csb, "CSB request was terminated");
 367                 return -EPROTO;
 368         }
 369         if (csb->ce & CSB_CE_INCOMPLETE) {
 370                 CSB_ERR(csb, "CSB request not complete");
 371                 return -EPROTO;
 372         }
 373         if (!(csb->ce & CSB_CE_TPBC)) {
 374                 CSB_ERR(csb, "TPBC not provided, unknown target length");
 375                 return -EPROTO;
 376         }
 377
 378         /* successful completion */
 379         pr_debug_ratelimited("Processed %u bytes in %lu us\n",
 380                              be32_to_cpu(csb->count),
 381                              (unsigned long)ktime_us_delta(now, start));
 382
 383         return 0;
 384 }
 385
 386 static int nx842_config_crb(const unsigned char *in, unsigned int inlen,
 387                         unsigned char *out, unsigned int outlen,
 388                         struct nx842_workmem *wmem)
 389 {
 390         struct coprocessor_request_block *crb;
 391         struct coprocessor_status_block *csb;
 392         u64 csb_addr;
 393         int ret;
 394
 395         crb = &wmem->crb;
 396         csb = &crb->csb;
 397
 398         /* Clear any previous values */
 399         memset(crb, 0, sizeof(*crb));
 400
 401         /* set up DDLs */
 402         ret = setup_ddl(&crb->source, wmem->ddl_in,
 403                         (unsigned char *)in, inlen, true);
 404         if (ret)
 405                 return ret;
 406
 407         ret = setup_ddl(&crb->target, wmem->ddl_out,
 408                         out, outlen, false);
 409         if (ret)
 410                 return ret;
 411
 412         /* set up CRB's CSB addr */
 413         csb_addr = nx842_get_pa(csb) & CRB_CSB_ADDRESS;
 414         csb_addr |= CRB_CSB_AT; /* Addrs are phys */
 415         crb->csb_addr = cpu_to_be64(csb_addr);
 416
 417         return 0;
 418 }
 419
 420 /**
 421  * nx842_exec_icswx - compress/decompress data using the 842 algorithm
 422  *
 423  * (De)compression provided by the NX842 coprocessor on IBM PowerNV systems.
 424  * This compresses or decompresses the provided input buffer into the provided
 425  * output buffer.
 426  *
 427  * Upon return from this function @outlen contains the length of the
 428  * output data.  If there is an error then @outlen will be 0 and an
 429  * error will be specified by the return code from this function.
 430  *
 431  * The @workmem buffer should only be used by one function call at a time.
 432  *
 433  * @in: input buffer pointer
 434  * @inlen: input buffer size
 435  * @out: output buffer pointer
 436  * @outlenp: output buffer size pointer
 437  * @workmem: working memory buffer pointer, size determined by
 438  *           nx842_powernv_driver.workmem_size
 439  * @fc: function code, see CCW Function Codes in nx-842.h
 440  *
 441  * Returns:
 442  *   0          Success, output of length @outlenp stored in the buffer at @out
 443  *   -ENODEV    Hardware unavailable
 444  *   -ENOSPC    Output buffer is to small
 445  *   -EMSGSIZE  Input buffer too large
 446  *   -EINVAL    buffer constraints do not fix nx842_constraints
 447  *   -EPROTO    hardware error during operation
 448  *   -ETIMEDOUT hardware did not complete operation in reasonable time
 449  *   -EINTR     operation was aborted
 450  */
 451 static int nx842_exec_icswx(const unsigned char *in, unsigned int inlen,
 452                                   unsigned char *out, unsigned int *outlenp,
 453                                   void *workmem, int fc)
 454 {
 455         struct coprocessor_request_block *crb;
 456         struct coprocessor_status_block *csb;
 457         struct nx842_workmem *wmem;
 458         int ret;
 459         u32 ccw;
 460         unsigned int outlen = *outlenp;
 461
 462         wmem = PTR_ALIGN(workmem, WORKMEM_ALIGN);
 463
 464         *outlenp = 0;
 465
 466         /* shoudn't happen, we don't load without a coproc */
 467         if (!nx842_ct) {
 468                 pr_err_ratelimited("coprocessor CT is 0");
 469                 return -ENODEV;
 470         }
 471
 472         ret = nx842_config_crb(in, inlen, out, outlen, wmem);
 473         if (ret)
 474                 return ret;
 475
 476         crb = &wmem->crb;
 477         csb = &crb->csb;
 478
 479         /* set up CCW */
 480         ccw = 0;
 481         ccw = SET_FIELD(CCW_CT, ccw, nx842_ct);
 482         ccw = SET_FIELD(CCW_CI_842, ccw, 0); /* use 0 for hw auto-selection */
 483         ccw = SET_FIELD(CCW_FC_842, ccw, fc);
 484
 485         wmem->start = ktime_get();
 486
 487         /* do ICSWX */
 488         ret = icswx(cpu_to_be32(ccw), crb);
 489
 490         pr_debug_ratelimited("icswx CR %x ccw %x crb->ccw %x\n", ret,
 491                              (unsigned int)ccw,
 492                              (unsigned int)be32_to_cpu(crb->ccw));
 493
 494         /*
 495          * NX842 coprocessor sets 3rd bit in CR register with XER[S0].
 496          * XER[S0] is the integer summary overflow bit which is nothing
 497          * to do NX. Since this bit can be set with other return values,
 498          * mask this bit.
 499          */
 500         ret &= ~ICSWX_XERS0;
 501
 502         switch (ret) {
 503         case ICSWX_INITIATED:
 504                 ret = wait_for_csb(wmem, csb);
 505                 break;
 506         case ICSWX_BUSY:
 507                 pr_debug_ratelimited("842 Coprocessor busy\n");
 508                 ret = -EBUSY;
 509                 break;
 510         case ICSWX_REJECTED:
 511                 pr_err_ratelimited("ICSWX rejected\n");
 512                 ret = -EPROTO;
 513                 break;
 514         }
 515
 516         if (!ret)
 517                 *outlenp = be32_to_cpu(csb->count);
 518
 519         return ret;
 520 }
 521
 522 /**
 523  * nx842_exec_vas - compress/decompress data using the 842 algorithm
 524  *
 525  * (De)compression provided by the NX842 coprocessor on IBM PowerNV systems.
 526  * This compresses or decompresses the provided input buffer into the provided
 527  * output buffer.
 528  *
 529  * Upon return from this function @outlen contains the length of the
 530  * output data.  If there is an error then @outlen will be 0 and an
 531  * error will be specified by the return code from this function.
 532  *
 533  * The @workmem buffer should only be used by one function call at a time.
 534  *
 535  * @in: input buffer pointer
 536  * @inlen: input buffer size
 537  * @out: output buffer pointer
 538  * @outlenp: output buffer size pointer
 539  * @workmem: working memory buffer pointer, size determined by
 540  *           nx842_powernv_driver.workmem_size
 541  * @fc: function code, see CCW Function Codes in nx-842.h
 542  *
 543  * Returns:
 544  *   0          Success, output of length @outlenp stored in the buffer
 545  *              at @out
 546  *   -ENODEV    Hardware unavailable
 547  *   -ENOSPC    Output buffer is to small
 548  *   -EMSGSIZE  Input buffer too large
 549  *   -EINVAL    buffer constraints do not fix nx842_constraints
 550  *   -EPROTO    hardware error during operation
 551  *   -ETIMEDOUT hardware did not complete operation in reasonable time
 552  *   -EINTR     operation was aborted
 553  */
 554 static int nx842_exec_vas(const unsigned char *in, unsigned int inlen,
 555                                   unsigned char *out, unsigned int *outlenp,
 556                                   void *workmem, int fc)
 557 {
 558         struct coprocessor_request_block *crb;
 559         struct coprocessor_status_block *csb;
 560         struct nx842_workmem *wmem;
 561         struct vas_window *txwin;
 562         int ret, i = 0;
 563         u32 ccw;
 564         unsigned int outlen = *outlenp;
 565
 566         wmem = PTR_ALIGN(workmem, WORKMEM_ALIGN);
 567
 568         *outlenp = 0;
 569
 570         crb = &wmem->crb;
 571         csb = &crb->csb;
 572
 573         ret = nx842_config_crb(in, inlen, out, outlen, wmem);
 574         if (ret)
 575                 return ret;
 576
 577         ccw = 0;
 578         ccw = SET_FIELD(CCW_FC_842, ccw, fc);
 579         crb->ccw = cpu_to_be32(ccw);
 580
 581         do {
 582                 wmem->start = ktime_get();
 583                 preempt_disable();
 584                 txwin = this_cpu_read(cpu_txwin);
 585
 586                 /*
 587                  * VAS copy CRB into L2 cache. Refer <asm/vas.h>.
 588                  * @crb and @offset.
 589                  */
 590                 vas_copy_crb(crb, 0);
 591
 592                 /*
 593                  * VAS paste previously copied CRB to NX.
 594                  * @txwin, @offset and @last (must be true).
 595                  */
 596                 ret = vas_paste_crb(txwin, 0, 1);
 597                 preempt_enable();
 598                 /*
 599                  * Retry copy/paste function for VAS failures.
 600                  */
 601         } while (ret && (i++ < VAS_RETRIES));
 602
 603         if (ret) {
 604                 pr_err_ratelimited("VAS copy/paste failed\n");
 605                 return ret;
 606         }
 607
 608         ret = wait_for_csb(wmem, csb);
 609         if (!ret)
 610                 *outlenp = be32_to_cpu(csb->count);
 611
 612         return ret;
 613 }
 614
 615 /**
 616  * nx842_powernv_compress - Compress data using the 842 algorithm
 617  *
 618  * Compression provided by the NX842 coprocessor on IBM PowerNV systems.
 619  * The input buffer is compressed and the result is stored in the
 620  * provided output buffer.
 621  *
 622  * Upon return from this function @outlen contains the length of the
 623  * compressed data.  If there is an error then @outlen will be 0 and an
 624  * error will be specified by the return code from this function.
 625  *
 626  * @in: input buffer pointer
 627  * @inlen: input buffer size
 628  * @out: output buffer pointer
 629  * @outlenp: output buffer size pointer
 630  * @workmem: working memory buffer pointer, size determined by
 631  *           nx842_powernv_driver.workmem_size
 632  *
 633  * Returns: see @nx842_powernv_exec()
 634  */
 635 static int nx842_powernv_compress(const unsigned char *in, unsigned int inlen,
 636                                   unsigned char *out, unsigned int *outlenp,
 637                                   void *wmem)
 638 {
 639         return nx842_powernv_exec(in, inlen, out, outlenp,
 640                                       wmem, CCW_FC_842_COMP_CRC);
 641 }
 642
 643 /**
 644  * nx842_powernv_decompress - Decompress data using the 842 algorithm
 645  *
 646  * Decompression provided by the NX842 coprocessor on IBM PowerNV systems.
 647  * The input buffer is decompressed and the result is stored in the
 648  * provided output buffer.
 649  *
 650  * Upon return from this function @outlen contains the length of the
 651  * decompressed data.  If there is an error then @outlen will be 0 and an
 652  * error will be specified by the return code from this function.
 653  *
 654  * @in: input buffer pointer
 655  * @inlen: input buffer size
 656  * @out: output buffer pointer
 657  * @outlenp: output buffer size pointer
 658  * @workmem: working memory buffer pointer, size determined by
 659  *           nx842_powernv_driver.workmem_size
 660  *
 661  * Returns: see @nx842_powernv_exec()
 662  */
 663 static int nx842_powernv_decompress(const unsigned char *in, unsigned int inlen,
 664                                     unsigned char *out, unsigned int *outlenp,
 665                                     void *wmem)
 666 {
 667         return nx842_powernv_exec(in, inlen, out, outlenp,
 668                                       wmem, CCW_FC_842_DECOMP_CRC);
 669 }
 670
 671 static inline void nx842_add_coprocs_list(struct nx842_coproc *coproc,
 672                                         int chipid)
 673 {
 674         coproc->chip_id = chipid;
 675         INIT_LIST_HEAD(&coproc->list);
 676         list_add(&coproc->list, &nx842_coprocs);
 677 }
 678
 679 static struct vas_window *nx842_alloc_txwin(struct nx842_coproc *coproc)
 680 {
 681         struct vas_window *txwin = NULL;
 682         struct vas_tx_win_attr txattr;
 683
 684         /*
 685          * Kernel requests will be high priority. So open send
 686          * windows only for high priority RxFIFO entries.
 687          */
 688         vas_init_tx_win_attr(&txattr, coproc->ct);
 689         txattr.lpid = 0;        /* lpid is 0 for kernel requests */
 690         txattr.pid = 0;         /* pid is 0 for kernel requests */
 691
 692         /*
 693          * Open a VAS send window which is used to send request to NX.
 694          */
 695         txwin = vas_tx_win_open(coproc->vas.id, coproc->ct, &txattr);
 696         if (IS_ERR(txwin))
 697                 pr_err("ibm,nx-842: Can not open TX window: %ld\n",
 698                                 PTR_ERR(txwin));
 699
 700         return txwin;
 701 }
 702
 703 /*
 704  * Identify chip ID for each CPU, open send wndow for the corresponding NX
 705  * engine and save txwin in percpu cpu_txwin.
 706  * cpu_txwin is used in copy/paste operation for each compression /
 707  * decompression request.
 708  */
 709 static int nx842_open_percpu_txwins(void)
 710 {
 711         struct nx842_coproc *coproc, *n;
 712         unsigned int i, chip_id;
 713
 714         for_each_possible_cpu(i) {
 715                 struct vas_window *txwin = NULL;
 716
 717                 chip_id = cpu_to_chip_id(i);
 718
 719                 list_for_each_entry_safe(coproc, n, &nx842_coprocs, list) {
 720                         /*
 721                          * Kernel requests use only high priority FIFOs. So
 722                          * open send windows for these FIFOs.
 723                          */
 724
 725                         if (coproc->ct != VAS_COP_TYPE_842_HIPRI)
 726                                 continue;
 727
 728                         if (coproc->chip_id == chip_id) {
 729                                 txwin = nx842_alloc_txwin(coproc);
 730                                 if (IS_ERR(txwin))
 731                                         return PTR_ERR(txwin);
 732
 733                                 per_cpu(cpu_txwin, i) = txwin;
 734                                 break;
 735                         }
 736                 }
 737
 738                 if (!per_cpu(cpu_txwin, i)) {
 739                         /* shouldn't happen, Each chip will have NX engine */
 740                         pr_err("NX engine is not available for CPU %d\n", i);
 741                         return -EINVAL;
 742                 }
 743         }
 744
 745         return 0;
 746 }
 747
 748 static int __init vas_cfg_coproc_info(struct device_node *dn, int chip_id,
 749                                         int vasid, int *ct)
 750 {
 751         struct vas_window *rxwin = NULL;
 752         struct vas_rx_win_attr rxattr;
 753         struct nx842_coproc *coproc;
 754         u32 lpid, pid, tid, fifo_size;
 755         u64 rx_fifo;
 756         const char *priority;
 757         int ret;
 758
 759         ret = of_property_read_u64(dn, "rx-fifo-address", &rx_fifo);
 760         if (ret) {
 761                 pr_err("Missing rx-fifo-address property\n");
 762                 return ret;
 763         }
 764
 765         ret = of_property_read_u32(dn, "rx-fifo-size", &fifo_size);
 766         if (ret) {
 767                 pr_err("Missing rx-fifo-size property\n");
 768                 return ret;
 769         }
 770
 771         ret = of_property_read_u32(dn, "lpid", &lpid);
 772         if (ret) {
 773                 pr_err("Missing lpid property\n");
 774                 return ret;
 775         }
 776
 777         ret = of_property_read_u32(dn, "pid", &pid);
 778         if (ret) {
 779                 pr_err("Missing pid property\n");
 780                 return ret;
 781         }
 782
 783         ret = of_property_read_u32(dn, "tid", &tid);
 784         if (ret) {
 785                 pr_err("Missing tid property\n");
 786                 return ret;
 787         }
 788
 789         ret = of_property_read_string(dn, "priority", &priority);
 790         if (ret) {
 791                 pr_err("Missing priority property\n");
 792                 return ret;
 793         }
 794
 795         coproc = kzalloc(sizeof(*coproc), GFP_KERNEL);
 796         if (!coproc)
 797                 return -ENOMEM;
 798
 799         if (!strcmp(priority, "High"))
 800                 coproc->ct = VAS_COP_TYPE_842_HIPRI;
 801         else if (!strcmp(priority, "Normal"))
 802                 coproc->ct = VAS_COP_TYPE_842;
 803         else {
 804                 pr_err("Invalid RxFIFO priority value\n");
 805                 ret =  -EINVAL;
 806                 goto err_out;
 807         }
 808
 809         vas_init_rx_win_attr(&rxattr, coproc->ct);
 810         rxattr.rx_fifo = (void *)rx_fifo;
 811         rxattr.rx_fifo_size = fifo_size;
 812         rxattr.lnotify_lpid = lpid;
 813         rxattr.lnotify_pid = pid;
 814         rxattr.lnotify_tid = tid;
 815         rxattr.wcreds_max = MAX_CREDITS_PER_RXFIFO;
 816
 817         /*
 818          * Open a VAS receice window which is used to configure RxFIFO
 819          * for NX.
 820          */
 821         rxwin = vas_rx_win_open(vasid, coproc->ct, &rxattr);
 822         if (IS_ERR(rxwin)) {
 823                 ret = PTR_ERR(rxwin);
 824                 pr_err("setting RxFIFO with VAS failed: %d\n",
 825                         ret);
 826                 goto err_out;
 827         }
 828
 829         coproc->vas.rxwin = rxwin;
 830         coproc->vas.id = vasid;
 831         nx842_add_coprocs_list(coproc, chip_id);
 832
 833         /*
 834          * (lpid, pid, tid) combination has to be unique for each
 835          * coprocessor instance in the system. So to make it
 836          * unique, skiboot uses coprocessor type such as 842 or
 837          * GZIP for pid and provides this value to kernel in pid
 838          * device-tree property.
 839          */
 840         *ct = pid;
 841
 842         return 0;
 843
 844 err_out:
 845         kfree(coproc);
 846         return ret;
 847 }
 848
 849
 850 static int __init nx842_powernv_probe_vas(struct device_node *pn)
 851 {
 852         struct device_node *dn;
 853         int chip_id, vasid, ret = 0;
 854         int nx_fifo_found = 0;
 855         int uninitialized_var(ct);
 856
 857         chip_id = of_get_ibm_chip_id(pn);
 858         if (chip_id < 0) {
 859                 pr_err("ibm,chip-id missing\n");
 860                 return -EINVAL;
 861         }
 862
 863         vasid = chip_to_vas_id(chip_id);
 864         if (vasid < 0) {
 865                 pr_err("Unable to map chip_id %d to vasid\n", chip_id);
 866                 return -EINVAL;
 867         }
 868
 869         for_each_child_of_node(pn, dn) {
 870                 if (of_device_is_compatible(dn, "ibm,p9-nx-842")) {
 871                         ret = vas_cfg_coproc_info(dn, chip_id, vasid, &ct);
 872                         if (ret) {
 873                                 of_node_put(dn);
 874                                 return ret;
 875                         }
 876                         nx_fifo_found++;
 877                 }
 878         }
 879
 880         if (!nx_fifo_found) {
 881                 pr_err("NX842 FIFO nodes are missing\n");
 882                 return -EINVAL;
 883         }
 884
 885         /*
 886          * Initialize NX instance for both high and normal priority FIFOs.
 887          */
 888         if (opal_check_token(OPAL_NX_COPROC_INIT)) {
 889                 ret = opal_nx_coproc_init(chip_id, ct);
 890                 if (ret) {
 891                         pr_err("Failed to initialize NX for chip(%d): %d\n",
 892                                 chip_id, ret);
 893                         ret = opal_error_code(ret);
 894                 }
 895         } else
 896                 pr_warn("Firmware doesn't support NX initialization\n");
 897
 898         return ret;
 899 }
 900
 901 static int __init nx842_powernv_probe(struct device_node *dn)
 902 {
 903         struct nx842_coproc *coproc;
 904         unsigned int ct, ci;
 905         int chip_id;
 906
 907         chip_id = of_get_ibm_chip_id(dn);
 908         if (chip_id < 0) {
 909                 pr_err("ibm,chip-id missing\n");
 910                 return -EINVAL;
 911         }
 912
 913         if (of_property_read_u32(dn, "ibm,842-coprocessor-type", &ct)) {
 914                 pr_err("ibm,842-coprocessor-type missing\n");
 915                 return -EINVAL;
 916         }
 917
 918         if (of_property_read_u32(dn, "ibm,842-coprocessor-instance", &ci)) {
 919                 pr_err("ibm,842-coprocessor-instance missing\n");
 920                 return -EINVAL;
 921         }
 922
 923         coproc = kmalloc(sizeof(*coproc), GFP_KERNEL);
 924         if (!coproc)
 925                 return -ENOMEM;
 926
 927         coproc->ct = ct;
 928         coproc->ci = ci;
 929         nx842_add_coprocs_list(coproc, chip_id);
 930
 931         pr_info("coprocessor found on chip %d, CT %d CI %d\n", chip_id, ct, ci);
 932
 933         if (!nx842_ct)
 934                 nx842_ct = ct;
 935         else if (nx842_ct != ct)
 936                 pr_err("NX842 chip %d, CT %d != first found CT %d\n",
 937                        chip_id, ct, nx842_ct);
 938
 939         return 0;
 940 }
 941
 942 static void nx842_delete_coprocs(void)
 943 {
 944         struct nx842_coproc *coproc, *n;
 945         struct vas_window *txwin;
 946         int i;
 947
 948         /*
 949          * close percpu txwins that are opened for the corresponding coproc.
 950          */
 951         for_each_possible_cpu(i) {
 952                 txwin = per_cpu(cpu_txwin, i);
 953                 if (txwin)
 954                         vas_win_close(txwin);
 955
 956                 per_cpu(cpu_txwin, i) = 0;
 957         }
 958
 959         list_for_each_entry_safe(coproc, n, &nx842_coprocs, list) {
 960                 if (coproc->vas.rxwin)
 961                         vas_win_close(coproc->vas.rxwin);
 962
 963                 list_del(&coproc->list);
 964                 kfree(coproc);
 965         }
 966 }
 967
 968 static struct nx842_constraints nx842_powernv_constraints = {
 969         .alignment =    DDE_BUFFER_ALIGN,
 970         .multiple =     DDE_BUFFER_LAST_MULT,
 971         .minimum =      DDE_BUFFER_LAST_MULT,
 972         .maximum =      (DDL_LEN_MAX - 1) * PAGE_SIZE,
 973 };
 974
 975 static struct nx842_driver nx842_powernv_driver = {
 976         .name =         KBUILD_MODNAME,
 977         .owner =        THIS_MODULE,
 978         .workmem_size = sizeof(struct nx842_workmem),
 979         .constraints =  &nx842_powernv_constraints,
 980         .compress =     nx842_powernv_compress,
 981         .decompress =   nx842_powernv_decompress,
 982 };
 983
 984 static int nx842_powernv_crypto_init(struct crypto_tfm *tfm)
 985 {
 986         return nx842_crypto_init(tfm, &nx842_powernv_driver);
 987 }
 988
 989 static struct crypto_alg nx842_powernv_alg = {
 990         .cra_name               = "842",
 991         .cra_driver_name        = "842-nx",
 992         .cra_priority           = 300,
 993         .cra_flags              = CRYPTO_ALG_TYPE_COMPRESS,
 994         .cra_ctxsize            = sizeof(struct nx842_crypto_ctx),
 995         .cra_module             = THIS_MODULE,
 996         .cra_init               = nx842_powernv_crypto_init,
 997         .cra_exit               = nx842_crypto_exit,
 998         .cra_u                  = { .compress = {
 999         .coa_compress           = nx842_crypto_compress,
1000         .coa_decompress         = nx842_crypto_decompress } }
1001 };
1002
1003 static __init int nx842_powernv_init(void)
1004 {
1005         struct device_node *dn;
1006         int ret;
1007
1008         /* verify workmem size/align restrictions */
1009         BUILD_BUG_ON(WORKMEM_ALIGN % CRB_ALIGN);
1010         BUILD_BUG_ON(CRB_ALIGN % DDE_ALIGN);
1011         BUILD_BUG_ON(CRB_SIZE % DDE_ALIGN);
1012         /* verify buffer size/align restrictions */
1013         BUILD_BUG_ON(PAGE_SIZE % DDE_BUFFER_ALIGN);
1014         BUILD_BUG_ON(DDE_BUFFER_ALIGN % DDE_BUFFER_SIZE_MULT);
1015         BUILD_BUG_ON(DDE_BUFFER_SIZE_MULT % DDE_BUFFER_LAST_MULT);
1016
1017         for_each_compatible_node(dn, NULL, "ibm,power9-nx") {
1018                 ret = nx842_powernv_probe_vas(dn);
1019                 if (ret) {
1020                         nx842_delete_coprocs();
1021                         return ret;
1022                 }
1023         }
1024
1025         if (list_empty(&nx842_coprocs)) {
1026                 for_each_compatible_node(dn, NULL, "ibm,power-nx")
1027                         nx842_powernv_probe(dn);
1028
1029                 if (!nx842_ct)
1030                         return -ENODEV;
1031
1032                 nx842_powernv_exec = nx842_exec_icswx;
1033         } else {
1034                 ret = nx842_open_percpu_txwins();
1035                 if (ret) {
1036                         nx842_delete_coprocs();
1037                         return ret;
1038                 }
1039
1040                 nx842_powernv_exec = nx842_exec_vas;
1041         }
1042
1043         ret = crypto_register_alg(&nx842_powernv_alg);
1044         if (ret) {
1045                 nx842_delete_coprocs();
1046                 return ret;
1047         }
1048
1049         return 0;
1050 }
1051 module_init(nx842_powernv_init);
1052
1053 static void __exit nx842_powernv_exit(void)
1054 {
1055         crypto_unregister_alg(&nx842_powernv_alg);
1056
1057         nx842_delete_coprocs();
1058 }
1059 module_exit(nx842_powernv_exit);