drivers/gpio/Kconfig

   1 #
   2 # GPIO infrastructure and drivers
   3 #
   4
   5 menu "GPIO Support"
   6
   7 config DM_GPIO
   8         bool "Enable Driver Model for GPIO drivers"
   9         depends on DM
  10         help
  11           Enable driver model for GPIO access. The standard GPIO
  12           interface (gpio_get_value(), etc.) is then implemented by
  13           the GPIO uclass. Drivers provide methods to query the
  14           particular GPIOs that they provide. The uclass interface
  15           is defined in include/asm-generic/gpio.h.
  16
  17 config ALTERA_PIO
  18         bool "Altera PIO driver"
  19         depends on DM_GPIO
  20         help
  21           Select this to enable PIO for Altera devices. Please find
  22           details on the "Embedded Peripherals IP User Guide" of Altera.
  23
  24 config DWAPB_GPIO
  25         bool "DWAPB GPIO driver"
  26         depends on DM && DM_GPIO
  27         default n
  28         help
  29           Support for the Designware APB GPIO driver.
  30
  31 config ATMEL_PIO4
  32         bool "ATMEL PIO4 driver"
  33         depends on DM
  34         default n
  35         help
  36           Say yes here to support the Atmel PIO4 driver.
  37           The PIO4 is new version of Atmel PIO controller, which manages
  38           up to 128 fully programmable input/output lines. Each I/O line
  39           may be dedicated as a general purpose I/O or be assigned to
  40           a function of an embedded peripheral.
  41
  42 config INTEL_BROADWELL_GPIO
  43         bool "Intel Broadwell GPIO driver"
  44         depends on DM
  45         help
  46           This driver supports Broadwell U devices which have an expanded
  47           GPIO feature set. The difference is large enough to merit a separate
  48           driver from the common Intel ICH6 driver. It supports a total of
  49           95 GPIOs which can be configured from the device tree.
  50
  51 config LPC32XX_GPIO
  52         bool "LPC32XX GPIO driver"
  53         depends on DM
  54         default n
  55         help
  56           Support for the LPC32XX GPIO driver.
  57
  58 config MSM_GPIO
  59         bool "Qualcomm GPIO driver"
  60         depends on DM_GPIO
  61         default n
  62         help
  63           Support GPIO controllers on Qualcomm Snapdragon family of SoCs.
  64           This controller have single bank (default name "soc"), every
  65           gpio has it's own set of registers.
  66           Only simple GPIO operations are supported (get/set, change of
  67           direction and checking pin function).
  68           Supported devices:
  69           - APQ8016
  70           - MSM8916
  71
  72 config PM8916_GPIO
  73         bool "Qualcomm PM8916 PMIC GPIO/keypad driver"
  74         depends on DM_GPIO && PMIC_PM8916
  75         help
  76           Support for GPIO pins and power/reset buttons found on
  77           Qualcomm PM8916 PMIC.
  78           Default name for GPIO bank is "pm8916".
  79           Power and reset buttons are placed in "pm8916_key" bank and
  80           have gpio numbers 0 and 1 respectively.
  81
  82 config PCF8575_GPIO
  83         bool "PCF8575 I2C GPIO Expander driver"
  84         depends on DM_GPIO && DM_I2C
  85         help
  86          Support for PCF8575 I2C 16-bit GPIO expander. Most of these
  87          chips are from NXP and TI.
  88
  89 config ROCKCHIP_GPIO
  90         bool "Rockchip GPIO driver"
  91         depends on DM_GPIO
  92         help
  93           Support GPIO access on Rockchip SoCs. The GPIOs are arranged into
  94           a number of banks (different for each SoC type) each with 32 GPIOs.
  95           The GPIOs for a device are defined in the device tree with one node
  96           for each bank.
  97
  98 config SANDBOX_GPIO
  99         bool "Enable sandbox GPIO driver"
 100         depends on SANDBOX && DM && DM_GPIO
 101         help
 102           This driver supports some simulated GPIOs which can be adjusted
 103           using 'back door' functions like sandbox_gpio_set_value(). Then the
 104           GPIOs can be inspected through the normal get_get_value()
 105           interface. The purpose of this is to allow GPIOs to be used as
 106           normal in sandbox, perhaps with test code actually driving the
 107           behaviour of those GPIOs.
 108
 109 config SANDBOX_GPIO_COUNT
 110         int "Number of sandbox GPIOs"
 111         depends on SANDBOX_GPIO
 112         default 128
 113         help
 114           The sandbox driver can support any number of GPIOs. Generally these
 115           are specified using the device tree. But you can also have a number
 116           of 'anonymous' GPIOs that do not belong to any device or bank.
 117           Select a suitable value depending on your needs.
 118
 119 config TEGRA_GPIO
 120         bool "Tegra20..210 GPIO driver"
 121         depends on DM_GPIO
 122         help
 123           Support for the GPIO controller contained in NVIDIA Tegra20 through
 124           Tegra210.
 125
 126 config TEGRA186_GPIO
 127         bool "Tegra186 GPIO driver"
 128         depends on DM_GPIO
 129         help
 130           Support for the GPIO controller contained in NVIDIA Tegra186. This
 131           covers both the "main" and "AON" controller instances, even though
 132           they have slightly different register layout.
 133
 134 config GPIO_UNIPHIER
 135         bool "UniPhier GPIO"
 136         depends on ARCH_UNIPHIER
 137         help
 138           Say yes here to support UniPhier GPIOs.
 139
 140 config VYBRID_GPIO
 141         bool "Vybrid GPIO driver"
 142         depends on DM
 143         default n
 144         help
 145           Say yes here to support Vybrid vf610 GPIOs.
 146
 147 config PIC32_GPIO
 148         bool "Microchip PIC32 GPIO driver"
 149         depends on DM_GPIO && MACH_PIC32
 150         default y
 151         help
 152           Say yes here to support Microchip PIC32 GPIOs.
 153
 154 config MVEBU_GPIO
 155         bool "Marvell MVEBU GPIO driver"
 156         depends on DM_GPIO && ARCH_MVEBU
 157         default y
 158         help
 159           Say yes here to support Marvell MVEBU (Armada XP/38x) GPIOs.
 160
 161 config ZYNQ_GPIO
 162         bool "Zynq GPIO driver"
 163         depends on DM_GPIO && (ARCH_ZYNQ || ARCH_ZYNQMP)
 164         default y
 165         help
 166           Supports GPIO access on Zynq SoC.
 167
 168 config DM_74X164
 169         bool "74x164 serial-in/parallel-out 8-bits shift register"
 170         depends on DM_GPIO
 171         help
 172           Driver for 74x164 compatible serial-in/parallel-out 8-outputs
 173           shift registers, such as 74lv165, 74hc595.
 174           This driver can be used to provide access to more gpio outputs.
 175
 176 config DM_PCA953X
 177         bool "PCA95[357]x, PCA9698, TCA64xx, and MAX7310 I/O ports"
 178         depends on DM_GPIO
 179         help
 180           Say yes here to provide access to several register-oriented
 181           SMBus I/O expanders, made mostly by NXP or TI.  Compatible
 182           models include:
 183
 184           4 bits:       pca9536, pca9537
 185
 186           8 bits:       max7310, max7315, pca6107, pca9534, pca9538, pca9554,
 187                         pca9556, pca9557, pca9574, tca6408, xra1202
 188
 189           16 bits:      max7312, max7313, pca9535, pca9539, pca9555, pca9575,
 190                         tca6416
 191
 192           24 bits:      tca6424
 193
 194           40 bits:      pca9505, pca9698
 195
 196           Now, max 24 bits chips and PCA953X compatible chips are
 197           supported
 198
 199 config MPC85XX_GPIO
 200         bool "Freescale MPC85XX GPIO driver"
 201         depends on DM_GPIO
 202         help
 203           This driver supports the built-in GPIO controller of MPC85XX CPUs.
 204           Each GPIO bank is identified by its own entry in the device tree,
 205           i.e.
 206
 207           gpio-controller@fc00 {
 208                 #gpio-cells = <2>;
 209                 compatible = "fsl,pq3-gpio";
 210                 reg = <0xfc00 0x100>
 211           }
 212
 213           By default, each bank is assumed to have 32 GPIOs, but the ngpios
 214           setting is honored, so the number of GPIOs for each bank is
 215           configurable to match the actual GPIO count of the SoC (e.g. the
 216           32/32/23 banks of the P1022 SoC).
 217
 218           Aside from the standard functions of input/output mode, and output
 219           value setting, the open-drain feature, which can configure individual
 220           GPIOs to work as open-drain outputs, is supported.
 221
 222           The driver has been tested on MPC85XX, but it is likely that other
 223           PowerQUICC III devices will work as well.
 224 endmenu