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Merge tag 'io_uring-5.7-2020-05-22' of git://git.kernel.dk/linux-block
[thirdparty/linux.git] / drivers / gpio / gpio-pca953x.c
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * PCA953x 4/8/16/24/40 bit I/O ports
4 *
5 * Copyright (C) 2005 Ben Gardner <bgardner@wabtec.com>
6 * Copyright (C) 2007 Marvell International Ltd.
7 *
8 * Derived from drivers/i2c/chips/pca9539.c
9 */
10
11 #include <linux/acpi.h>
12 #include <linux/bitmap.h>
13 #include <linux/gpio/driver.h>
14 #include <linux/gpio/consumer.h>
15 #include <linux/i2c.h>
16 #include <linux/init.h>
17 #include <linux/interrupt.h>
18 #include <linux/module.h>
19 #include <linux/of_platform.h>
20 #include <linux/platform_data/pca953x.h>
21 #include <linux/regmap.h>
22 #include <linux/regulator/consumer.h>
23 #include <linux/slab.h>
24
25 #include <asm/unaligned.h>
26
27 #define PCA953X_INPUT 0x00
28 #define PCA953X_OUTPUT 0x01
29 #define PCA953X_INVERT 0x02
30 #define PCA953X_DIRECTION 0x03
31
32 #define REG_ADDR_MASK GENMASK(5, 0)
33 #define REG_ADDR_EXT BIT(6)
34 #define REG_ADDR_AI BIT(7)
35
36 #define PCA957X_IN 0x00
37 #define PCA957X_INVRT 0x01
38 #define PCA957X_BKEN 0x02
39 #define PCA957X_PUPD 0x03
40 #define PCA957X_CFG 0x04
41 #define PCA957X_OUT 0x05
42 #define PCA957X_MSK 0x06
43 #define PCA957X_INTS 0x07
44
45 #define PCAL953X_OUT_STRENGTH 0x20
46 #define PCAL953X_IN_LATCH 0x22
47 #define PCAL953X_PULL_EN 0x23
48 #define PCAL953X_PULL_SEL 0x24
49 #define PCAL953X_INT_MASK 0x25
50 #define PCAL953X_INT_STAT 0x26
51 #define PCAL953X_OUT_CONF 0x27
52
53 #define PCAL6524_INT_EDGE 0x28
54 #define PCAL6524_INT_CLR 0x2a
55 #define PCAL6524_IN_STATUS 0x2b
56 #define PCAL6524_OUT_INDCONF 0x2c
57 #define PCAL6524_DEBOUNCE 0x2d
58
59 #define PCA_GPIO_MASK GENMASK(7, 0)
60
61 #define PCAL_GPIO_MASK GENMASK(4, 0)
62 #define PCAL_PINCTRL_MASK GENMASK(6, 5)
63
64 #define PCA_INT BIT(8)
65 #define PCA_PCAL BIT(9)
66 #define PCA_LATCH_INT (PCA_PCAL | PCA_INT)
67 #define PCA953X_TYPE BIT(12)
68 #define PCA957X_TYPE BIT(13)
69 #define PCA_TYPE_MASK GENMASK(15, 12)
70
71 #define PCA_CHIP_TYPE(x) ((x) & PCA_TYPE_MASK)
72
73 static const struct i2c_device_id pca953x_id[] = {
74 { "pca6416", 16 | PCA953X_TYPE | PCA_INT, },
75 { "pca9505", 40 | PCA953X_TYPE | PCA_INT, },
76 { "pca9534", 8 | PCA953X_TYPE | PCA_INT, },
77 { "pca9535", 16 | PCA953X_TYPE | PCA_INT, },
78 { "pca9536", 4 | PCA953X_TYPE, },
79 { "pca9537", 4 | PCA953X_TYPE | PCA_INT, },
80 { "pca9538", 8 | PCA953X_TYPE | PCA_INT, },
81 { "pca9539", 16 | PCA953X_TYPE | PCA_INT, },
82 { "pca9554", 8 | PCA953X_TYPE | PCA_INT, },
83 { "pca9555", 16 | PCA953X_TYPE | PCA_INT, },
84 { "pca9556", 8 | PCA953X_TYPE, },
85 { "pca9557", 8 | PCA953X_TYPE, },
86 { "pca9574", 8 | PCA957X_TYPE | PCA_INT, },
87 { "pca9575", 16 | PCA957X_TYPE | PCA_INT, },
88 { "pca9698", 40 | PCA953X_TYPE, },
89
90 { "pcal6416", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
91 { "pcal6524", 24 | PCA953X_TYPE | PCA_LATCH_INT, },
92 { "pcal9555a", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
93
94 { "max7310", 8 | PCA953X_TYPE, },
95 { "max7312", 16 | PCA953X_TYPE | PCA_INT, },
96 { "max7313", 16 | PCA953X_TYPE | PCA_INT, },
97 { "max7315", 8 | PCA953X_TYPE | PCA_INT, },
98 { "max7318", 16 | PCA953X_TYPE | PCA_INT, },
99 { "pca6107", 8 | PCA953X_TYPE | PCA_INT, },
100 { "tca6408", 8 | PCA953X_TYPE | PCA_INT, },
101 { "tca6416", 16 | PCA953X_TYPE | PCA_INT, },
102 { "tca6424", 24 | PCA953X_TYPE | PCA_INT, },
103 { "tca9539", 16 | PCA953X_TYPE | PCA_INT, },
104 { "tca9554", 8 | PCA953X_TYPE | PCA_INT, },
105 { "xra1202", 8 | PCA953X_TYPE },
106 { }
107 };
108 MODULE_DEVICE_TABLE(i2c, pca953x_id);
109
110 static const struct acpi_device_id pca953x_acpi_ids[] = {
111 { "INT3491", 16 | PCA953X_TYPE | PCA_LATCH_INT, },
112 { }
113 };
114 MODULE_DEVICE_TABLE(acpi, pca953x_acpi_ids);
115
116 #define MAX_BANK 5
117 #define BANK_SZ 8
118 #define MAX_LINE (MAX_BANK * BANK_SZ)
119
120 #define NBANK(chip) DIV_ROUND_UP(chip->gpio_chip.ngpio, BANK_SZ)
121
122 struct pca953x_reg_config {
123 int direction;
124 int output;
125 int input;
126 int invert;
127 };
128
129 static const struct pca953x_reg_config pca953x_regs = {
130 .direction = PCA953X_DIRECTION,
131 .output = PCA953X_OUTPUT,
132 .input = PCA953X_INPUT,
133 .invert = PCA953X_INVERT,
134 };
135
136 static const struct pca953x_reg_config pca957x_regs = {
137 .direction = PCA957X_CFG,
138 .output = PCA957X_OUT,
139 .input = PCA957X_IN,
140 .invert = PCA957X_INVRT,
141 };
142
143 struct pca953x_chip {
144 unsigned gpio_start;
145 struct mutex i2c_lock;
146 struct regmap *regmap;
147
148 #ifdef CONFIG_GPIO_PCA953X_IRQ
149 struct mutex irq_lock;
150 DECLARE_BITMAP(irq_mask, MAX_LINE);
151 DECLARE_BITMAP(irq_stat, MAX_LINE);
152 DECLARE_BITMAP(irq_trig_raise, MAX_LINE);
153 DECLARE_BITMAP(irq_trig_fall, MAX_LINE);
154 struct irq_chip irq_chip;
155 #endif
156 atomic_t wakeup_path;
157
158 struct i2c_client *client;
159 struct gpio_chip gpio_chip;
160 const char *const *names;
161 unsigned long driver_data;
162 struct regulator *regulator;
163
164 const struct pca953x_reg_config *regs;
165 };
166
167 static int pca953x_bank_shift(struct pca953x_chip *chip)
168 {
169 return fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
170 }
171
172 #define PCA953x_BANK_INPUT BIT(0)
173 #define PCA953x_BANK_OUTPUT BIT(1)
174 #define PCA953x_BANK_POLARITY BIT(2)
175 #define PCA953x_BANK_CONFIG BIT(3)
176
177 #define PCA957x_BANK_INPUT BIT(0)
178 #define PCA957x_BANK_POLARITY BIT(1)
179 #define PCA957x_BANK_BUSHOLD BIT(2)
180 #define PCA957x_BANK_CONFIG BIT(4)
181 #define PCA957x_BANK_OUTPUT BIT(5)
182
183 #define PCAL9xxx_BANK_IN_LATCH BIT(8 + 2)
184 #define PCAL9xxx_BANK_PULL_EN BIT(8 + 3)
185 #define PCAL9xxx_BANK_PULL_SEL BIT(8 + 4)
186 #define PCAL9xxx_BANK_IRQ_MASK BIT(8 + 5)
187 #define PCAL9xxx_BANK_IRQ_STAT BIT(8 + 6)
188
189 /*
190 * We care about the following registers:
191 * - Standard set, below 0x40, each port can be replicated up to 8 times
192 * - PCA953x standard
193 * Input port 0x00 + 0 * bank_size R
194 * Output port 0x00 + 1 * bank_size RW
195 * Polarity Inversion port 0x00 + 2 * bank_size RW
196 * Configuration port 0x00 + 3 * bank_size RW
197 * - PCA957x with mixed up registers
198 * Input port 0x00 + 0 * bank_size R
199 * Polarity Inversion port 0x00 + 1 * bank_size RW
200 * Bus hold port 0x00 + 2 * bank_size RW
201 * Configuration port 0x00 + 4 * bank_size RW
202 * Output port 0x00 + 5 * bank_size RW
203 *
204 * - Extended set, above 0x40, often chip specific.
205 * - PCAL6524/PCAL9555A with custom PCAL IRQ handling:
206 * Input latch register 0x40 + 2 * bank_size RW
207 * Pull-up/pull-down enable reg 0x40 + 3 * bank_size RW
208 * Pull-up/pull-down select reg 0x40 + 4 * bank_size RW
209 * Interrupt mask register 0x40 + 5 * bank_size RW
210 * Interrupt status register 0x40 + 6 * bank_size R
211 *
212 * - Registers with bit 0x80 set, the AI bit
213 * The bit is cleared and the registers fall into one of the
214 * categories above.
215 */
216
217 static bool pca953x_check_register(struct pca953x_chip *chip, unsigned int reg,
218 u32 checkbank)
219 {
220 int bank_shift = pca953x_bank_shift(chip);
221 int bank = (reg & REG_ADDR_MASK) >> bank_shift;
222 int offset = reg & (BIT(bank_shift) - 1);
223
224 /* Special PCAL extended register check. */
225 if (reg & REG_ADDR_EXT) {
226 if (!(chip->driver_data & PCA_PCAL))
227 return false;
228 bank += 8;
229 }
230
231 /* Register is not in the matching bank. */
232 if (!(BIT(bank) & checkbank))
233 return false;
234
235 /* Register is not within allowed range of bank. */
236 if (offset >= NBANK(chip))
237 return false;
238
239 return true;
240 }
241
242 static bool pca953x_readable_register(struct device *dev, unsigned int reg)
243 {
244 struct pca953x_chip *chip = dev_get_drvdata(dev);
245 u32 bank;
246
247 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) {
248 bank = PCA953x_BANK_INPUT | PCA953x_BANK_OUTPUT |
249 PCA953x_BANK_POLARITY | PCA953x_BANK_CONFIG;
250 } else {
251 bank = PCA957x_BANK_INPUT | PCA957x_BANK_OUTPUT |
252 PCA957x_BANK_POLARITY | PCA957x_BANK_CONFIG |
253 PCA957x_BANK_BUSHOLD;
254 }
255
256 if (chip->driver_data & PCA_PCAL) {
257 bank |= PCAL9xxx_BANK_IN_LATCH | PCAL9xxx_BANK_PULL_EN |
258 PCAL9xxx_BANK_PULL_SEL | PCAL9xxx_BANK_IRQ_MASK |
259 PCAL9xxx_BANK_IRQ_STAT;
260 }
261
262 return pca953x_check_register(chip, reg, bank);
263 }
264
265 static bool pca953x_writeable_register(struct device *dev, unsigned int reg)
266 {
267 struct pca953x_chip *chip = dev_get_drvdata(dev);
268 u32 bank;
269
270 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) {
271 bank = PCA953x_BANK_OUTPUT | PCA953x_BANK_POLARITY |
272 PCA953x_BANK_CONFIG;
273 } else {
274 bank = PCA957x_BANK_OUTPUT | PCA957x_BANK_POLARITY |
275 PCA957x_BANK_CONFIG | PCA957x_BANK_BUSHOLD;
276 }
277
278 if (chip->driver_data & PCA_PCAL)
279 bank |= PCAL9xxx_BANK_IN_LATCH | PCAL9xxx_BANK_PULL_EN |
280 PCAL9xxx_BANK_PULL_SEL | PCAL9xxx_BANK_IRQ_MASK;
281
282 return pca953x_check_register(chip, reg, bank);
283 }
284
285 static bool pca953x_volatile_register(struct device *dev, unsigned int reg)
286 {
287 struct pca953x_chip *chip = dev_get_drvdata(dev);
288 u32 bank;
289
290 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE)
291 bank = PCA953x_BANK_INPUT;
292 else
293 bank = PCA957x_BANK_INPUT;
294
295 if (chip->driver_data & PCA_PCAL)
296 bank |= PCAL9xxx_BANK_IRQ_STAT;
297
298 return pca953x_check_register(chip, reg, bank);
299 }
300
301 static const struct regmap_config pca953x_i2c_regmap = {
302 .reg_bits = 8,
303 .val_bits = 8,
304
305 .readable_reg = pca953x_readable_register,
306 .writeable_reg = pca953x_writeable_register,
307 .volatile_reg = pca953x_volatile_register,
308
309 .cache_type = REGCACHE_RBTREE,
310 /* REVISIT: should be 0x7f but some 24 bit chips use REG_ADDR_AI */
311 .max_register = 0xff,
312 };
313
314 static u8 pca953x_recalc_addr(struct pca953x_chip *chip, int reg, int off,
315 bool write, bool addrinc)
316 {
317 int bank_shift = pca953x_bank_shift(chip);
318 int addr = (reg & PCAL_GPIO_MASK) << bank_shift;
319 int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1;
320 u8 regaddr = pinctrl | addr | (off / BANK_SZ);
321
322 /* Single byte read doesn't need AI bit set. */
323 if (!addrinc)
324 return regaddr;
325
326 /* Chips with 24 and more GPIOs always support Auto Increment */
327 if (write && NBANK(chip) > 2)
328 regaddr |= REG_ADDR_AI;
329
330 /* PCA9575 needs address-increment on multi-byte writes */
331 if (PCA_CHIP_TYPE(chip->driver_data) == PCA957X_TYPE)
332 regaddr |= REG_ADDR_AI;
333
334 return regaddr;
335 }
336
337 static int pca953x_write_regs(struct pca953x_chip *chip, int reg, unsigned long *val)
338 {
339 u8 regaddr = pca953x_recalc_addr(chip, reg, 0, true, true);
340 u8 value[MAX_BANK];
341 int i, ret;
342
343 for (i = 0; i < NBANK(chip); i++)
344 value[i] = bitmap_get_value8(val, i * BANK_SZ);
345
346 ret = regmap_bulk_write(chip->regmap, regaddr, value, NBANK(chip));
347 if (ret < 0) {
348 dev_err(&chip->client->dev, "failed writing register\n");
349 return ret;
350 }
351
352 return 0;
353 }
354
355 static int pca953x_read_regs(struct pca953x_chip *chip, int reg, unsigned long *val)
356 {
357 u8 regaddr = pca953x_recalc_addr(chip, reg, 0, false, true);
358 u8 value[MAX_BANK];
359 int i, ret;
360
361 ret = regmap_bulk_read(chip->regmap, regaddr, value, NBANK(chip));
362 if (ret < 0) {
363 dev_err(&chip->client->dev, "failed reading register\n");
364 return ret;
365 }
366
367 for (i = 0; i < NBANK(chip); i++)
368 bitmap_set_value8(val, value[i], i * BANK_SZ);
369
370 return 0;
371 }
372
373 static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off)
374 {
375 struct pca953x_chip *chip = gpiochip_get_data(gc);
376 u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off,
377 true, false);
378 u8 bit = BIT(off % BANK_SZ);
379 int ret;
380
381 mutex_lock(&chip->i2c_lock);
382 ret = regmap_write_bits(chip->regmap, dirreg, bit, bit);
383 mutex_unlock(&chip->i2c_lock);
384 return ret;
385 }
386
387 static int pca953x_gpio_direction_output(struct gpio_chip *gc,
388 unsigned off, int val)
389 {
390 struct pca953x_chip *chip = gpiochip_get_data(gc);
391 u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off,
392 true, false);
393 u8 outreg = pca953x_recalc_addr(chip, chip->regs->output, off,
394 true, false);
395 u8 bit = BIT(off % BANK_SZ);
396 int ret;
397
398 mutex_lock(&chip->i2c_lock);
399 /* set output level */
400 ret = regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0);
401 if (ret)
402 goto exit;
403
404 /* then direction */
405 ret = regmap_write_bits(chip->regmap, dirreg, bit, 0);
406 exit:
407 mutex_unlock(&chip->i2c_lock);
408 return ret;
409 }
410
411 static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off)
412 {
413 struct pca953x_chip *chip = gpiochip_get_data(gc);
414 u8 inreg = pca953x_recalc_addr(chip, chip->regs->input, off,
415 true, false);
416 u8 bit = BIT(off % BANK_SZ);
417 u32 reg_val;
418 int ret;
419
420 mutex_lock(&chip->i2c_lock);
421 ret = regmap_read(chip->regmap, inreg, &reg_val);
422 mutex_unlock(&chip->i2c_lock);
423 if (ret < 0) {
424 /*
425 * NOTE:
426 * diagnostic already emitted; that's all we should
427 * do unless gpio_*_value_cansleep() calls become different
428 * from their nonsleeping siblings (and report faults).
429 */
430 return 0;
431 }
432
433 return !!(reg_val & bit);
434 }
435
436 static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val)
437 {
438 struct pca953x_chip *chip = gpiochip_get_data(gc);
439 u8 outreg = pca953x_recalc_addr(chip, chip->regs->output, off,
440 true, false);
441 u8 bit = BIT(off % BANK_SZ);
442
443 mutex_lock(&chip->i2c_lock);
444 regmap_write_bits(chip->regmap, outreg, bit, val ? bit : 0);
445 mutex_unlock(&chip->i2c_lock);
446 }
447
448 static int pca953x_gpio_get_direction(struct gpio_chip *gc, unsigned off)
449 {
450 struct pca953x_chip *chip = gpiochip_get_data(gc);
451 u8 dirreg = pca953x_recalc_addr(chip, chip->regs->direction, off,
452 true, false);
453 u8 bit = BIT(off % BANK_SZ);
454 u32 reg_val;
455 int ret;
456
457 mutex_lock(&chip->i2c_lock);
458 ret = regmap_read(chip->regmap, dirreg, &reg_val);
459 mutex_unlock(&chip->i2c_lock);
460 if (ret < 0)
461 return ret;
462
463 if (reg_val & bit)
464 return GPIO_LINE_DIRECTION_IN;
465
466 return GPIO_LINE_DIRECTION_OUT;
467 }
468
469 static void pca953x_gpio_set_multiple(struct gpio_chip *gc,
470 unsigned long *mask, unsigned long *bits)
471 {
472 struct pca953x_chip *chip = gpiochip_get_data(gc);
473 DECLARE_BITMAP(reg_val, MAX_LINE);
474 int ret;
475
476 mutex_lock(&chip->i2c_lock);
477 ret = pca953x_read_regs(chip, chip->regs->output, reg_val);
478 if (ret)
479 goto exit;
480
481 bitmap_replace(reg_val, reg_val, bits, mask, gc->ngpio);
482
483 pca953x_write_regs(chip, chip->regs->output, reg_val);
484 exit:
485 mutex_unlock(&chip->i2c_lock);
486 }
487
488 static int pca953x_gpio_set_pull_up_down(struct pca953x_chip *chip,
489 unsigned int offset,
490 unsigned long config)
491 {
492 u8 pull_en_reg = pca953x_recalc_addr(chip, PCAL953X_PULL_EN, offset,
493 true, false);
494 u8 pull_sel_reg = pca953x_recalc_addr(chip, PCAL953X_PULL_SEL, offset,
495 true, false);
496 u8 bit = BIT(offset % BANK_SZ);
497 int ret;
498
499 /*
500 * pull-up/pull-down configuration requires PCAL extended
501 * registers
502 */
503 if (!(chip->driver_data & PCA_PCAL))
504 return -ENOTSUPP;
505
506 mutex_lock(&chip->i2c_lock);
507
508 /* Disable pull-up/pull-down */
509 ret = regmap_write_bits(chip->regmap, pull_en_reg, bit, 0);
510 if (ret)
511 goto exit;
512
513 /* Configure pull-up/pull-down */
514 if (config == PIN_CONFIG_BIAS_PULL_UP)
515 ret = regmap_write_bits(chip->regmap, pull_sel_reg, bit, bit);
516 else if (config == PIN_CONFIG_BIAS_PULL_DOWN)
517 ret = regmap_write_bits(chip->regmap, pull_sel_reg, bit, 0);
518 if (ret)
519 goto exit;
520
521 /* Enable pull-up/pull-down */
522 ret = regmap_write_bits(chip->regmap, pull_en_reg, bit, bit);
523
524 exit:
525 mutex_unlock(&chip->i2c_lock);
526 return ret;
527 }
528
529 static int pca953x_gpio_set_config(struct gpio_chip *gc, unsigned int offset,
530 unsigned long config)
531 {
532 struct pca953x_chip *chip = gpiochip_get_data(gc);
533
534 switch (pinconf_to_config_param(config)) {
535 case PIN_CONFIG_BIAS_PULL_UP:
536 case PIN_CONFIG_BIAS_PULL_DOWN:
537 return pca953x_gpio_set_pull_up_down(chip, offset, config);
538 default:
539 return -ENOTSUPP;
540 }
541 }
542
543 static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios)
544 {
545 struct gpio_chip *gc;
546
547 gc = &chip->gpio_chip;
548
549 gc->direction_input = pca953x_gpio_direction_input;
550 gc->direction_output = pca953x_gpio_direction_output;
551 gc->get = pca953x_gpio_get_value;
552 gc->set = pca953x_gpio_set_value;
553 gc->get_direction = pca953x_gpio_get_direction;
554 gc->set_multiple = pca953x_gpio_set_multiple;
555 gc->set_config = pca953x_gpio_set_config;
556 gc->can_sleep = true;
557
558 gc->base = chip->gpio_start;
559 gc->ngpio = gpios;
560 gc->label = dev_name(&chip->client->dev);
561 gc->parent = &chip->client->dev;
562 gc->owner = THIS_MODULE;
563 gc->names = chip->names;
564 }
565
566 #ifdef CONFIG_GPIO_PCA953X_IRQ
567 static void pca953x_irq_mask(struct irq_data *d)
568 {
569 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
570 struct pca953x_chip *chip = gpiochip_get_data(gc);
571 irq_hw_number_t hwirq = irqd_to_hwirq(d);
572
573 clear_bit(hwirq, chip->irq_mask);
574 }
575
576 static void pca953x_irq_unmask(struct irq_data *d)
577 {
578 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
579 struct pca953x_chip *chip = gpiochip_get_data(gc);
580 irq_hw_number_t hwirq = irqd_to_hwirq(d);
581
582 set_bit(hwirq, chip->irq_mask);
583 }
584
585 static int pca953x_irq_set_wake(struct irq_data *d, unsigned int on)
586 {
587 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
588 struct pca953x_chip *chip = gpiochip_get_data(gc);
589
590 if (on)
591 atomic_inc(&chip->wakeup_path);
592 else
593 atomic_dec(&chip->wakeup_path);
594
595 return irq_set_irq_wake(chip->client->irq, on);
596 }
597
598 static void pca953x_irq_bus_lock(struct irq_data *d)
599 {
600 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
601 struct pca953x_chip *chip = gpiochip_get_data(gc);
602
603 mutex_lock(&chip->irq_lock);
604 }
605
606 static void pca953x_irq_bus_sync_unlock(struct irq_data *d)
607 {
608 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
609 struct pca953x_chip *chip = gpiochip_get_data(gc);
610 DECLARE_BITMAP(irq_mask, MAX_LINE);
611 DECLARE_BITMAP(reg_direction, MAX_LINE);
612 int level;
613
614 pca953x_read_regs(chip, chip->regs->direction, reg_direction);
615
616 if (chip->driver_data & PCA_PCAL) {
617 /* Enable latch on interrupt-enabled inputs */
618 pca953x_write_regs(chip, PCAL953X_IN_LATCH, chip->irq_mask);
619
620 bitmap_complement(irq_mask, chip->irq_mask, gc->ngpio);
621
622 /* Unmask enabled interrupts */
623 pca953x_write_regs(chip, PCAL953X_INT_MASK, irq_mask);
624 }
625
626 bitmap_or(irq_mask, chip->irq_trig_fall, chip->irq_trig_raise, gc->ngpio);
627 bitmap_and(irq_mask, irq_mask, reg_direction, gc->ngpio);
628
629 /* Look for any newly setup interrupt */
630 for_each_set_bit(level, irq_mask, gc->ngpio)
631 pca953x_gpio_direction_input(&chip->gpio_chip, level);
632
633 mutex_unlock(&chip->irq_lock);
634 }
635
636 static int pca953x_irq_set_type(struct irq_data *d, unsigned int type)
637 {
638 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
639 struct pca953x_chip *chip = gpiochip_get_data(gc);
640 irq_hw_number_t hwirq = irqd_to_hwirq(d);
641
642 if (!(type & IRQ_TYPE_EDGE_BOTH)) {
643 dev_err(&chip->client->dev, "irq %d: unsupported type %d\n",
644 d->irq, type);
645 return -EINVAL;
646 }
647
648 assign_bit(hwirq, chip->irq_trig_fall, type & IRQ_TYPE_EDGE_FALLING);
649 assign_bit(hwirq, chip->irq_trig_raise, type & IRQ_TYPE_EDGE_RISING);
650
651 return 0;
652 }
653
654 static void pca953x_irq_shutdown(struct irq_data *d)
655 {
656 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
657 struct pca953x_chip *chip = gpiochip_get_data(gc);
658 irq_hw_number_t hwirq = irqd_to_hwirq(d);
659
660 clear_bit(hwirq, chip->irq_trig_raise);
661 clear_bit(hwirq, chip->irq_trig_fall);
662 }
663
664 static bool pca953x_irq_pending(struct pca953x_chip *chip, unsigned long *pending)
665 {
666 struct gpio_chip *gc = &chip->gpio_chip;
667 DECLARE_BITMAP(reg_direction, MAX_LINE);
668 DECLARE_BITMAP(old_stat, MAX_LINE);
669 DECLARE_BITMAP(cur_stat, MAX_LINE);
670 DECLARE_BITMAP(new_stat, MAX_LINE);
671 DECLARE_BITMAP(trigger, MAX_LINE);
672 int ret;
673
674 if (chip->driver_data & PCA_PCAL) {
675 /* Read the current interrupt status from the device */
676 ret = pca953x_read_regs(chip, PCAL953X_INT_STAT, trigger);
677 if (ret)
678 return false;
679
680 /* Check latched inputs and clear interrupt status */
681 ret = pca953x_read_regs(chip, chip->regs->input, cur_stat);
682 if (ret)
683 return false;
684
685 /* Apply filter for rising/falling edge selection */
686 bitmap_replace(new_stat, chip->irq_trig_fall, chip->irq_trig_raise, cur_stat, gc->ngpio);
687
688 bitmap_and(pending, new_stat, trigger, gc->ngpio);
689
690 return !bitmap_empty(pending, gc->ngpio);
691 }
692
693 ret = pca953x_read_regs(chip, chip->regs->input, cur_stat);
694 if (ret)
695 return false;
696
697 /* Remove output pins from the equation */
698 pca953x_read_regs(chip, chip->regs->direction, reg_direction);
699
700 bitmap_copy(old_stat, chip->irq_stat, gc->ngpio);
701
702 bitmap_and(new_stat, cur_stat, reg_direction, gc->ngpio);
703 bitmap_xor(cur_stat, new_stat, old_stat, gc->ngpio);
704 bitmap_and(trigger, cur_stat, chip->irq_mask, gc->ngpio);
705
706 if (bitmap_empty(trigger, gc->ngpio))
707 return false;
708
709 bitmap_copy(chip->irq_stat, new_stat, gc->ngpio);
710
711 bitmap_and(cur_stat, chip->irq_trig_fall, old_stat, gc->ngpio);
712 bitmap_and(old_stat, chip->irq_trig_raise, new_stat, gc->ngpio);
713 bitmap_or(new_stat, old_stat, cur_stat, gc->ngpio);
714 bitmap_and(pending, new_stat, trigger, gc->ngpio);
715
716 return !bitmap_empty(pending, gc->ngpio);
717 }
718
719 static irqreturn_t pca953x_irq_handler(int irq, void *devid)
720 {
721 struct pca953x_chip *chip = devid;
722 struct gpio_chip *gc = &chip->gpio_chip;
723 DECLARE_BITMAP(pending, MAX_LINE);
724 int level;
725
726 if (!pca953x_irq_pending(chip, pending))
727 return IRQ_NONE;
728
729 for_each_set_bit(level, pending, gc->ngpio)
730 handle_nested_irq(irq_find_mapping(gc->irq.domain, level));
731
732 return IRQ_HANDLED;
733 }
734
735 static int pca953x_irq_setup(struct pca953x_chip *chip, int irq_base)
736 {
737 struct i2c_client *client = chip->client;
738 struct irq_chip *irq_chip = &chip->irq_chip;
739 DECLARE_BITMAP(reg_direction, MAX_LINE);
740 DECLARE_BITMAP(irq_stat, MAX_LINE);
741 int ret;
742
743 if (!client->irq)
744 return 0;
745
746 if (irq_base == -1)
747 return 0;
748
749 if (!(chip->driver_data & PCA_INT))
750 return 0;
751
752 ret = pca953x_read_regs(chip, chip->regs->input, irq_stat);
753 if (ret)
754 return ret;
755
756 /*
757 * There is no way to know which GPIO line generated the
758 * interrupt. We have to rely on the previous read for
759 * this purpose.
760 */
761 pca953x_read_regs(chip, chip->regs->direction, reg_direction);
762 bitmap_and(chip->irq_stat, irq_stat, reg_direction, chip->gpio_chip.ngpio);
763 mutex_init(&chip->irq_lock);
764
765 ret = devm_request_threaded_irq(&client->dev, client->irq,
766 NULL, pca953x_irq_handler,
767 IRQF_ONESHOT | IRQF_SHARED,
768 dev_name(&client->dev), chip);
769 if (ret) {
770 dev_err(&client->dev, "failed to request irq %d\n",
771 client->irq);
772 return ret;
773 }
774
775 irq_chip->name = dev_name(&chip->client->dev);
776 irq_chip->irq_mask = pca953x_irq_mask;
777 irq_chip->irq_unmask = pca953x_irq_unmask;
778 irq_chip->irq_set_wake = pca953x_irq_set_wake;
779 irq_chip->irq_bus_lock = pca953x_irq_bus_lock;
780 irq_chip->irq_bus_sync_unlock = pca953x_irq_bus_sync_unlock;
781 irq_chip->irq_set_type = pca953x_irq_set_type;
782 irq_chip->irq_shutdown = pca953x_irq_shutdown;
783
784 ret = gpiochip_irqchip_add_nested(&chip->gpio_chip, irq_chip,
785 irq_base, handle_simple_irq,
786 IRQ_TYPE_NONE);
787 if (ret) {
788 dev_err(&client->dev,
789 "could not connect irqchip to gpiochip\n");
790 return ret;
791 }
792
793 gpiochip_set_nested_irqchip(&chip->gpio_chip, irq_chip, client->irq);
794
795 return 0;
796 }
797
798 #else /* CONFIG_GPIO_PCA953X_IRQ */
799 static int pca953x_irq_setup(struct pca953x_chip *chip,
800 int irq_base)
801 {
802 struct i2c_client *client = chip->client;
803
804 if (client->irq && irq_base != -1 && (chip->driver_data & PCA_INT))
805 dev_warn(&client->dev, "interrupt support not compiled in\n");
806
807 return 0;
808 }
809 #endif
810
811 static int device_pca95xx_init(struct pca953x_chip *chip, u32 invert)
812 {
813 DECLARE_BITMAP(val, MAX_LINE);
814 int ret;
815
816 ret = regcache_sync_region(chip->regmap, chip->regs->output,
817 chip->regs->output + NBANK(chip));
818 if (ret)
819 goto out;
820
821 ret = regcache_sync_region(chip->regmap, chip->regs->direction,
822 chip->regs->direction + NBANK(chip));
823 if (ret)
824 goto out;
825
826 /* set platform specific polarity inversion */
827 if (invert)
828 bitmap_fill(val, MAX_LINE);
829 else
830 bitmap_zero(val, MAX_LINE);
831
832 ret = pca953x_write_regs(chip, chip->regs->invert, val);
833 out:
834 return ret;
835 }
836
837 static int device_pca957x_init(struct pca953x_chip *chip, u32 invert)
838 {
839 DECLARE_BITMAP(val, MAX_LINE);
840 int ret;
841
842 ret = device_pca95xx_init(chip, invert);
843 if (ret)
844 goto out;
845
846 /* To enable register 6, 7 to control pull up and pull down */
847 memset(val, 0x02, NBANK(chip));
848 ret = pca953x_write_regs(chip, PCA957X_BKEN, val);
849 if (ret)
850 goto out;
851
852 return 0;
853 out:
854 return ret;
855 }
856
857 static int pca953x_probe(struct i2c_client *client,
858 const struct i2c_device_id *i2c_id)
859 {
860 struct pca953x_platform_data *pdata;
861 struct pca953x_chip *chip;
862 int irq_base = 0;
863 int ret;
864 u32 invert = 0;
865 struct regulator *reg;
866
867 chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
868 if (chip == NULL)
869 return -ENOMEM;
870
871 pdata = dev_get_platdata(&client->dev);
872 if (pdata) {
873 irq_base = pdata->irq_base;
874 chip->gpio_start = pdata->gpio_base;
875 invert = pdata->invert;
876 chip->names = pdata->names;
877 } else {
878 struct gpio_desc *reset_gpio;
879
880 chip->gpio_start = -1;
881 irq_base = 0;
882
883 /*
884 * See if we need to de-assert a reset pin.
885 *
886 * There is no known ACPI-enabled platforms that are
887 * using "reset" GPIO. Otherwise any of those platform
888 * must use _DSD method with corresponding property.
889 */
890 reset_gpio = devm_gpiod_get_optional(&client->dev, "reset",
891 GPIOD_OUT_LOW);
892 if (IS_ERR(reset_gpio))
893 return PTR_ERR(reset_gpio);
894 }
895
896 chip->client = client;
897
898 reg = devm_regulator_get(&client->dev, "vcc");
899 if (IS_ERR(reg)) {
900 ret = PTR_ERR(reg);
901 if (ret != -EPROBE_DEFER)
902 dev_err(&client->dev, "reg get err: %d\n", ret);
903 return ret;
904 }
905 ret = regulator_enable(reg);
906 if (ret) {
907 dev_err(&client->dev, "reg en err: %d\n", ret);
908 return ret;
909 }
910 chip->regulator = reg;
911
912 if (i2c_id) {
913 chip->driver_data = i2c_id->driver_data;
914 } else {
915 const void *match;
916
917 match = device_get_match_data(&client->dev);
918 if (!match) {
919 ret = -ENODEV;
920 goto err_exit;
921 }
922
923 chip->driver_data = (uintptr_t)match;
924 }
925
926 i2c_set_clientdata(client, chip);
927
928 chip->regmap = devm_regmap_init_i2c(client, &pca953x_i2c_regmap);
929 if (IS_ERR(chip->regmap)) {
930 ret = PTR_ERR(chip->regmap);
931 goto err_exit;
932 }
933
934 regcache_mark_dirty(chip->regmap);
935
936 mutex_init(&chip->i2c_lock);
937 /*
938 * In case we have an i2c-mux controlled by a GPIO provided by an
939 * expander using the same driver higher on the device tree, read the
940 * i2c adapter nesting depth and use the retrieved value as lockdep
941 * subclass for chip->i2c_lock.
942 *
943 * REVISIT: This solution is not complete. It protects us from lockdep
944 * false positives when the expander controlling the i2c-mux is on
945 * a different level on the device tree, but not when it's on the same
946 * level on a different branch (in which case the subclass number
947 * would be the same).
948 *
949 * TODO: Once a correct solution is developed, a similar fix should be
950 * applied to all other i2c-controlled GPIO expanders (and potentially
951 * regmap-i2c).
952 */
953 lockdep_set_subclass(&chip->i2c_lock,
954 i2c_adapter_depth(client->adapter));
955
956 /* initialize cached registers from their original values.
957 * we can't share this chip with another i2c master.
958 */
959 pca953x_setup_gpio(chip, chip->driver_data & PCA_GPIO_MASK);
960
961 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE) {
962 chip->regs = &pca953x_regs;
963 ret = device_pca95xx_init(chip, invert);
964 } else {
965 chip->regs = &pca957x_regs;
966 ret = device_pca957x_init(chip, invert);
967 }
968 if (ret)
969 goto err_exit;
970
971 ret = devm_gpiochip_add_data(&client->dev, &chip->gpio_chip, chip);
972 if (ret)
973 goto err_exit;
974
975 ret = pca953x_irq_setup(chip, irq_base);
976 if (ret)
977 goto err_exit;
978
979 if (pdata && pdata->setup) {
980 ret = pdata->setup(client, chip->gpio_chip.base,
981 chip->gpio_chip.ngpio, pdata->context);
982 if (ret < 0)
983 dev_warn(&client->dev, "setup failed, %d\n", ret);
984 }
985
986 return 0;
987
988 err_exit:
989 regulator_disable(chip->regulator);
990 return ret;
991 }
992
993 static int pca953x_remove(struct i2c_client *client)
994 {
995 struct pca953x_platform_data *pdata = dev_get_platdata(&client->dev);
996 struct pca953x_chip *chip = i2c_get_clientdata(client);
997 int ret;
998
999 if (pdata && pdata->teardown) {
1000 ret = pdata->teardown(client, chip->gpio_chip.base,
1001 chip->gpio_chip.ngpio, pdata->context);
1002 if (ret < 0)
1003 dev_err(&client->dev, "teardown failed, %d\n", ret);
1004 } else {
1005 ret = 0;
1006 }
1007
1008 regulator_disable(chip->regulator);
1009
1010 return ret;
1011 }
1012
1013 #ifdef CONFIG_PM_SLEEP
1014 static int pca953x_regcache_sync(struct device *dev)
1015 {
1016 struct pca953x_chip *chip = dev_get_drvdata(dev);
1017 int ret;
1018
1019 /*
1020 * The ordering between direction and output is important,
1021 * sync these registers first and only then sync the rest.
1022 */
1023 ret = regcache_sync_region(chip->regmap, chip->regs->direction,
1024 chip->regs->direction + NBANK(chip));
1025 if (ret) {
1026 dev_err(dev, "Failed to sync GPIO dir registers: %d\n", ret);
1027 return ret;
1028 }
1029
1030 ret = regcache_sync_region(chip->regmap, chip->regs->output,
1031 chip->regs->output + NBANK(chip));
1032 if (ret) {
1033 dev_err(dev, "Failed to sync GPIO out registers: %d\n", ret);
1034 return ret;
1035 }
1036
1037 #ifdef CONFIG_GPIO_PCA953X_IRQ
1038 if (chip->driver_data & PCA_PCAL) {
1039 ret = regcache_sync_region(chip->regmap, PCAL953X_IN_LATCH,
1040 PCAL953X_IN_LATCH + NBANK(chip));
1041 if (ret) {
1042 dev_err(dev, "Failed to sync INT latch registers: %d\n",
1043 ret);
1044 return ret;
1045 }
1046
1047 ret = regcache_sync_region(chip->regmap, PCAL953X_INT_MASK,
1048 PCAL953X_INT_MASK + NBANK(chip));
1049 if (ret) {
1050 dev_err(dev, "Failed to sync INT mask registers: %d\n",
1051 ret);
1052 return ret;
1053 }
1054 }
1055 #endif
1056
1057 return 0;
1058 }
1059
1060 static int pca953x_suspend(struct device *dev)
1061 {
1062 struct pca953x_chip *chip = dev_get_drvdata(dev);
1063
1064 regcache_cache_only(chip->regmap, true);
1065
1066 if (atomic_read(&chip->wakeup_path))
1067 device_set_wakeup_path(dev);
1068 else
1069 regulator_disable(chip->regulator);
1070
1071 return 0;
1072 }
1073
1074 static int pca953x_resume(struct device *dev)
1075 {
1076 struct pca953x_chip *chip = dev_get_drvdata(dev);
1077 int ret;
1078
1079 if (!atomic_read(&chip->wakeup_path)) {
1080 ret = regulator_enable(chip->regulator);
1081 if (ret) {
1082 dev_err(dev, "Failed to enable regulator: %d\n", ret);
1083 return 0;
1084 }
1085 }
1086
1087 regcache_cache_only(chip->regmap, false);
1088 regcache_mark_dirty(chip->regmap);
1089 ret = pca953x_regcache_sync(dev);
1090 if (ret)
1091 return ret;
1092
1093 ret = regcache_sync(chip->regmap);
1094 if (ret) {
1095 dev_err(dev, "Failed to restore register map: %d\n", ret);
1096 return ret;
1097 }
1098
1099 return 0;
1100 }
1101 #endif
1102
1103 /* convenience to stop overlong match-table lines */
1104 #define OF_953X(__nrgpio, __int) (void *)(__nrgpio | PCA953X_TYPE | __int)
1105 #define OF_957X(__nrgpio, __int) (void *)(__nrgpio | PCA957X_TYPE | __int)
1106
1107 static const struct of_device_id pca953x_dt_ids[] = {
1108 { .compatible = "nxp,pca6416", .data = OF_953X(16, PCA_INT), },
1109 { .compatible = "nxp,pca9505", .data = OF_953X(40, PCA_INT), },
1110 { .compatible = "nxp,pca9534", .data = OF_953X( 8, PCA_INT), },
1111 { .compatible = "nxp,pca9535", .data = OF_953X(16, PCA_INT), },
1112 { .compatible = "nxp,pca9536", .data = OF_953X( 4, 0), },
1113 { .compatible = "nxp,pca9537", .data = OF_953X( 4, PCA_INT), },
1114 { .compatible = "nxp,pca9538", .data = OF_953X( 8, PCA_INT), },
1115 { .compatible = "nxp,pca9539", .data = OF_953X(16, PCA_INT), },
1116 { .compatible = "nxp,pca9554", .data = OF_953X( 8, PCA_INT), },
1117 { .compatible = "nxp,pca9555", .data = OF_953X(16, PCA_INT), },
1118 { .compatible = "nxp,pca9556", .data = OF_953X( 8, 0), },
1119 { .compatible = "nxp,pca9557", .data = OF_953X( 8, 0), },
1120 { .compatible = "nxp,pca9574", .data = OF_957X( 8, PCA_INT), },
1121 { .compatible = "nxp,pca9575", .data = OF_957X(16, PCA_INT), },
1122 { .compatible = "nxp,pca9698", .data = OF_953X(40, 0), },
1123
1124 { .compatible = "nxp,pcal6416", .data = OF_953X(16, PCA_LATCH_INT), },
1125 { .compatible = "nxp,pcal6524", .data = OF_953X(24, PCA_LATCH_INT), },
1126 { .compatible = "nxp,pcal9555a", .data = OF_953X(16, PCA_LATCH_INT), },
1127
1128 { .compatible = "maxim,max7310", .data = OF_953X( 8, 0), },
1129 { .compatible = "maxim,max7312", .data = OF_953X(16, PCA_INT), },
1130 { .compatible = "maxim,max7313", .data = OF_953X(16, PCA_INT), },
1131 { .compatible = "maxim,max7315", .data = OF_953X( 8, PCA_INT), },
1132 { .compatible = "maxim,max7318", .data = OF_953X(16, PCA_INT), },
1133
1134 { .compatible = "ti,pca6107", .data = OF_953X( 8, PCA_INT), },
1135 { .compatible = "ti,pca9536", .data = OF_953X( 4, 0), },
1136 { .compatible = "ti,tca6408", .data = OF_953X( 8, PCA_INT), },
1137 { .compatible = "ti,tca6416", .data = OF_953X(16, PCA_INT), },
1138 { .compatible = "ti,tca6424", .data = OF_953X(24, PCA_INT), },
1139 { .compatible = "ti,tca9539", .data = OF_953X(16, PCA_INT), },
1140
1141 { .compatible = "onnn,cat9554", .data = OF_953X( 8, PCA_INT), },
1142 { .compatible = "onnn,pca9654", .data = OF_953X( 8, PCA_INT), },
1143
1144 { .compatible = "exar,xra1202", .data = OF_953X( 8, 0), },
1145 { }
1146 };
1147
1148 MODULE_DEVICE_TABLE(of, pca953x_dt_ids);
1149
1150 static SIMPLE_DEV_PM_OPS(pca953x_pm_ops, pca953x_suspend, pca953x_resume);
1151
1152 static struct i2c_driver pca953x_driver = {
1153 .driver = {
1154 .name = "pca953x",
1155 .pm = &pca953x_pm_ops,
1156 .of_match_table = pca953x_dt_ids,
1157 .acpi_match_table = ACPI_PTR(pca953x_acpi_ids),
1158 },
1159 .probe = pca953x_probe,
1160 .remove = pca953x_remove,
1161 .id_table = pca953x_id,
1162 };
1163
1164 static int __init pca953x_init(void)
1165 {
1166 return i2c_add_driver(&pca953x_driver);
1167 }
1168 /* register after i2c postcore initcall and before
1169 * subsys initcalls that may rely on these GPIOs
1170 */
1171 subsys_initcall(pca953x_init);
1172
1173 static void __exit pca953x_exit(void)
1174 {
1175 i2c_del_driver(&pca953x_driver);
1176 }
1177 module_exit(pca953x_exit);
1178
1179 MODULE_AUTHOR("eric miao <eric.miao@marvell.com>");
1180 MODULE_DESCRIPTION("GPIO expander driver for PCA953x");
1181 MODULE_LICENSE("GPL");
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