drivers/gpio/s5p_gpio.c

   1 /*
   2  * (C) Copyright 2009 Samsung Electronics
   3  * Minkyu Kang <mk7.kang@samsung.com>
   4  *
   5  * This program is free software; you can redistribute it and/or
   6  * modify it under the terms of the GNU General Public License as
   7  * published by the Free Software Foundation; either version 2 of
   8  * the License, or (at your option) any later version.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  18  * MA 02111-1307 USA
  19  */
  20
  21 #include <common.h>
  22 #include <asm/io.h>
  23 #include <asm/gpio.h>
  24
  25 #define CON_MASK(x)             (0xf << ((x) << 2))
  26 #define CON_SFR(x, v)           ((v) << ((x) << 2))
  27
  28 #define DAT_MASK(x)             (0x1 << (x))
  29 #define DAT_SET(x)              (0x1 << (x))
  30
  31 #define PULL_MASK(x)            (0x3 << ((x) << 1))
  32 #define PULL_MODE(x, v)         ((v) << ((x) << 1))
  33
  34 #define DRV_MASK(x)             (0x3 << ((x) << 1))
  35 #define DRV_SET(x, m)           ((m) << ((x) << 1))
  36 #define RATE_MASK(x)            (0x1 << (x + 16))
  37 #define RATE_SET(x)             (0x1 << (x + 16))
  38
  39 void s5p_gpio_cfg_pin(struct s5p_gpio_bank *bank, int gpio, int cfg)
  40 {
  41         unsigned int value;
  42
  43         value = readl(&bank->con);
  44         value &= ~CON_MASK(gpio);
  45         value |= CON_SFR(gpio, cfg);
  46         writel(value, &bank->con);
  47 }
  48
  49 void s5p_gpio_direction_output(struct s5p_gpio_bank *bank, int gpio, int en)
  50 {
  51         s5p_gpio_cfg_pin(bank, gpio, GPIO_OUTPUT);
  52         s5p_gpio_set_value(bank, gpio, en);
  53 }
  54
  55 void s5p_gpio_direction_input(struct s5p_gpio_bank *bank, int gpio)
  56 {
  57         s5p_gpio_cfg_pin(bank, gpio, GPIO_INPUT);
  58 }
  59
  60 void s5p_gpio_set_value(struct s5p_gpio_bank *bank, int gpio, int en)
  61 {
  62         unsigned int value;
  63
  64         value = readl(&bank->dat);
  65         value &= ~DAT_MASK(gpio);
  66         if (en)
  67                 value |= DAT_SET(gpio);
  68         writel(value, &bank->dat);
  69 }
  70
  71 unsigned int s5p_gpio_get_value(struct s5p_gpio_bank *bank, int gpio)
  72 {
  73         unsigned int value;
  74
  75         value = readl(&bank->dat);
  76         return !!(value & DAT_MASK(gpio));
  77 }
  78
  79 void s5p_gpio_set_pull(struct s5p_gpio_bank *bank, int gpio, int mode)
  80 {
  81         unsigned int value;
  82
  83         value = readl(&bank->pull);
  84         value &= ~PULL_MASK(gpio);
  85
  86         switch (mode) {
  87         case GPIO_PULL_DOWN:
  88         case GPIO_PULL_UP:
  89                 value |= PULL_MODE(gpio, mode);
  90                 break;
  91         default:
  92                 break;
  93         }
  94
  95         writel(value, &bank->pull);
  96 }
  97
  98 void s5p_gpio_set_drv(struct s5p_gpio_bank *bank, int gpio, int mode)
  99 {
 100         unsigned int value;
 101
 102         value = readl(&bank->drv);
 103         value &= ~DRV_MASK(gpio);
 104
 105         switch (mode) {
 106         case GPIO_DRV_1X:
 107         case GPIO_DRV_2X:
 108         case GPIO_DRV_3X:
 109         case GPIO_DRV_4X:
 110                 value |= DRV_SET(gpio, mode);
 111                 break;
 112         default:
 113                 return;
 114         }
 115
 116         writel(value, &bank->drv);
 117 }
 118
 119 void s5p_gpio_set_rate(struct s5p_gpio_bank *bank, int gpio, int mode)
 120 {
 121         unsigned int value;
 122
 123         value = readl(&bank->drv);
 124         value &= ~RATE_MASK(gpio);
 125
 126         switch (mode) {
 127         case GPIO_DRV_FAST:
 128         case GPIO_DRV_SLOW:
 129                 value |= RATE_SET(gpio);
 130                 break;
 131         default:
 132                 return;
 133         }
 134
 135         writel(value, &bank->drv);
 136 }
 137
 138 struct s5p_gpio_bank *s5p_gpio_get_bank(unsigned gpio)
 139 {
 140         int bank;
 141         unsigned g = gpio - s5p_gpio_part_max(gpio);
 142
 143         bank = g / GPIO_PER_BANK;
 144         bank *= sizeof(struct s5p_gpio_bank);
 145         return (struct s5p_gpio_bank *) (s5p_gpio_base(gpio) + bank);
 146 }
 147
 148 int s5p_gpio_get_pin(unsigned gpio)
 149 {
 150         return gpio % GPIO_PER_BANK;
 151 }
 152
 153 /* Common GPIO API */
 154
 155 int gpio_request(unsigned gpio, const char *label)
 156 {
 157         return 0;
 158 }
 159
 160 int gpio_free(unsigned gpio)
 161 {
 162         return 0;
 163 }
 164
 165 int gpio_direction_input(unsigned gpio)
 166 {
 167         s5p_gpio_direction_input(s5p_gpio_get_bank(gpio),
 168                                 s5p_gpio_get_pin(gpio));
 169         return 0;
 170 }
 171
 172 int gpio_direction_output(unsigned gpio, int value)
 173 {
 174         s5p_gpio_direction_output(s5p_gpio_get_bank(gpio),
 175                                  s5p_gpio_get_pin(gpio), value);
 176         return 0;
 177 }
 178
 179 int gpio_get_value(unsigned gpio)
 180 {
 181         return (int) s5p_gpio_get_value(s5p_gpio_get_bank(gpio),
 182                                        s5p_gpio_get_pin(gpio));
 183 }
 184
 185 int gpio_set_value(unsigned gpio, int value)
 186 {
 187         s5p_gpio_set_value(s5p_gpio_get_bank(gpio),
 188                           s5p_gpio_get_pin(gpio), value);
 189
 190         return 0;
 191 }