2 * Pinmuxed GPIO support for SuperH.
3 * Copy from linux kernel driver/sh/pfc.c
5 * Copyright (C) 2008 Magnus Damm
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
13 #include <asm/bitops.h>
17 static struct pinmux_info
*gpioc
;
19 #define pfc_phys_to_virt(p, a) ((void *)a)
21 static int enum_in_range(pinmux_enum_t enum_id
, struct pinmux_range
*r
)
23 if (enum_id
< r
->begin
)
32 static unsigned long gpio_read_raw_reg(void *mapped_reg
,
33 unsigned long reg_width
)
38 return readb(mapped_reg
);
40 return readw(mapped_reg
);
42 return readl(mapped_reg
);
49 static void gpio_write_raw_reg(void *mapped_reg
,
50 unsigned long reg_width
,
55 writeb(data
, mapped_reg
);
58 writew(data
, mapped_reg
);
61 writel(data
, mapped_reg
);
68 static int gpio_read_bit(struct pinmux_data_reg
*dr
,
73 pos
= dr
->reg_width
- (in_pos
+ 1);
75 debug("read_bit: addr = %lx, pos = %ld, "
76 "r_width = %ld\n", dr
->reg
, pos
, dr
->reg_width
);
79 (gpio_read_raw_reg(dr
->mapped_reg
+ 0x4, dr
->reg_width
) >> pos
) & 1;
82 static void gpio_write_bit(struct pinmux_data_reg
*dr
,
83 unsigned long in_pos
, unsigned long value
)
87 pos
= dr
->reg_width
- (in_pos
+ 1);
89 debug("write_bit addr = %lx, value = %d, pos = %ld, "
91 dr
->reg
, !!value
, pos
, dr
->reg_width
);
94 __set_bit(pos
, &dr
->reg_shadow
);
96 __clear_bit(pos
, &dr
->reg_shadow
);
98 gpio_write_raw_reg(dr
->mapped_reg
, dr
->reg_width
, dr
->reg_shadow
);
101 static void config_reg_helper(struct pinmux_info
*gpioc
,
102 struct pinmux_cfg_reg
*crp
,
103 unsigned long in_pos
,
105 void __iomem
**mapped_regp
,
109 unsigned long *maskp
,
114 *mapped_regp
= pfc_phys_to_virt(gpioc
, crp
->reg
);
116 if (crp
->field_width
) {
117 *maskp
= (1 << crp
->field_width
) - 1;
118 *posp
= crp
->reg_width
- ((in_pos
+ 1) * crp
->field_width
);
120 *maskp
= (1 << crp
->var_field_width
[in_pos
]) - 1;
121 *posp
= crp
->reg_width
;
122 for (k
= 0; k
<= in_pos
; k
++)
123 *posp
-= crp
->var_field_width
[k
];
127 static int read_config_reg(struct pinmux_info
*gpioc
,
128 struct pinmux_cfg_reg
*crp
,
133 unsigned long mask
, pos
;
135 config_reg_helper(gpioc
, crp
, field
, &mapped_reg
, &mask
, &pos
);
137 debug("read_reg: addr = %lx, field = %ld, "
138 "r_width = %ld, f_width = %ld\n",
139 crp
->reg
, field
, crp
->reg_width
, crp
->field_width
);
141 return (gpio_read_raw_reg(mapped_reg
, crp
->reg_width
) >> pos
) & mask
;
144 static void write_config_reg(struct pinmux_info
*gpioc
,
145 struct pinmux_cfg_reg
*crp
,
146 unsigned long field
, unsigned long value
)
149 unsigned long mask
, pos
, data
;
151 config_reg_helper(gpioc
, crp
, field
, &mapped_reg
, &mask
, &pos
);
153 debug("write_reg addr = %lx, value = %ld, field = %ld, "
154 "r_width = %ld, f_width = %ld\n",
155 crp
->reg
, value
, field
, crp
->reg_width
, crp
->field_width
);
157 mask
= ~(mask
<< pos
);
158 value
= value
<< pos
;
160 data
= gpio_read_raw_reg(mapped_reg
, crp
->reg_width
);
164 if (gpioc
->unlock_reg
)
165 gpio_write_raw_reg(pfc_phys_to_virt(gpioc
, gpioc
->unlock_reg
),
168 gpio_write_raw_reg(mapped_reg
, crp
->reg_width
, data
);
171 static int setup_data_reg(struct pinmux_info
*gpioc
, unsigned gpio
)
173 struct pinmux_gpio
*gpiop
= &gpioc
->gpios
[gpio
];
174 struct pinmux_data_reg
*data_reg
;
177 if (!enum_in_range(gpiop
->enum_id
, &gpioc
->data
))
182 data_reg
= gpioc
->data_regs
+ k
;
184 if (!data_reg
->reg_width
)
187 data_reg
->mapped_reg
= pfc_phys_to_virt(gpioc
, data_reg
->reg
);
189 for (n
= 0; n
< data_reg
->reg_width
; n
++) {
190 if (data_reg
->enum_ids
[n
] == gpiop
->enum_id
) {
191 gpiop
->flags
&= ~PINMUX_FLAG_DREG
;
192 gpiop
->flags
|= (k
<< PINMUX_FLAG_DREG_SHIFT
);
193 gpiop
->flags
&= ~PINMUX_FLAG_DBIT
;
194 gpiop
->flags
|= (n
<< PINMUX_FLAG_DBIT_SHIFT
);
206 static void setup_data_regs(struct pinmux_info
*gpioc
)
208 struct pinmux_data_reg
*drp
;
211 for (k
= gpioc
->first_gpio
; k
<= gpioc
->last_gpio
; k
++)
212 setup_data_reg(gpioc
, k
);
216 drp
= gpioc
->data_regs
+ k
;
221 drp
->reg_shadow
= gpio_read_raw_reg(drp
->mapped_reg
,
227 static int get_data_reg(struct pinmux_info
*gpioc
, unsigned gpio
,
228 struct pinmux_data_reg
**drp
, int *bitp
)
230 struct pinmux_gpio
*gpiop
= &gpioc
->gpios
[gpio
];
233 if (!enum_in_range(gpiop
->enum_id
, &gpioc
->data
))
236 k
= (gpiop
->flags
& PINMUX_FLAG_DREG
) >> PINMUX_FLAG_DREG_SHIFT
;
237 n
= (gpiop
->flags
& PINMUX_FLAG_DBIT
) >> PINMUX_FLAG_DBIT_SHIFT
;
238 *drp
= gpioc
->data_regs
+ k
;
243 static int get_config_reg(struct pinmux_info
*gpioc
, pinmux_enum_t enum_id
,
244 struct pinmux_cfg_reg
**crp
,
245 int *fieldp
, int *valuep
,
246 unsigned long **cntp
)
248 struct pinmux_cfg_reg
*config_reg
;
249 unsigned long r_width
, f_width
, curr_width
, ncomb
;
250 int k
, m
, n
, pos
, bit_pos
;
254 config_reg
= gpioc
->cfg_regs
+ k
;
256 r_width
= config_reg
->reg_width
;
257 f_width
= config_reg
->field_width
;
264 for (bit_pos
= 0; bit_pos
< r_width
; bit_pos
+= curr_width
) {
266 curr_width
= f_width
;
268 curr_width
= config_reg
->var_field_width
[m
];
270 ncomb
= 1 << curr_width
;
271 for (n
= 0; n
< ncomb
; n
++) {
272 if (config_reg
->enum_ids
[pos
+ n
] == enum_id
) {
276 *cntp
= &config_reg
->cnt
[m
];
289 static int get_gpio_enum_id(struct pinmux_info
*gpioc
, unsigned gpio
,
290 int pos
, pinmux_enum_t
*enum_idp
)
292 pinmux_enum_t enum_id
= gpioc
->gpios
[gpio
].enum_id
;
293 pinmux_enum_t
*data
= gpioc
->gpio_data
;
296 if (!enum_in_range(enum_id
, &gpioc
->data
)) {
297 if (!enum_in_range(enum_id
, &gpioc
->mark
)) {
298 debug("non data/mark enum_id for gpio %d\n", gpio
);
304 *enum_idp
= data
[pos
+ 1];
308 for (k
= 0; k
< gpioc
->gpio_data_size
; k
++) {
309 if (data
[k
] == enum_id
) {
310 *enum_idp
= data
[k
+ 1];
315 debug("cannot locate data/mark enum_id for gpio %d\n", gpio
);
319 enum { GPIO_CFG_DRYRUN
, GPIO_CFG_REQ
, GPIO_CFG_FREE
};
321 static int pinmux_config_gpio(struct pinmux_info
*gpioc
, unsigned gpio
,
322 int pinmux_type
, int cfg_mode
)
324 struct pinmux_cfg_reg
*cr
= NULL
;
325 pinmux_enum_t enum_id
;
326 struct pinmux_range
*range
;
327 int in_range
, pos
, field
, value
;
330 switch (pinmux_type
) {
332 case PINMUX_TYPE_FUNCTION
:
336 case PINMUX_TYPE_OUTPUT
:
337 range
= &gpioc
->output
;
340 case PINMUX_TYPE_INPUT
:
341 range
= &gpioc
->input
;
344 case PINMUX_TYPE_INPUT_PULLUP
:
345 range
= &gpioc
->input_pu
;
348 case PINMUX_TYPE_INPUT_PULLDOWN
:
349 range
= &gpioc
->input_pd
;
361 pos
= get_gpio_enum_id(gpioc
, gpio
, pos
, &enum_id
);
368 /* first check if this is a function enum */
369 in_range
= enum_in_range(enum_id
, &gpioc
->function
);
371 /* not a function enum */
374 * other range exists, so this pin is
375 * a regular GPIO pin that now is being
376 * bound to a specific direction.
378 * for this case we only allow function enums
379 * and the enums that match the other range.
381 in_range
= enum_in_range(enum_id
, range
);
384 * special case pass through for fixed
385 * input-only or output-only pins without
386 * function enum register association.
388 if (in_range
&& enum_id
== range
->force
)
392 * no other range exists, so this pin
393 * must then be of the function type.
395 * allow function type pins to select
396 * any combination of function/in/out
397 * in their MARK lists.
406 if (get_config_reg(gpioc
, enum_id
, &cr
,
407 &field
, &value
, &cntp
) != 0)
411 case GPIO_CFG_DRYRUN
:
413 (read_config_reg(gpioc
, cr
, field
) != value
))
418 write_config_reg(gpioc
, cr
, field
, value
);
434 static DEFINE_SPINLOCK(gpio_lock
);
435 static struct pinmux_info
*chip_to_pinmux(struct gpio_chip
*chip
)
437 return container_of(chip
, struct pinmux_info
, chip
);
441 static int sh_gpio_request(unsigned offset
)
443 struct pinmux_data_reg
*dummy
;
444 int i
, ret
, pinmux_type
;
451 if ((gpioc
->gpios
[offset
].flags
& PINMUX_FLAG_TYPE
) != PINMUX_TYPE_NONE
)
454 /* setup pin function here if no data is associated with pin */
456 if (get_data_reg(gpioc
, offset
, &dummy
, &i
) != 0)
457 pinmux_type
= PINMUX_TYPE_FUNCTION
;
459 pinmux_type
= PINMUX_TYPE_GPIO
;
461 if (pinmux_type
== PINMUX_TYPE_FUNCTION
) {
462 if (pinmux_config_gpio(gpioc
, offset
,
464 GPIO_CFG_DRYRUN
) != 0)
467 if (pinmux_config_gpio(gpioc
, offset
,
473 gpioc
->gpios
[offset
].flags
&= ~PINMUX_FLAG_TYPE
;
474 gpioc
->gpios
[offset
].flags
|= pinmux_type
;
481 static void sh_gpio_free(unsigned offset
)
488 pinmux_type
= gpioc
->gpios
[offset
].flags
& PINMUX_FLAG_TYPE
;
489 pinmux_config_gpio(gpioc
, offset
, pinmux_type
, GPIO_CFG_FREE
);
490 gpioc
->gpios
[offset
].flags
&= ~PINMUX_FLAG_TYPE
;
491 gpioc
->gpios
[offset
].flags
|= PINMUX_TYPE_NONE
;
494 static int pinmux_direction(struct pinmux_info
*gpioc
,
495 unsigned gpio
, int new_pinmux_type
)
503 pinmux_type
= gpioc
->gpios
[gpio
].flags
& PINMUX_FLAG_TYPE
;
505 switch (pinmux_type
) {
506 case PINMUX_TYPE_GPIO
:
508 case PINMUX_TYPE_OUTPUT
:
509 case PINMUX_TYPE_INPUT
:
510 case PINMUX_TYPE_INPUT_PULLUP
:
511 case PINMUX_TYPE_INPUT_PULLDOWN
:
512 pinmux_config_gpio(gpioc
, gpio
, pinmux_type
, GPIO_CFG_FREE
);
518 if (pinmux_config_gpio(gpioc
, gpio
,
520 GPIO_CFG_DRYRUN
) != 0)
523 if (pinmux_config_gpio(gpioc
, gpio
,
528 gpioc
->gpios
[gpio
].flags
&= ~PINMUX_FLAG_TYPE
;
529 gpioc
->gpios
[gpio
].flags
|= new_pinmux_type
;
536 static int sh_gpio_direction_input(unsigned offset
)
538 return pinmux_direction(gpioc
, offset
, PINMUX_TYPE_INPUT
);
541 static void sh_gpio_set_value(struct pinmux_info
*gpioc
,
542 unsigned gpio
, int value
)
544 struct pinmux_data_reg
*dr
= NULL
;
547 if (!gpioc
|| get_data_reg(gpioc
, gpio
, &dr
, &bit
) != 0)
550 gpio_write_bit(dr
, bit
, value
);
553 static int sh_gpio_direction_output(unsigned offset
, int value
)
555 sh_gpio_set_value(gpioc
, offset
, value
);
556 return pinmux_direction(gpioc
, offset
, PINMUX_TYPE_OUTPUT
);
559 static int sh_gpio_get_value(struct pinmux_info
*gpioc
, unsigned gpio
)
561 struct pinmux_data_reg
*dr
= NULL
;
564 if (!gpioc
|| get_data_reg(gpioc
, gpio
, &dr
, &bit
) != 0)
567 return gpio_read_bit(dr
, bit
);
570 static int sh_gpio_get(unsigned offset
)
572 return sh_gpio_get_value(gpioc
, offset
);
575 static void sh_gpio_set(unsigned offset
, int value
)
577 sh_gpio_set_value(gpioc
, offset
, value
);
580 int register_pinmux(struct pinmux_info
*pip
)
584 debug("%s deregistering\n", pip
->name
);
585 setup_data_regs(gpioc
);
590 int unregister_pinmux(struct pinmux_info
*pip
)
592 debug("%s deregistering\n", pip
->name
);
600 int gpio_request(unsigned gpio
, const char *label
)
602 sh_gpio_request(gpio
);
606 int gpio_free(unsigned gpio
)
612 int gpio_direction_input(unsigned gpio
)
614 return sh_gpio_direction_input(gpio
);
617 int gpio_direction_output(unsigned gpio
, int value
)
619 return sh_gpio_direction_output(gpio
, value
);
622 void gpio_set_value(unsigned gpio
, int value
)
624 sh_gpio_set(gpio
, value
);
627 int gpio_get_value(unsigned gpio
)
629 return sh_gpio_get(gpio
);