]>
git.ipfire.org Git - people/ms/u-boot.git/blob - drivers/gpio/stm32_gpio.c
3 * Yuri Tikhonov, Emcraft Systems, yur@emcraft.com
6 * Kamil Lulko, <kamil.lulko@gmail.com>
8 * Copyright 2015 ATS Advanced Telematics Systems GmbH
9 * Copyright 2015 Konsulko Group, Matt Porter <mporter@konsulko.com>
11 * SPDX-License-Identifier: GPL-2.0+
16 #include <linux/errno.h>
17 #include <asm/arch/stm32.h>
18 #include <asm/arch/gpio.h>
20 DECLARE_GLOBAL_DATA_PTR
;
22 #if defined(CONFIG_STM32F4) || defined(CONFIG_STM32F7)
23 static const unsigned long io_base
[] = {
24 STM32_GPIOA_BASE
, STM32_GPIOB_BASE
, STM32_GPIOC_BASE
,
25 STM32_GPIOD_BASE
, STM32_GPIOE_BASE
, STM32_GPIOF_BASE
,
26 STM32_GPIOG_BASE
, STM32_GPIOH_BASE
, STM32_GPIOI_BASE
29 struct stm32_gpio_regs
{
30 u32 moder
; /* GPIO port mode */
31 u32 otyper
; /* GPIO port output type */
32 u32 ospeedr
; /* GPIO port output speed */
33 u32 pupdr
; /* GPIO port pull-up/pull-down */
34 u32 idr
; /* GPIO port input data */
35 u32 odr
; /* GPIO port output data */
36 u32 bsrr
; /* GPIO port bit set/reset */
37 u32 lckr
; /* GPIO port configuration lock */
38 u32 afr
[2]; /* GPIO alternate function */
41 #define CHECK_DSC(x) (!x || x->port > 8 || x->pin > 15)
42 #define CHECK_CTL(x) (!x || x->af > 15 || x->mode > 3 || x->otype > 1 || \
43 x->pupd > 2 || x->speed > 3)
45 int stm32_gpio_config(const struct stm32_gpio_dsc
*dsc
,
46 const struct stm32_gpio_ctl
*ctl
)
48 struct stm32_gpio_regs
*gpio_regs
;
61 gpio_regs
= (struct stm32_gpio_regs
*)io_base
[dsc
->port
];
63 i
= (dsc
->pin
& 0x07) * 4;
64 clrsetbits_le32(&gpio_regs
->afr
[dsc
->pin
>> 3], 0xF << i
, ctl
->af
<< i
);
68 clrsetbits_le32(&gpio_regs
->moder
, 0x3 << i
, ctl
->mode
<< i
);
69 clrsetbits_le32(&gpio_regs
->otyper
, 0x3 << i
, ctl
->otype
<< i
);
70 clrsetbits_le32(&gpio_regs
->ospeedr
, 0x3 << i
, ctl
->speed
<< i
);
71 clrsetbits_le32(&gpio_regs
->pupdr
, 0x3 << i
, ctl
->pupd
<< i
);
77 #elif defined(CONFIG_STM32F1)
78 static const unsigned long io_base
[] = {
79 STM32_GPIOA_BASE
, STM32_GPIOB_BASE
, STM32_GPIOC_BASE
,
80 STM32_GPIOD_BASE
, STM32_GPIOE_BASE
, STM32_GPIOF_BASE
,
84 #define STM32_GPIO_CR_MODE_MASK 0x3
85 #define STM32_GPIO_CR_MODE_SHIFT(p) (p * 4)
86 #define STM32_GPIO_CR_CNF_MASK 0x3
87 #define STM32_GPIO_CR_CNF_SHIFT(p) (p * 4 + 2)
89 struct stm32_gpio_regs
{
90 u32 crl
; /* GPIO port configuration low */
91 u32 crh
; /* GPIO port configuration high */
92 u32 idr
; /* GPIO port input data */
93 u32 odr
; /* GPIO port output data */
94 u32 bsrr
; /* GPIO port bit set/reset */
95 u32 brr
; /* GPIO port bit reset */
96 u32 lckr
; /* GPIO port configuration lock */
99 #define CHECK_DSC(x) (!x || x->port > 6 || x->pin > 15)
100 #define CHECK_CTL(x) (!x || x->mode > 3 || x->icnf > 3 || x->ocnf > 3 || \
103 int stm32_gpio_config(const struct stm32_gpio_dsc
*dsc
,
104 const struct stm32_gpio_ctl
*ctl
)
106 struct stm32_gpio_regs
*gpio_regs
;
111 if (CHECK_DSC(dsc
)) {
115 if (CHECK_CTL(ctl
)) {
122 gpio_regs
= (struct stm32_gpio_regs
*)io_base
[dsc
->port
];
125 cr
= &gpio_regs
->crl
;
128 cr
= &gpio_regs
->crh
;
132 clrbits_le32(cr
, 0x3 << STM32_GPIO_CR_MODE_SHIFT(crp
));
133 setbits_le32(cr
, ctl
->mode
<< STM32_GPIO_CR_MODE_SHIFT(crp
));
135 clrbits_le32(cr
, 0x3 << STM32_GPIO_CR_CNF_SHIFT(crp
));
136 /* Inputs set the optional pull up / pull down */
137 if (ctl
->mode
== STM32_GPIO_MODE_IN
) {
138 setbits_le32(cr
, ctl
->icnf
<< STM32_GPIO_CR_CNF_SHIFT(crp
));
139 clrbits_le32(&gpio_regs
->odr
, 0x1 << p
);
140 setbits_le32(&gpio_regs
->odr
, ctl
->pupd
<< p
);
142 setbits_le32(cr
, ctl
->ocnf
<< STM32_GPIO_CR_CNF_SHIFT(crp
));
150 #error STM32 family not supported
153 int stm32_gpout_set(const struct stm32_gpio_dsc
*dsc
, int state
)
155 struct stm32_gpio_regs
*gpio_regs
;
158 if (CHECK_DSC(dsc
)) {
163 gpio_regs
= (struct stm32_gpio_regs
*)io_base
[dsc
->port
];
166 writel(1 << dsc
->pin
, &gpio_regs
->bsrr
);
168 writel(1 << (dsc
->pin
+ 16), &gpio_regs
->bsrr
);
175 int stm32_gpin_get(const struct stm32_gpio_dsc
*dsc
)
177 struct stm32_gpio_regs
*gpio_regs
;
180 if (CHECK_DSC(dsc
)) {
185 gpio_regs
= (struct stm32_gpio_regs
*)io_base
[dsc
->port
];
186 rv
= readl(&gpio_regs
->idr
) & (1 << dsc
->pin
);
191 /* Common GPIO API */
193 int gpio_request(unsigned gpio
, const char *label
)
198 int gpio_free(unsigned gpio
)
203 int gpio_direction_input(unsigned gpio
)
205 struct stm32_gpio_dsc dsc
;
206 struct stm32_gpio_ctl ctl
;
208 dsc
.port
= stm32_gpio_to_port(gpio
);
209 dsc
.pin
= stm32_gpio_to_pin(gpio
);
210 #if defined(CONFIG_STM32F4) || defined(CONFIG_STM32F7)
211 ctl
.af
= STM32_GPIO_AF0
;
212 ctl
.mode
= STM32_GPIO_MODE_IN
;
213 ctl
.otype
= STM32_GPIO_OTYPE_PP
;
214 ctl
.pupd
= STM32_GPIO_PUPD_NO
;
215 ctl
.speed
= STM32_GPIO_SPEED_50M
;
216 #elif defined(CONFIG_STM32F1)
217 ctl
.mode
= STM32_GPIO_MODE_IN
;
218 ctl
.icnf
= STM32_GPIO_ICNF_IN_FLT
;
219 ctl
.ocnf
= STM32_GPIO_OCNF_GP_PP
; /* ignored for input */
220 ctl
.pupd
= STM32_GPIO_PUPD_UP
; /* ignored for floating */
222 #error STM32 family not supported
225 return stm32_gpio_config(&dsc
, &ctl
);
228 int gpio_direction_output(unsigned gpio
, int value
)
230 struct stm32_gpio_dsc dsc
;
231 struct stm32_gpio_ctl ctl
;
234 dsc
.port
= stm32_gpio_to_port(gpio
);
235 dsc
.pin
= stm32_gpio_to_pin(gpio
);
236 #if defined(CONFIG_STM32F4) || defined(CONFIG_STM32F7)
237 ctl
.af
= STM32_GPIO_AF0
;
238 ctl
.mode
= STM32_GPIO_MODE_OUT
;
239 ctl
.pupd
= STM32_GPIO_PUPD_NO
;
240 ctl
.speed
= STM32_GPIO_SPEED_50M
;
241 #elif defined(CONFIG_STM32F1)
242 ctl
.mode
= STM32_GPIO_MODE_OUT_50M
;
243 ctl
.ocnf
= STM32_GPIO_OCNF_GP_PP
;
244 ctl
.icnf
= STM32_GPIO_ICNF_IN_FLT
; /* ignored for output */
245 ctl
.pupd
= STM32_GPIO_PUPD_UP
; /* ignored for output */
247 #error STM32 family not supported
250 res
= stm32_gpio_config(&dsc
, &ctl
);
253 res
= stm32_gpout_set(&dsc
, value
);
258 int gpio_get_value(unsigned gpio
)
260 struct stm32_gpio_dsc dsc
;
262 dsc
.port
= stm32_gpio_to_port(gpio
);
263 dsc
.pin
= stm32_gpio_to_pin(gpio
);
265 return stm32_gpin_get(&dsc
);
268 int gpio_set_value(unsigned gpio
, int value
)
270 struct stm32_gpio_dsc dsc
;
272 dsc
.port
= stm32_gpio_to_port(gpio
);
273 dsc
.pin
= stm32_gpio_to_pin(gpio
);
275 return stm32_gpout_set(&dsc
, value
);