1 /* SPDX-License-Identifier: GPL-2.0 OR MIT */
3 * Copyright 2014-2022 Advanced Micro Devices, Inc.
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6 * copy of this software and associated documentation files (the "Software"),
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10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
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16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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24 #ifndef KFD_PRIV_H_INCLUDED
25 #define KFD_PRIV_H_INCLUDED
27 #include <linux/hashtable.h>
28 #include <linux/mmu_notifier.h>
29 #include <linux/memremap.h>
30 #include <linux/mutex.h>
31 #include <linux/types.h>
32 #include <linux/atomic.h>
33 #include <linux/workqueue.h>
34 #include <linux/spinlock.h>
35 #include <linux/kfd_ioctl.h>
36 #include <linux/idr.h>
37 #include <linux/kfifo.h>
38 #include <linux/seq_file.h>
39 #include <linux/kref.h>
40 #include <linux/sysfs.h>
41 #include <linux/device_cgroup.h>
42 #include <drm/drm_file.h>
43 #include <drm/drm_drv.h>
44 #include <drm/drm_device.h>
45 #include <drm/drm_ioctl.h>
46 #include <kgd_kfd_interface.h>
47 #include <linux/swap.h>
49 #include "amd_shared.h"
52 #define KFD_MAX_RING_ENTRY_SIZE 8
54 #define KFD_SYSFS_FILE_MODE 0444
56 /* GPU ID hash width in bits */
57 #define KFD_GPU_ID_HASH_WIDTH 16
59 /* Use upper bits of mmap offset to store KFD driver specific information.
60 * BITS[63:62] - Encode MMAP type
61 * BITS[61:46] - Encode gpu_id. To identify to which GPU the offset belongs to
62 * BITS[45:0] - MMAP offset value
64 * NOTE: struct vm_area_struct.vm_pgoff uses offset in pages. Hence, these
65 * defines are w.r.t to PAGE_SIZE
67 #define KFD_MMAP_TYPE_SHIFT 62
68 #define KFD_MMAP_TYPE_MASK (0x3ULL << KFD_MMAP_TYPE_SHIFT)
69 #define KFD_MMAP_TYPE_DOORBELL (0x3ULL << KFD_MMAP_TYPE_SHIFT)
70 #define KFD_MMAP_TYPE_EVENTS (0x2ULL << KFD_MMAP_TYPE_SHIFT)
71 #define KFD_MMAP_TYPE_RESERVED_MEM (0x1ULL << KFD_MMAP_TYPE_SHIFT)
72 #define KFD_MMAP_TYPE_MMIO (0x0ULL << KFD_MMAP_TYPE_SHIFT)
74 #define KFD_MMAP_GPU_ID_SHIFT 46
75 #define KFD_MMAP_GPU_ID_MASK (((1ULL << KFD_GPU_ID_HASH_WIDTH) - 1) \
76 << KFD_MMAP_GPU_ID_SHIFT)
77 #define KFD_MMAP_GPU_ID(gpu_id) ((((uint64_t)gpu_id) << KFD_MMAP_GPU_ID_SHIFT)\
78 & KFD_MMAP_GPU_ID_MASK)
79 #define KFD_MMAP_GET_GPU_ID(offset) ((offset & KFD_MMAP_GPU_ID_MASK) \
80 >> KFD_MMAP_GPU_ID_SHIFT)
83 * When working with cp scheduler we should assign the HIQ manually or via
84 * the amdgpu driver to a fixed hqd slot, here are the fixed HIQ hqd slot
85 * definitions for Kaveri. In Kaveri only the first ME queues participates
86 * in the cp scheduling taking that in mind we set the HIQ slot in the
89 #define KFD_CIK_HIQ_PIPE 4
90 #define KFD_CIK_HIQ_QUEUE 0
92 /* Macro for allocating structures */
93 #define kfd_alloc_struct(ptr_to_struct) \
94 ((typeof(ptr_to_struct)) kzalloc(sizeof(*ptr_to_struct), GFP_KERNEL))
96 #define KFD_MAX_NUM_OF_PROCESSES 512
97 #define KFD_MAX_NUM_OF_QUEUES_PER_PROCESS 1024
100 * Size of the per-process TBA+TMA buffer: 2 pages
102 * The first page is the TBA used for the CWSR ISA code. The second
103 * page is used as TMA for user-mode trap handler setup in daisy-chain mode.
105 #define KFD_CWSR_TBA_TMA_SIZE (PAGE_SIZE * 2)
106 #define KFD_CWSR_TMA_OFFSET PAGE_SIZE
108 #define KFD_MAX_NUM_OF_QUEUES_PER_DEVICE \
109 (KFD_MAX_NUM_OF_PROCESSES * \
110 KFD_MAX_NUM_OF_QUEUES_PER_PROCESS)
112 #define KFD_KERNEL_QUEUE_SIZE 2048
114 #define KFD_UNMAP_LATENCY_MS (4000)
116 #define KFD_MAX_SDMA_QUEUES 128
120 * The doorbell index distance between SDMA RLC (2*i) and (2*i+1) in the
121 * same SDMA engine on SOC15, which has 8-byte doorbells for SDMA.
122 * 512 8-byte doorbell distance (i.e. one page away) ensures that SDMA RLC
123 * (2*i+1) doorbells (in terms of the lower 12 bit address) lie exactly in
124 * the OFFSET and SIZE set in registers like BIF_SDMA0_DOORBELL_RANGE.
126 #define KFD_QUEUE_DOORBELL_MIRROR_OFFSET 512
129 * enum kfd_ioctl_flags - KFD ioctl flags
130 * Various flags that can be set in &amdkfd_ioctl_desc.flags to control how
131 * userspace can use a given ioctl.
133 enum kfd_ioctl_flags
{
135 * @KFD_IOC_FLAG_CHECKPOINT_RESTORE:
136 * Certain KFD ioctls such as AMDKFD_IOC_CRIU_OP can potentially
137 * perform privileged operations and load arbitrary data into MQDs and
138 * eventually HQD registers when the queue is mapped by HWS. In order to
139 * prevent this we should perform additional security checks.
141 * This is equivalent to callers with the CHECKPOINT_RESTORE capability.
143 * Note: Since earlier versions of docker do not support CHECKPOINT_RESTORE,
144 * we also allow ioctls with SYS_ADMIN capability.
146 KFD_IOC_FLAG_CHECKPOINT_RESTORE
= BIT(0),
149 * Kernel module parameter to specify maximum number of supported queues per
152 extern int max_num_of_queues_per_device
;
155 /* Kernel module parameter to specify the scheduling policy */
156 extern int sched_policy
;
159 * Kernel module parameter to specify the maximum process
160 * number per HW scheduler
162 extern int hws_max_conc_proc
;
164 extern int cwsr_enable
;
167 * Kernel module parameter to specify whether to send sigterm to HSA process on
168 * unhandled exception
170 extern int send_sigterm
;
173 * This kernel module is used to simulate large bar machine on non-large bar
176 extern int debug_largebar
;
178 /* Set sh_mem_config.retry_disable on GFX v9 */
179 extern int amdgpu_noretry
;
181 /* Halt if HWS hang is detected */
182 extern int halt_if_hws_hang
;
184 /* Whether MEC FW support GWS barriers */
185 extern bool hws_gws_support
;
187 /* Queue preemption timeout in ms */
188 extern int queue_preemption_timeout_ms
;
191 * Don't evict process queues on vm fault
193 extern int amdgpu_no_queue_eviction_on_vm_fault
;
195 /* Enable eviction debug messages */
196 extern bool debug_evictions
;
198 extern struct mutex kfd_processes_mutex
;
201 cache_policy_coherent
,
202 cache_policy_noncoherent
205 #define KFD_GC_VERSION(dev) (amdgpu_ip_version((dev)->adev, GC_HWIP, 0))
206 #define KFD_IS_SOC15(dev) ((KFD_GC_VERSION(dev)) >= (IP_VERSION(9, 0, 1)))
207 #define KFD_SUPPORT_XNACK_PER_PROCESS(dev)\
208 ((KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 2)) || \
209 (KFD_GC_VERSION(dev) == IP_VERSION(9, 4, 3)))
213 struct kfd_event_interrupt_class
{
214 bool (*interrupt_isr
)(struct kfd_node
*dev
,
215 const uint32_t *ih_ring_entry
, uint32_t *patched_ihre
,
217 void (*interrupt_wq
)(struct kfd_node
*dev
,
218 const uint32_t *ih_ring_entry
);
221 struct kfd_device_info
{
222 uint32_t gfx_target_version
;
223 const struct kfd_event_interrupt_class
*event_interrupt_class
;
224 unsigned int max_pasid_bits
;
225 unsigned int max_no_of_hqd
;
226 unsigned int doorbell_size
;
227 size_t ih_ring_entry_size
;
228 uint8_t num_of_watch_points
;
229 uint16_t mqd_size_aligned
;
231 bool needs_pci_atomics
;
232 uint32_t no_atomic_fw_version
;
233 unsigned int num_sdma_queues_per_engine
;
234 unsigned int num_reserved_sdma_queues_per_engine
;
235 DECLARE_BITMAP(reserved_sdma_queues_bitmap
, KFD_MAX_SDMA_QUEUES
);
238 unsigned int kfd_get_num_sdma_engines(struct kfd_node
*kdev
);
239 unsigned int kfd_get_num_xgmi_sdma_engines(struct kfd_node
*kdev
);
242 uint32_t range_start
;
249 struct kfd_vmid_info
{
250 uint32_t first_vmid_kfd
;
251 uint32_t last_vmid_kfd
;
252 uint32_t vmid_num_kfd
;
255 #define MAX_KFD_NODES 8
260 unsigned int node_id
;
261 struct amdgpu_device
*adev
; /* Duplicated here along with keeping
262 * a copy in kfd_dev to save a hop
264 const struct kfd2kgd_calls
*kfd2kgd
; /* Duplicated here along with
265 * keeping a copy in kfd_dev to
268 struct kfd_vmid_info vm_info
;
269 unsigned int id
; /* topology stub index */
270 uint32_t xcc_mask
; /* Instance mask of XCCs present */
271 struct amdgpu_xcp
*xcp
;
274 struct kfifo ih_fifo
;
275 struct workqueue_struct
*ih_wq
;
276 struct work_struct interrupt_work
;
277 spinlock_t interrupt_lock
;
280 * Interrupts of interest to KFD are copied
281 * from the HW ring into a SW ring.
283 bool interrupts_active
;
284 uint32_t interrupt_bitmap
; /* Only used for GFX 9.4.3 */
286 /* QCM Device instance */
287 struct device_queue_manager
*dqm
;
289 /* Global GWS resource shared between processes */
291 bool gws_debug_workaround
;
293 /* Clients watching SMI events */
294 struct list_head smi_clients
;
296 uint32_t reset_seq_num
;
299 atomic_t sram_ecc_flag
;
302 unsigned int spm_pasid
;
304 /* Maximum process number mapped to HW scheduler */
305 unsigned int max_proc_per_quantum
;
307 unsigned int compute_vmid_bitmap
;
309 struct kfd_local_mem_info local_mem_info
;
315 struct amdgpu_device
*adev
;
317 struct kfd_device_info device_info
;
319 u32 __iomem
*doorbell_kernel_ptr
; /* This is a pointer for a doorbells
320 * page used by kernel queue
323 struct kgd2kfd_shared_resources shared_resources
;
325 const struct kfd2kgd_calls
*kfd2kgd
;
326 struct mutex doorbell_mutex
;
329 uint64_t gtt_start_gpu_addr
;
330 void *gtt_start_cpu_ptr
;
332 struct mutex gtt_sa_lock
;
333 unsigned int gtt_sa_chunk_size
;
334 unsigned int gtt_sa_num_of_chunks
;
338 /* Firmware versions */
339 uint16_t mec_fw_version
;
340 uint16_t mec2_fw_version
;
341 uint16_t sdma_fw_version
;
345 const void *cwsr_isa
;
346 unsigned int cwsr_isa_size
;
351 bool pci_atomic_requested
;
353 /* Compute Profile ref. count */
354 atomic_t compute_profile
;
356 struct ida doorbell_ida
;
357 unsigned int max_doorbell_slices
;
361 struct kfd_node
*nodes
[MAX_KFD_NODES
];
362 unsigned int num_nodes
;
364 /* Track per device allocated watch points */
365 uint32_t alloc_watch_ids
;
366 spinlock_t watch_points_lock
;
368 /* Kernel doorbells for KFD device */
369 struct amdgpu_bo
*doorbells
;
371 /* bitmap for dynamic doorbell allocation from doorbell object */
372 unsigned long *doorbell_bitmap
;
376 KFD_MEMPOOL_SYSTEM_CACHEABLE
= 1,
377 KFD_MEMPOOL_SYSTEM_WRITECOMBINE
= 2,
378 KFD_MEMPOOL_FRAMEBUFFER
= 3,
381 /* Character device interface */
382 int kfd_chardev_init(void);
383 void kfd_chardev_exit(void);
386 * enum kfd_unmap_queues_filter - Enum for queue filters.
388 * @KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES: Preempts all queues in the
389 * running queues list.
391 * @KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES: Preempts all non-static queues
394 * @KFD_UNMAP_QUEUES_FILTER_BY_PASID: Preempts queues that belongs to
398 enum kfd_unmap_queues_filter
{
399 KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES
= 1,
400 KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES
= 2,
401 KFD_UNMAP_QUEUES_FILTER_BY_PASID
= 3
405 * enum kfd_queue_type - Enum for various queue types.
407 * @KFD_QUEUE_TYPE_COMPUTE: Regular user mode queue type.
409 * @KFD_QUEUE_TYPE_SDMA: SDMA user mode queue type.
411 * @KFD_QUEUE_TYPE_HIQ: HIQ queue type.
413 * @KFD_QUEUE_TYPE_DIQ: DIQ queue type.
415 * @KFD_QUEUE_TYPE_SDMA_XGMI: Special SDMA queue for XGMI interface.
417 enum kfd_queue_type
{
418 KFD_QUEUE_TYPE_COMPUTE
,
422 KFD_QUEUE_TYPE_SDMA_XGMI
425 enum kfd_queue_format
{
426 KFD_QUEUE_FORMAT_PM4
,
430 enum KFD_QUEUE_PRIORITY
{
431 KFD_QUEUE_PRIORITY_MINIMUM
= 0,
432 KFD_QUEUE_PRIORITY_MAXIMUM
= 15
436 * struct queue_properties
438 * @type: The queue type.
440 * @queue_id: Queue identifier.
442 * @queue_address: Queue ring buffer address.
444 * @queue_size: Queue ring buffer size.
446 * @priority: Defines the queue priority relative to other queues in the
448 * This is just an indication and HW scheduling may override the priority as
449 * necessary while keeping the relative prioritization.
450 * the priority granularity is from 0 to f which f is the highest priority.
451 * currently all queues are initialized with the highest priority.
453 * @queue_percent: This field is partially implemented and currently a zero in
454 * this field defines that the queue is non active.
456 * @read_ptr: User space address which points to the number of dwords the
457 * cp read from the ring buffer. This field updates automatically by the H/W.
459 * @write_ptr: Defines the number of dwords written to the ring buffer.
461 * @doorbell_ptr: Notifies the H/W of new packet written to the queue ring
462 * buffer. This field should be similar to write_ptr and the user should
463 * update this field after updating the write_ptr.
465 * @doorbell_off: The doorbell offset in the doorbell pci-bar.
467 * @is_interop: Defines if this is a interop queue. Interop queue means that
468 * the queue can access both graphics and compute resources.
470 * @is_evicted: Defines if the queue is evicted. Only active queues
471 * are evicted, rendering them inactive.
473 * @is_active: Defines if the queue is active or not. @is_active and
474 * @is_evicted are protected by the DQM lock.
476 * @is_gws: Defines if the queue has been updated to be GWS-capable or not.
477 * @is_gws should be protected by the DQM lock, since changing it can yield the
478 * possibility of updating DQM state on number of GWS queues.
480 * @vmid: If the scheduling mode is no cp scheduling the field defines the vmid
483 * This structure represents the queue properties for each queue no matter if
484 * it's user mode or kernel mode queue.
488 struct queue_properties
{
489 enum kfd_queue_type type
;
490 enum kfd_queue_format format
;
491 unsigned int queue_id
;
492 uint64_t queue_address
;
495 uint32_t queue_percent
;
498 void __iomem
*doorbell_ptr
;
499 uint32_t doorbell_off
;
503 bool is_being_destroyed
;
506 uint32_t pm4_target_xcc
;
508 bool is_user_cu_masked
;
509 /* Not relevant for user mode queues in cp scheduling */
511 /* Relevant only for sdma queues*/
512 uint32_t sdma_engine_id
;
513 uint32_t sdma_queue_id
;
514 uint32_t sdma_vm_addr
;
515 /* Relevant only for VI */
516 uint64_t eop_ring_buffer_address
;
517 uint32_t eop_ring_buffer_size
;
518 uint64_t ctx_save_restore_area_address
;
519 uint32_t ctx_save_restore_area_size
;
520 uint32_t ctl_stack_size
;
523 uint64_t exception_status
;
526 #define QUEUE_IS_ACTIVE(q) ((q).queue_size > 0 && \
527 (q).queue_address != 0 && \
528 (q).queue_percent > 0 && \
532 enum mqd_update_flag
{
533 UPDATE_FLAG_DBG_WA_ENABLE
= 1,
534 UPDATE_FLAG_DBG_WA_DISABLE
= 2,
537 struct mqd_update_info
{
540 uint32_t count
; /* Must be a multiple of 32 */
544 enum mqd_update_flag update_flag
;
550 * @list: Queue linked list.
552 * @mqd: The queue MQD (memory queue descriptor).
554 * @mqd_mem_obj: The MQD local gpu memory object.
556 * @gart_mqd_addr: The MQD gart mc address.
558 * @properties: The queue properties.
560 * @mec: Used only in no cp scheduling mode and identifies to micro engine id
561 * that the queue should be executed on.
563 * @pipe: Used only in no cp scheduling mode and identifies the queue's pipe
566 * @queue: Used only in no cp scheduliong mode and identifies the queue's slot.
568 * @process: The kfd process that created this queue.
570 * @device: The kfd device that created this queue.
572 * @gws: Pointing to gws kgd_mem if this is a gws control queue; NULL
575 * This structure represents user mode compute queues.
576 * It contains all the necessary data to handle such queues.
581 struct list_head list
;
583 struct kfd_mem_obj
*mqd_mem_obj
;
584 uint64_t gart_mqd_addr
;
585 struct queue_properties properties
;
591 unsigned int sdma_id
;
592 unsigned int doorbell_id
;
594 struct kfd_process
*process
;
595 struct kfd_node
*device
;
602 uint64_t gang_ctx_gpu_addr
;
603 void *gang_ctx_cpu_ptr
;
605 struct amdgpu_bo
*wptr_bo
;
609 KFD_MQD_TYPE_HIQ
= 0, /* for hiq */
610 KFD_MQD_TYPE_CP
, /* for cp queues and diq */
611 KFD_MQD_TYPE_SDMA
, /* for sdma queues */
612 KFD_MQD_TYPE_DIQ
, /* for diq */
616 enum KFD_PIPE_PRIORITY
{
617 KFD_PIPE_PRIORITY_CS_LOW
= 0,
618 KFD_PIPE_PRIORITY_CS_MEDIUM
,
619 KFD_PIPE_PRIORITY_CS_HIGH
622 struct scheduling_resources
{
623 unsigned int vmid_mask
;
624 enum kfd_queue_type type
;
628 uint32_t gds_heap_base
;
629 uint32_t gds_heap_size
;
632 struct process_queue_manager
{
634 struct kfd_process
*process
;
635 struct list_head queues
;
636 unsigned long *queue_slot_bitmap
;
639 struct qcm_process_device
{
640 /* The Device Queue Manager that owns this data */
641 struct device_queue_manager
*dqm
;
642 struct process_queue_manager
*pqm
;
644 struct list_head queues_list
;
645 struct list_head priv_queue_list
;
647 unsigned int queue_count
;
650 unsigned int evicted
; /* eviction counter, 0=active */
652 /* This flag tells if we should reset all wavefronts on
653 * process termination
655 bool reset_wavefronts
;
657 /* This flag tells us if this process has a GWS-capable
658 * queue that will be mapped into the runlist. It's
659 * possible to request a GWS BO, but not have the queue
660 * currently mapped, and this changes how the MAP_PROCESS
661 * PM4 packet is configured.
663 bool mapped_gws_queue
;
665 /* All the memory management data should be here too */
666 uint64_t gds_context_area
;
667 /* Contains page table flags such as AMDGPU_PTE_VALID since gfx9 */
668 uint64_t page_table_base
;
669 uint32_t sh_mem_config
;
670 uint32_t sh_mem_bases
;
671 uint32_t sh_mem_ape1_base
;
672 uint32_t sh_mem_ape1_limit
;
676 uint32_t sh_hidden_private_base
;
679 struct kgd_mem
*cwsr_mem
;
686 struct kgd_mem
*ib_mem
;
690 /* doorbells for kfd process */
691 struct amdgpu_bo
*proc_doorbells
;
693 /* bitmap for dynamic doorbell allocation from the bo */
694 unsigned long *doorbell_bitmap
;
697 /* KFD Memory Eviction */
699 /* Approx. wait time before attempting to restore evicted BOs */
700 #define PROCESS_RESTORE_TIME_MS 100
701 /* Approx. back off time if restore fails due to lack of memory */
702 #define PROCESS_BACK_OFF_TIME_MS 100
703 /* Approx. time before evicting the process again */
704 #define PROCESS_ACTIVE_TIME_MS 10
706 /* 8 byte handle containing GPU ID in the most significant 4 bytes and
707 * idr_handle in the least significant 4 bytes
709 #define MAKE_HANDLE(gpu_id, idr_handle) \
710 (((uint64_t)(gpu_id) << 32) + idr_handle)
711 #define GET_GPU_ID(handle) (handle >> 32)
712 #define GET_IDR_HANDLE(handle) (handle & 0xFFFFFFFF)
720 #define MAX_SYSFS_FILENAME_LEN 15
723 * SDMA counter runs at 100MHz frequency.
724 * We display SDMA activity in microsecond granularity in sysfs.
725 * As a result, the divisor is 100.
727 #define SDMA_ACTIVITY_DIVISOR 100
729 /* Data that is per-process-per device. */
730 struct kfd_process_device
{
731 /* The device that owns this data. */
732 struct kfd_node
*dev
;
734 /* The process that owns this kfd_process_device. */
735 struct kfd_process
*process
;
737 /* per-process-per device QCM data structure */
738 struct qcm_process_device qpd
;
744 uint64_t gpuvm_limit
;
745 uint64_t scratch_base
;
746 uint64_t scratch_limit
;
748 /* VM context for GPUVM allocations */
749 struct file
*drm_file
;
753 /* GPUVM allocations storage */
754 struct idr alloc_idr
;
756 /* Flag used to tell the pdd has dequeued from the dqm.
757 * This is used to prevent dev->dqm->ops.process_termination() from
758 * being called twice when it is already called in IOMMU callback
761 bool already_dequeued
;
764 /* Is this process/pasid bound to this device? (amd_iommu_bind_pasid) */
765 enum kfd_pdd_bound bound
;
769 struct attribute attr_vram
;
770 char vram_filename
[MAX_SYSFS_FILENAME_LEN
];
772 /* SDMA activity tracking */
773 uint64_t sdma_past_activity_counter
;
774 struct attribute attr_sdma
;
775 char sdma_filename
[MAX_SYSFS_FILENAME_LEN
];
777 /* Eviction activity tracking */
778 uint64_t last_evict_timestamp
;
779 atomic64_t evict_duration_counter
;
780 struct attribute attr_evict
;
782 struct kobject
*kobj_stats
;
785 * @cu_occupancy: Reports occupancy of Compute Units (CU) of a process
786 * that is associated with device encoded by "this" struct instance. The
787 * value reflects CU usage by all of the waves launched by this process
788 * on this device. A very important property of occupancy parameter is
789 * that its value is a snapshot of current use.
791 * Following is to be noted regarding how this parameter is reported:
793 * The number of waves that a CU can launch is limited by couple of
794 * parameters. These are encoded by struct amdgpu_cu_info instance
795 * that is part of every device definition. For GFX9 devices this
796 * translates to 40 waves (simd_per_cu * max_waves_per_simd) when waves
797 * do not use scratch memory and 32 waves (max_scratch_slots_per_cu)
798 * when they do use scratch memory. This could change for future
799 * devices and therefore this example should be considered as a guide.
801 * All CU's of a device are available for the process. This may not be true
802 * under certain conditions - e.g. CU masking.
804 * Finally number of CU's that are occupied by a process is affected by both
805 * number of CU's a device has along with number of other competing processes
807 struct attribute attr_cu_occupancy
;
809 /* sysfs counters for GPU retry fault and page migration tracking */
810 struct kobject
*kobj_counters
;
811 struct attribute attr_faults
;
812 struct attribute attr_page_in
;
813 struct attribute attr_page_out
;
818 /* Exception code status*/
819 uint64_t exception_status
;
820 void *vm_fault_exc_data
;
821 size_t vm_fault_exc_data_size
;
823 /* Tracks debug per-vmid request settings */
824 uint32_t spi_dbg_override
;
825 uint32_t spi_dbg_launch_mode
;
826 uint32_t watch_points
[4];
827 uint32_t alloc_watch_ids
;
830 * If this process has been checkpointed before, then the user
831 * application will use the original gpu_id on the
832 * checkpointed node to refer to this device.
834 uint32_t user_gpu_id
;
837 uint64_t proc_ctx_gpu_addr
;
838 void *proc_ctx_cpu_ptr
;
841 #define qpd_to_pdd(x) container_of(x, struct kfd_process_device, qpd)
843 struct svm_range_list
{
845 struct rb_root_cached objects
;
846 struct list_head list
;
847 struct work_struct deferred_list_work
;
848 struct list_head deferred_range_list
;
849 struct list_head criu_svm_metadata_list
;
850 spinlock_t deferred_list_lock
;
851 atomic_t evicted_ranges
;
852 atomic_t drain_pagefaults
;
853 struct delayed_work restore_work
;
854 DECLARE_BITMAP(bitmap_supported
, MAX_GPU_INSTANCE
);
855 struct task_struct
*faulting_task
;
861 * kfd_process are stored in an mm_struct*->kfd_process*
862 * hash table (kfd_processes in kfd_process.c)
864 struct hlist_node kfd_processes
;
867 * Opaque pointer to mm_struct. We don't hold a reference to
868 * it so it should never be dereferenced from here. This is
869 * only used for looking up processes by their mm.
874 struct work_struct release_work
;
879 * In any process, the thread that started main() is the lead
880 * thread and outlives the rest.
881 * It is here because amd_iommu_bind_pasid wants a task_struct.
882 * It can also be used for safely getting a reference to the
883 * mm_struct of the process.
885 struct task_struct
*lead_thread
;
887 /* We want to receive a notification when the mm_struct is destroyed */
888 struct mmu_notifier mmu_notifier
;
893 * Array of kfd_process_device pointers,
894 * one for each device the process is using.
896 struct kfd_process_device
*pdds
[MAX_GPU_INSTANCE
];
899 struct process_queue_manager pqm
;
901 /*Is the user space process 32 bit?*/
902 bool is_32bit_user_mode
;
904 /* Event-related data */
905 struct mutex event_mutex
;
906 /* Event ID allocator and lookup */
907 struct idr event_idr
;
910 struct kfd_signal_page
*signal_page
;
911 size_t signal_mapped_size
;
912 size_t signal_event_count
;
913 bool signal_event_limit_reached
;
915 /* Information used for memory eviction */
916 void *kgd_process_info
;
917 /* Eviction fence that is attached to all the BOs of this process. The
918 * fence will be triggered during eviction and new one will be created
921 struct dma_fence
*ef
;
923 /* Work items for evicting and restoring BOs */
924 struct delayed_work eviction_work
;
925 struct delayed_work restore_work
;
926 /* seqno of the last scheduled eviction */
927 unsigned int last_eviction_seqno
;
928 /* Approx. the last timestamp (in jiffies) when the process was
929 * restored after an eviction
931 unsigned long last_restore_timestamp
;
933 /* Indicates device process is debug attached with reserved vmid. */
934 bool debug_trap_enabled
;
936 /* per-process-per device debug event fd file */
937 struct file
*dbg_ev_file
;
939 /* If the process is a kfd debugger, we need to know so we can clean
940 * up at exit time. If a process enables debugging on itself, it does
941 * its own clean-up, so we don't set the flag here. We track this by
942 * counting the number of processes this process is debugging.
944 atomic_t debugged_process_count
;
946 /* If the process is a debugged, this is the debugger process */
947 struct kfd_process
*debugger_process
;
949 /* Kobj for our procfs */
950 struct kobject
*kobj
;
951 struct kobject
*kobj_queues
;
952 struct attribute attr_pasid
;
954 /* Keep track cwsr init */
957 /* Exception code enable mask and status */
958 uint64_t exception_enable_mask
;
959 uint64_t exception_status
;
961 /* Used to drain stale interrupts */
962 wait_queue_head_t wait_irq_drain
;
963 bool irq_drain_is_open
;
965 /* shared virtual memory registered by this process */
966 struct svm_range_list svms
;
970 /* Work area for debugger event writer worker. */
971 struct work_struct debug_event_workarea
;
973 /* Tracks debug per-vmid request for debug flags */
977 /* Queues are in paused stated because we are in the process of doing a CRIU checkpoint */
980 /* Tracks runtime enable status */
981 struct semaphore runtime_enable_sema
;
982 bool is_runtime_retry
;
983 struct kfd_runtime_info runtime_info
;
986 #define KFD_PROCESS_TABLE_SIZE 5 /* bits: 32 entries */
987 extern DECLARE_HASHTABLE(kfd_processes_table
, KFD_PROCESS_TABLE_SIZE
);
988 extern struct srcu_struct kfd_processes_srcu
;
991 * typedef amdkfd_ioctl_t - typedef for ioctl function pointer.
993 * @filep: pointer to file structure.
994 * @p: amdkfd process pointer.
995 * @data: pointer to arg that was copied from user.
997 * Return: returns ioctl completion code.
999 typedef int amdkfd_ioctl_t(struct file
*filep
, struct kfd_process
*p
,
1002 struct amdkfd_ioctl_desc
{
1005 amdkfd_ioctl_t
*func
;
1006 unsigned int cmd_drv
;
1009 bool kfd_dev_is_large_bar(struct kfd_node
*dev
);
1011 int kfd_process_create_wq(void);
1012 void kfd_process_destroy_wq(void);
1013 void kfd_cleanup_processes(void);
1014 struct kfd_process
*kfd_create_process(struct task_struct
*thread
);
1015 struct kfd_process
*kfd_get_process(const struct task_struct
*task
);
1016 struct kfd_process
*kfd_lookup_process_by_pasid(u32 pasid
);
1017 struct kfd_process
*kfd_lookup_process_by_mm(const struct mm_struct
*mm
);
1019 int kfd_process_gpuidx_from_gpuid(struct kfd_process
*p
, uint32_t gpu_id
);
1020 int kfd_process_gpuid_from_node(struct kfd_process
*p
, struct kfd_node
*node
,
1021 uint32_t *gpuid
, uint32_t *gpuidx
);
1022 static inline int kfd_process_gpuid_from_gpuidx(struct kfd_process
*p
,
1023 uint32_t gpuidx
, uint32_t *gpuid
) {
1024 return gpuidx
< p
->n_pdds
? p
->pdds
[gpuidx
]->dev
->id
: -EINVAL
;
1026 static inline struct kfd_process_device
*kfd_process_device_from_gpuidx(
1027 struct kfd_process
*p
, uint32_t gpuidx
) {
1028 return gpuidx
< p
->n_pdds
? p
->pdds
[gpuidx
] : NULL
;
1031 void kfd_unref_process(struct kfd_process
*p
);
1032 int kfd_process_evict_queues(struct kfd_process
*p
, uint32_t trigger
);
1033 int kfd_process_restore_queues(struct kfd_process
*p
);
1034 void kfd_suspend_all_processes(void);
1035 int kfd_resume_all_processes(void);
1037 struct kfd_process_device
*kfd_process_device_data_by_id(struct kfd_process
*process
,
1040 int kfd_process_get_user_gpu_id(struct kfd_process
*p
, uint32_t actual_gpu_id
);
1042 int kfd_process_device_init_vm(struct kfd_process_device
*pdd
,
1043 struct file
*drm_file
);
1044 struct kfd_process_device
*kfd_bind_process_to_device(struct kfd_node
*dev
,
1045 struct kfd_process
*p
);
1046 struct kfd_process_device
*kfd_get_process_device_data(struct kfd_node
*dev
,
1047 struct kfd_process
*p
);
1048 struct kfd_process_device
*kfd_create_process_device_data(struct kfd_node
*dev
,
1049 struct kfd_process
*p
);
1051 bool kfd_process_xnack_mode(struct kfd_process
*p
, bool supported
);
1053 int kfd_reserved_mem_mmap(struct kfd_node
*dev
, struct kfd_process
*process
,
1054 struct vm_area_struct
*vma
);
1056 /* KFD process API for creating and translating handles */
1057 int kfd_process_device_create_obj_handle(struct kfd_process_device
*pdd
,
1059 void *kfd_process_device_translate_handle(struct kfd_process_device
*p
,
1061 void kfd_process_device_remove_obj_handle(struct kfd_process_device
*pdd
,
1063 struct kfd_process
*kfd_lookup_process_by_pid(struct pid
*pid
);
1066 int kfd_pasid_init(void);
1067 void kfd_pasid_exit(void);
1068 bool kfd_set_pasid_limit(unsigned int new_limit
);
1069 unsigned int kfd_get_pasid_limit(void);
1070 u32
kfd_pasid_alloc(void);
1071 void kfd_pasid_free(u32 pasid
);
1074 size_t kfd_doorbell_process_slice(struct kfd_dev
*kfd
);
1075 int kfd_doorbell_init(struct kfd_dev
*kfd
);
1076 void kfd_doorbell_fini(struct kfd_dev
*kfd
);
1077 int kfd_doorbell_mmap(struct kfd_node
*dev
, struct kfd_process
*process
,
1078 struct vm_area_struct
*vma
);
1079 void __iomem
*kfd_get_kernel_doorbell(struct kfd_dev
*kfd
,
1080 unsigned int *doorbell_off
);
1081 void kfd_release_kernel_doorbell(struct kfd_dev
*kfd
, u32 __iomem
*db_addr
);
1082 u32
read_kernel_doorbell(u32 __iomem
*db
);
1083 void write_kernel_doorbell(void __iomem
*db
, u32 value
);
1084 void write_kernel_doorbell64(void __iomem
*db
, u64 value
);
1085 unsigned int kfd_get_doorbell_dw_offset_in_bar(struct kfd_dev
*kfd
,
1086 struct kfd_process_device
*pdd
,
1087 unsigned int doorbell_id
);
1088 phys_addr_t
kfd_get_process_doorbells(struct kfd_process_device
*pdd
);
1089 int kfd_alloc_process_doorbells(struct kfd_dev
*kfd
,
1090 struct kfd_process_device
*pdd
);
1091 void kfd_free_process_doorbells(struct kfd_dev
*kfd
,
1092 struct kfd_process_device
*pdd
);
1093 /* GTT Sub-Allocator */
1095 int kfd_gtt_sa_allocate(struct kfd_node
*node
, unsigned int size
,
1096 struct kfd_mem_obj
**mem_obj
);
1098 int kfd_gtt_sa_free(struct kfd_node
*node
, struct kfd_mem_obj
*mem_obj
);
1100 extern struct device
*kfd_device
;
1103 void kfd_procfs_init(void);
1104 void kfd_procfs_shutdown(void);
1105 int kfd_procfs_add_queue(struct queue
*q
);
1106 void kfd_procfs_del_queue(struct queue
*q
);
1109 int kfd_topology_init(void);
1110 void kfd_topology_shutdown(void);
1111 int kfd_topology_add_device(struct kfd_node
*gpu
);
1112 int kfd_topology_remove_device(struct kfd_node
*gpu
);
1113 struct kfd_topology_device
*kfd_topology_device_by_proximity_domain(
1114 uint32_t proximity_domain
);
1115 struct kfd_topology_device
*kfd_topology_device_by_proximity_domain_no_lock(
1116 uint32_t proximity_domain
);
1117 struct kfd_topology_device
*kfd_topology_device_by_id(uint32_t gpu_id
);
1118 struct kfd_node
*kfd_device_by_id(uint32_t gpu_id
);
1119 struct kfd_node
*kfd_device_by_pci_dev(const struct pci_dev
*pdev
);
1120 static inline bool kfd_irq_is_from_node(struct kfd_node
*node
, uint32_t node_id
,
1123 return (node
->interrupt_bitmap
& (1 << node_id
)) != 0 &&
1124 (node
->compute_vmid_bitmap
& (1 << vmid
)) != 0;
1126 static inline struct kfd_node
*kfd_node_by_irq_ids(struct amdgpu_device
*adev
,
1127 uint32_t node_id
, uint32_t vmid
) {
1128 struct kfd_dev
*dev
= adev
->kfd
.dev
;
1131 if (adev
->ip_versions
[GC_HWIP
][0] != IP_VERSION(9, 4, 3))
1132 return dev
->nodes
[0];
1134 for (i
= 0; i
< dev
->num_nodes
; i
++)
1135 if (kfd_irq_is_from_node(dev
->nodes
[i
], node_id
, vmid
))
1136 return dev
->nodes
[i
];
1140 int kfd_topology_enum_kfd_devices(uint8_t idx
, struct kfd_node
**kdev
);
1141 int kfd_numa_node_to_apic_id(int numa_node_id
);
1144 #define KFD_IRQ_FENCE_CLIENTID 0xff
1145 #define KFD_IRQ_FENCE_SOURCEID 0xff
1146 #define KFD_IRQ_IS_FENCE(client, source) \
1147 ((client) == KFD_IRQ_FENCE_CLIENTID && \
1148 (source) == KFD_IRQ_FENCE_SOURCEID)
1149 int kfd_interrupt_init(struct kfd_node
*dev
);
1150 void kfd_interrupt_exit(struct kfd_node
*dev
);
1151 bool enqueue_ih_ring_entry(struct kfd_node
*kfd
, const void *ih_ring_entry
);
1152 bool interrupt_is_wanted(struct kfd_node
*dev
,
1153 const uint32_t *ih_ring_entry
,
1154 uint32_t *patched_ihre
, bool *flag
);
1155 int kfd_process_drain_interrupts(struct kfd_process_device
*pdd
);
1156 void kfd_process_close_interrupt_drain(unsigned int pasid
);
1158 /* amdkfd Apertures */
1159 int kfd_init_apertures(struct kfd_process
*process
);
1161 void kfd_process_set_trap_handler(struct qcm_process_device
*qpd
,
1164 void kfd_process_set_trap_debug_flag(struct qcm_process_device
*qpd
,
1167 /* CWSR initialization */
1168 int kfd_process_init_cwsr_apu(struct kfd_process
*process
, struct file
*filep
);
1172 * Need to increment KFD_CRIU_PRIV_VERSION each time a change is made to any of the CRIU private
1174 * kfd_criu_process_priv_data
1175 * kfd_criu_device_priv_data
1176 * kfd_criu_bo_priv_data
1177 * kfd_criu_queue_priv_data
1178 * kfd_criu_event_priv_data
1179 * kfd_criu_svm_range_priv_data
1182 #define KFD_CRIU_PRIV_VERSION 1
1184 struct kfd_criu_process_priv_data
{
1186 uint32_t xnack_mode
;
1189 struct kfd_criu_device_priv_data
{
1190 /* For future use */
1194 struct kfd_criu_bo_priv_data
{
1196 uint32_t idr_handle
;
1197 uint32_t mapped_gpuids
[MAX_GPU_INSTANCE
];
1201 * The first 4 bytes of kfd_criu_queue_priv_data, kfd_criu_event_priv_data,
1202 * kfd_criu_svm_range_priv_data is the object type
1204 enum kfd_criu_object_type
{
1205 KFD_CRIU_OBJECT_TYPE_QUEUE
,
1206 KFD_CRIU_OBJECT_TYPE_EVENT
,
1207 KFD_CRIU_OBJECT_TYPE_SVM_RANGE
,
1210 struct kfd_criu_svm_range_priv_data
{
1211 uint32_t object_type
;
1212 uint64_t start_addr
;
1214 /* Variable length array of attributes */
1215 struct kfd_ioctl_svm_attribute attrs
[];
1218 struct kfd_criu_queue_priv_data
{
1219 uint32_t object_type
;
1222 uint64_t read_ptr_addr
;
1223 uint64_t write_ptr_addr
;
1224 uint64_t doorbell_off
;
1225 uint64_t eop_ring_buffer_address
;
1226 uint64_t ctx_save_restore_area_address
;
1233 uint32_t doorbell_id
;
1236 uint32_t eop_ring_buffer_size
;
1237 uint32_t ctx_save_restore_area_size
;
1238 uint32_t ctl_stack_size
;
1242 struct kfd_criu_event_priv_data
{
1243 uint32_t object_type
;
1244 uint64_t user_handle
;
1246 uint32_t auto_reset
;
1251 struct kfd_hsa_memory_exception_data memory_exception_data
;
1252 struct kfd_hsa_hw_exception_data hw_exception_data
;
1256 int kfd_process_get_queue_info(struct kfd_process
*p
,
1257 uint32_t *num_queues
,
1258 uint64_t *priv_data_sizes
);
1260 int kfd_criu_checkpoint_queues(struct kfd_process
*p
,
1261 uint8_t __user
*user_priv_data
,
1262 uint64_t *priv_data_offset
);
1264 int kfd_criu_restore_queue(struct kfd_process
*p
,
1265 uint8_t __user
*user_priv_data
,
1266 uint64_t *priv_data_offset
,
1267 uint64_t max_priv_data_size
);
1269 int kfd_criu_checkpoint_events(struct kfd_process
*p
,
1270 uint8_t __user
*user_priv_data
,
1271 uint64_t *priv_data_offset
);
1273 int kfd_criu_restore_event(struct file
*devkfd
,
1274 struct kfd_process
*p
,
1275 uint8_t __user
*user_priv_data
,
1276 uint64_t *priv_data_offset
,
1277 uint64_t max_priv_data_size
);
1280 /* Queue Context Management */
1281 int init_queue(struct queue
**q
, const struct queue_properties
*properties
);
1282 void uninit_queue(struct queue
*q
);
1283 void print_queue_properties(struct queue_properties
*q
);
1284 void print_queue(struct queue
*q
);
1286 struct mqd_manager
*mqd_manager_init_cik(enum KFD_MQD_TYPE type
,
1287 struct kfd_node
*dev
);
1288 struct mqd_manager
*mqd_manager_init_vi(enum KFD_MQD_TYPE type
,
1289 struct kfd_node
*dev
);
1290 struct mqd_manager
*mqd_manager_init_v9(enum KFD_MQD_TYPE type
,
1291 struct kfd_node
*dev
);
1292 struct mqd_manager
*mqd_manager_init_v10(enum KFD_MQD_TYPE type
,
1293 struct kfd_node
*dev
);
1294 struct mqd_manager
*mqd_manager_init_v11(enum KFD_MQD_TYPE type
,
1295 struct kfd_node
*dev
);
1296 struct device_queue_manager
*device_queue_manager_init(struct kfd_node
*dev
);
1297 void device_queue_manager_uninit(struct device_queue_manager
*dqm
);
1298 struct kernel_queue
*kernel_queue_init(struct kfd_node
*dev
,
1299 enum kfd_queue_type type
);
1300 void kernel_queue_uninit(struct kernel_queue
*kq
, bool hanging
);
1301 int kfd_dqm_evict_pasid(struct device_queue_manager
*dqm
, u32 pasid
);
1303 /* Process Queue Manager */
1304 struct process_queue_node
{
1306 struct kernel_queue
*kq
;
1307 struct list_head process_queue_list
;
1310 void kfd_process_dequeue_from_device(struct kfd_process_device
*pdd
);
1311 void kfd_process_dequeue_from_all_devices(struct kfd_process
*p
);
1312 int pqm_init(struct process_queue_manager
*pqm
, struct kfd_process
*p
);
1313 void pqm_uninit(struct process_queue_manager
*pqm
);
1314 int pqm_create_queue(struct process_queue_manager
*pqm
,
1315 struct kfd_node
*dev
,
1317 struct queue_properties
*properties
,
1319 struct amdgpu_bo
*wptr_bo
,
1320 const struct kfd_criu_queue_priv_data
*q_data
,
1321 const void *restore_mqd
,
1322 const void *restore_ctl_stack
,
1323 uint32_t *p_doorbell_offset_in_process
);
1324 int pqm_destroy_queue(struct process_queue_manager
*pqm
, unsigned int qid
);
1325 int pqm_update_queue_properties(struct process_queue_manager
*pqm
, unsigned int qid
,
1326 struct queue_properties
*p
);
1327 int pqm_update_mqd(struct process_queue_manager
*pqm
, unsigned int qid
,
1328 struct mqd_update_info
*minfo
);
1329 int pqm_set_gws(struct process_queue_manager
*pqm
, unsigned int qid
,
1331 struct kernel_queue
*pqm_get_kernel_queue(struct process_queue_manager
*pqm
,
1333 struct queue
*pqm_get_user_queue(struct process_queue_manager
*pqm
,
1335 int pqm_get_wave_state(struct process_queue_manager
*pqm
,
1337 void __user
*ctl_stack
,
1338 u32
*ctl_stack_used_size
,
1339 u32
*save_area_used_size
);
1340 int pqm_get_queue_snapshot(struct process_queue_manager
*pqm
,
1341 uint64_t exception_clear_mask
,
1343 int *num_qss_entries
,
1344 uint32_t *entry_size
);
1346 int amdkfd_fence_wait_timeout(struct device_queue_manager
*dqm
,
1347 uint64_t fence_value
,
1348 unsigned int timeout_ms
);
1350 int pqm_get_queue_checkpoint_info(struct process_queue_manager
*pqm
,
1353 u32
*ctl_stack_size
);
1354 /* Packet Manager */
1356 #define KFD_FENCE_COMPLETED (100)
1357 #define KFD_FENCE_INIT (10)
1359 struct packet_manager
{
1360 struct device_queue_manager
*dqm
;
1361 struct kernel_queue
*priv_queue
;
1364 struct kfd_mem_obj
*ib_buffer_obj
;
1365 unsigned int ib_size_bytes
;
1366 bool is_over_subscription
;
1368 const struct packet_manager_funcs
*pmf
;
1371 struct packet_manager_funcs
{
1372 /* Support ASIC-specific packet formats for PM4 packets */
1373 int (*map_process
)(struct packet_manager
*pm
, uint32_t *buffer
,
1374 struct qcm_process_device
*qpd
);
1375 int (*runlist
)(struct packet_manager
*pm
, uint32_t *buffer
,
1376 uint64_t ib
, size_t ib_size_in_dwords
, bool chain
);
1377 int (*set_resources
)(struct packet_manager
*pm
, uint32_t *buffer
,
1378 struct scheduling_resources
*res
);
1379 int (*map_queues
)(struct packet_manager
*pm
, uint32_t *buffer
,
1380 struct queue
*q
, bool is_static
);
1381 int (*unmap_queues
)(struct packet_manager
*pm
, uint32_t *buffer
,
1382 enum kfd_unmap_queues_filter mode
,
1383 uint32_t filter_param
, bool reset
);
1384 int (*set_grace_period
)(struct packet_manager
*pm
, uint32_t *buffer
,
1385 uint32_t grace_period
);
1386 int (*query_status
)(struct packet_manager
*pm
, uint32_t *buffer
,
1387 uint64_t fence_address
, uint64_t fence_value
);
1388 int (*release_mem
)(uint64_t gpu_addr
, uint32_t *buffer
);
1391 int map_process_size
;
1393 int set_resources_size
;
1394 int map_queues_size
;
1395 int unmap_queues_size
;
1396 int set_grace_period_size
;
1397 int query_status_size
;
1398 int release_mem_size
;
1401 extern const struct packet_manager_funcs kfd_vi_pm_funcs
;
1402 extern const struct packet_manager_funcs kfd_v9_pm_funcs
;
1403 extern const struct packet_manager_funcs kfd_aldebaran_pm_funcs
;
1405 int pm_init(struct packet_manager
*pm
, struct device_queue_manager
*dqm
);
1406 void pm_uninit(struct packet_manager
*pm
, bool hanging
);
1407 int pm_send_set_resources(struct packet_manager
*pm
,
1408 struct scheduling_resources
*res
);
1409 int pm_send_runlist(struct packet_manager
*pm
, struct list_head
*dqm_queues
);
1410 int pm_send_query_status(struct packet_manager
*pm
, uint64_t fence_address
,
1411 uint64_t fence_value
);
1413 int pm_send_unmap_queue(struct packet_manager
*pm
,
1414 enum kfd_unmap_queues_filter mode
,
1415 uint32_t filter_param
, bool reset
);
1417 void pm_release_ib(struct packet_manager
*pm
);
1419 int pm_update_grace_period(struct packet_manager
*pm
, uint32_t grace_period
);
1421 /* Following PM funcs can be shared among VI and AI */
1422 unsigned int pm_build_pm4_header(unsigned int opcode
, size_t packet_size
);
1424 uint64_t kfd_get_number_elems(struct kfd_dev
*kfd
);
1427 extern const struct kfd_event_interrupt_class event_interrupt_class_cik
;
1428 extern const struct kfd_event_interrupt_class event_interrupt_class_v9
;
1429 extern const struct kfd_event_interrupt_class event_interrupt_class_v9_4_3
;
1430 extern const struct kfd_event_interrupt_class event_interrupt_class_v10
;
1431 extern const struct kfd_event_interrupt_class event_interrupt_class_v11
;
1433 extern const struct kfd_device_global_init_class device_global_init_class_cik
;
1435 int kfd_event_init_process(struct kfd_process
*p
);
1436 void kfd_event_free_process(struct kfd_process
*p
);
1437 int kfd_event_mmap(struct kfd_process
*process
, struct vm_area_struct
*vma
);
1438 int kfd_wait_on_events(struct kfd_process
*p
,
1439 uint32_t num_events
, void __user
*data
,
1440 bool all
, uint32_t *user_timeout_ms
,
1441 uint32_t *wait_result
);
1442 void kfd_signal_event_interrupt(u32 pasid
, uint32_t partial_id
,
1443 uint32_t valid_id_bits
);
1444 void kfd_signal_hw_exception_event(u32 pasid
);
1445 int kfd_set_event(struct kfd_process
*p
, uint32_t event_id
);
1446 int kfd_reset_event(struct kfd_process
*p
, uint32_t event_id
);
1447 int kfd_kmap_event_page(struct kfd_process
*p
, uint64_t event_page_offset
);
1449 int kfd_event_create(struct file
*devkfd
, struct kfd_process
*p
,
1450 uint32_t event_type
, bool auto_reset
, uint32_t node_id
,
1451 uint32_t *event_id
, uint32_t *event_trigger_data
,
1452 uint64_t *event_page_offset
, uint32_t *event_slot_index
);
1454 int kfd_get_num_events(struct kfd_process
*p
);
1455 int kfd_event_destroy(struct kfd_process
*p
, uint32_t event_id
);
1457 void kfd_signal_vm_fault_event(struct kfd_node
*dev
, u32 pasid
,
1458 struct kfd_vm_fault_info
*info
,
1459 struct kfd_hsa_memory_exception_data
*data
);
1461 void kfd_signal_reset_event(struct kfd_node
*dev
);
1463 void kfd_signal_poison_consumed_event(struct kfd_node
*dev
, u32 pasid
);
1465 void kfd_flush_tlb(struct kfd_process_device
*pdd
, enum TLB_FLUSH_TYPE type
);
1467 static inline bool kfd_flush_tlb_after_unmap(struct kfd_dev
*dev
)
1469 return KFD_GC_VERSION(dev
) > IP_VERSION(9, 4, 2) ||
1470 (KFD_GC_VERSION(dev
) == IP_VERSION(9, 4, 1) && dev
->sdma_fw_version
>= 18) ||
1471 KFD_GC_VERSION(dev
) == IP_VERSION(9, 4, 0);
1474 int kfd_send_exception_to_runtime(struct kfd_process
*p
,
1475 unsigned int queue_id
,
1476 uint64_t error_reason
);
1477 bool kfd_is_locked(void);
1479 /* Compute profile */
1480 void kfd_inc_compute_active(struct kfd_node
*dev
);
1481 void kfd_dec_compute_active(struct kfd_node
*dev
);
1483 /* Cgroup Support */
1484 /* Check with device cgroup if @kfd device is accessible */
1485 static inline int kfd_devcgroup_check_permission(struct kfd_node
*kfd
)
1487 #if defined(CONFIG_CGROUP_DEVICE) || defined(CONFIG_CGROUP_BPF)
1488 struct drm_device
*ddev
= adev_to_drm(kfd
->adev
);
1490 return devcgroup_check_permission(DEVCG_DEV_CHAR
, DRM_MAJOR
,
1491 ddev
->render
->index
,
1492 DEVCG_ACC_WRITE
| DEVCG_ACC_READ
);
1498 static inline bool kfd_is_first_node(struct kfd_node
*node
)
1500 return (node
== node
->kfd
->nodes
[0]);
1504 #if defined(CONFIG_DEBUG_FS)
1506 void kfd_debugfs_init(void);
1507 void kfd_debugfs_fini(void);
1508 int kfd_debugfs_mqds_by_process(struct seq_file
*m
, void *data
);
1509 int pqm_debugfs_mqds(struct seq_file
*m
, void *data
);
1510 int kfd_debugfs_hqds_by_device(struct seq_file
*m
, void *data
);
1511 int dqm_debugfs_hqds(struct seq_file
*m
, void *data
);
1512 int kfd_debugfs_rls_by_device(struct seq_file
*m
, void *data
);
1513 int pm_debugfs_runlist(struct seq_file
*m
, void *data
);
1515 int kfd_debugfs_hang_hws(struct kfd_node
*dev
);
1516 int pm_debugfs_hang_hws(struct packet_manager
*pm
);
1517 int dqm_debugfs_hang_hws(struct device_queue_manager
*dqm
);
1521 static inline void kfd_debugfs_init(void) {}
1522 static inline void kfd_debugfs_fini(void) {}