drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

   1 /*
   2  * Copyright 2012-15 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: AMD
  23  *
  24  */
  25
  26 #include <linux/version.h>
  27 #include <drm/drm_atomic_helper.h>
  28 #include "dm_services.h"
  29 #include "amdgpu.h"
  30 #include "amdgpu_dm.h"
  31 #include "amdgpu_dm_mst_types.h"
  32
  33 #include "dc.h"
  34 #include "dm_helpers.h"
  35
  36 #include "dc_link_ddc.h"
  37
  38 #include "i2caux_interface.h"
  39
  40 /* #define TRACE_DPCD */
  41
  42 #ifdef TRACE_DPCD
  43 #define SIDE_BAND_MSG(address) (address >= DP_SIDEBAND_MSG_DOWN_REQ_BASE && address < DP_SINK_COUNT_ESI)
  44
  45 static inline char *side_band_msg_type_to_str(uint32_t address)
  46 {
  47         static char str[10] = {0};
  48
  49         if (address < DP_SIDEBAND_MSG_UP_REP_BASE)
  50                 strcpy(str, "DOWN_REQ");
  51         else if (address < DP_SIDEBAND_MSG_DOWN_REP_BASE)
  52                 strcpy(str, "UP_REP");
  53         else if (address < DP_SIDEBAND_MSG_UP_REQ_BASE)
  54                 strcpy(str, "DOWN_REP");
  55         else
  56                 strcpy(str, "UP_REQ");
  57
  58         return str;
  59 }
  60
  61 static void log_dpcd(uint8_t type,
  62                      uint32_t address,
  63                      uint8_t *data,
  64                      uint32_t size,
  65                      bool res)
  66 {
  67         DRM_DEBUG_KMS("Op: %s, addr: %04x, SideBand Msg: %s, Op res: %s\n",
  68                         (type == DP_AUX_NATIVE_READ) ||
  69                         (type == DP_AUX_I2C_READ) ?
  70                                         "Read" : "Write",
  71                         address,
  72                         SIDE_BAND_MSG(address) ?
  73                                         side_band_msg_type_to_str(address) : "Nop",
  74                         res ? "OK" : "Fail");
  75
  76         if (res) {
  77                 print_hex_dump(KERN_INFO, "Body: ", DUMP_PREFIX_NONE, 16, 1, data, size, false);
  78         }
  79 }
  80 #endif
  81
  82 static ssize_t dm_dp_aux_transfer(struct drm_dp_aux *aux,
  83                                   struct drm_dp_aux_msg *msg)
  84 {
  85         ssize_t result = 0;
  86         struct aux_payload payload;
  87
  88         if (WARN_ON(msg->size > 16))
  89                 return -E2BIG;
  90
  91         payload.address = msg->address;
  92         payload.data = msg->buffer;
  93         payload.length = msg->size;
  94         payload.reply = &msg->reply;
  95         payload.i2c_over_aux = (msg->request & DP_AUX_NATIVE_WRITE) == 0;
  96         payload.write = (msg->request & DP_AUX_I2C_READ) == 0;
  97         payload.mot = (msg->request & DP_AUX_I2C_MOT) != 0;
  98         payload.defer_delay = 0;
  99
 100         result = dc_link_aux_transfer(TO_DM_AUX(aux)->ddc_service, &payload);
 101
 102         if (payload.write)
 103                 result = msg->size;
 104
 105         if (result < 0) /* DC doesn't know about kernel error codes */
 106                 result = -EIO;
 107
 108         return result;
 109 }
 110
 111 static enum drm_connector_status
 112 dm_dp_mst_detect(struct drm_connector *connector, bool force)
 113 {
 114         struct amdgpu_dm_connector *aconnector = to_amdgpu_dm_connector(connector);
 115         struct amdgpu_dm_connector *master = aconnector->mst_port;
 116
 117         enum drm_connector_status status =
 118                 drm_dp_mst_detect_port(
 119                         connector,
 120                         &master->mst_mgr,
 121                         aconnector->port);
 122
 123         return status;
 124 }
 125
 126 static void
 127 dm_dp_mst_connector_destroy(struct drm_connector *connector)
 128 {
 129         struct amdgpu_dm_connector *amdgpu_dm_connector = to_amdgpu_dm_connector(connector);
 130         struct amdgpu_encoder *amdgpu_encoder = amdgpu_dm_connector->mst_encoder;
 131
 132         if (amdgpu_dm_connector->edid) {
 133                 kfree(amdgpu_dm_connector->edid);
 134                 amdgpu_dm_connector->edid = NULL;
 135         }
 136
 137         drm_encoder_cleanup(&amdgpu_encoder->base);
 138         kfree(amdgpu_encoder);
 139         drm_connector_cleanup(connector);
 140         drm_dp_mst_put_port_malloc(amdgpu_dm_connector->port);
 141         kfree(amdgpu_dm_connector);
 142 }
 143
 144 static const struct drm_connector_funcs dm_dp_mst_connector_funcs = {
 145         .detect = dm_dp_mst_detect,
 146         .fill_modes = drm_helper_probe_single_connector_modes,
 147         .destroy = dm_dp_mst_connector_destroy,
 148         .reset = amdgpu_dm_connector_funcs_reset,
 149         .atomic_duplicate_state = amdgpu_dm_connector_atomic_duplicate_state,
 150         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
 151         .atomic_set_property = amdgpu_dm_connector_atomic_set_property,
 152         .atomic_get_property = amdgpu_dm_connector_atomic_get_property
 153 };
 154
 155 static int dm_dp_mst_get_modes(struct drm_connector *connector)
 156 {
 157         struct amdgpu_dm_connector *aconnector = to_amdgpu_dm_connector(connector);
 158         int ret = 0;
 159
 160         if (!aconnector)
 161                 return drm_add_edid_modes(connector, NULL);
 162
 163         if (!aconnector->edid) {
 164                 struct edid *edid;
 165                 edid = drm_dp_mst_get_edid(connector, &aconnector->mst_port->mst_mgr, aconnector->port);
 166
 167                 if (!edid) {
 168                         drm_connector_update_edid_property(
 169                                 &aconnector->base,
 170                                 NULL);
 171                         return ret;
 172                 }
 173
 174                 aconnector->edid = edid;
 175         }
 176
 177         if (!aconnector->dc_sink) {
 178                 struct dc_sink *dc_sink;
 179                 struct dc_sink_init_data init_params = {
 180                                 .link = aconnector->dc_link,
 181                                 .sink_signal = SIGNAL_TYPE_DISPLAY_PORT_MST };
 182                 dc_sink = dc_link_add_remote_sink(
 183                         aconnector->dc_link,
 184                         (uint8_t *)aconnector->edid,
 185                         (aconnector->edid->extensions + 1) * EDID_LENGTH,
 186                         &init_params);
 187
 188                 dc_sink->priv = aconnector;
 189                 aconnector->dc_sink = dc_sink;
 190
 191                 if (aconnector->dc_sink)
 192                         amdgpu_dm_update_freesync_caps(
 193                                         connector, aconnector->edid);
 194
 195         }
 196
 197         drm_connector_update_edid_property(
 198                                         &aconnector->base, aconnector->edid);
 199
 200         ret = drm_add_edid_modes(connector, aconnector->edid);
 201
 202         return ret;
 203 }
 204
 205 static struct drm_encoder *dm_mst_best_encoder(struct drm_connector *connector)
 206 {
 207         struct amdgpu_dm_connector *amdgpu_dm_connector = to_amdgpu_dm_connector(connector);
 208
 209         return &amdgpu_dm_connector->mst_encoder->base;
 210 }
 211
 212 static const struct drm_connector_helper_funcs dm_dp_mst_connector_helper_funcs = {
 213         .get_modes = dm_dp_mst_get_modes,
 214         .mode_valid = amdgpu_dm_connector_mode_valid,
 215         .best_encoder = dm_mst_best_encoder,
 216 };
 217
 218 static void amdgpu_dm_encoder_destroy(struct drm_encoder *encoder)
 219 {
 220         drm_encoder_cleanup(encoder);
 221         kfree(encoder);
 222 }
 223
 224 static const struct drm_encoder_funcs amdgpu_dm_encoder_funcs = {
 225         .destroy = amdgpu_dm_encoder_destroy,
 226 };
 227
 228 static struct amdgpu_encoder *
 229 dm_dp_create_fake_mst_encoder(struct amdgpu_dm_connector *connector)
 230 {
 231         struct drm_device *dev = connector->base.dev;
 232         struct amdgpu_device *adev = dev->dev_private;
 233         struct amdgpu_encoder *amdgpu_encoder;
 234         struct drm_encoder *encoder;
 235
 236         amdgpu_encoder = kzalloc(sizeof(*amdgpu_encoder), GFP_KERNEL);
 237         if (!amdgpu_encoder)
 238                 return NULL;
 239
 240         encoder = &amdgpu_encoder->base;
 241         encoder->possible_crtcs = amdgpu_dm_get_encoder_crtc_mask(adev);
 242
 243         drm_encoder_init(
 244                 dev,
 245                 &amdgpu_encoder->base,
 246                 &amdgpu_dm_encoder_funcs,
 247                 DRM_MODE_ENCODER_DPMST,
 248                 NULL);
 249
 250         drm_encoder_helper_add(encoder, &amdgpu_dm_encoder_helper_funcs);
 251
 252         return amdgpu_encoder;
 253 }
 254
 255 static struct drm_connector *
 256 dm_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
 257                         struct drm_dp_mst_port *port,
 258                         const char *pathprop)
 259 {
 260         struct amdgpu_dm_connector *master = container_of(mgr, struct amdgpu_dm_connector, mst_mgr);
 261         struct drm_device *dev = master->base.dev;
 262         struct amdgpu_device *adev = dev->dev_private;
 263         struct amdgpu_dm_connector *aconnector;
 264         struct drm_connector *connector;
 265
 266         aconnector = kzalloc(sizeof(*aconnector), GFP_KERNEL);
 267         if (!aconnector)
 268                 return NULL;
 269
 270         connector = &aconnector->base;
 271         aconnector->port = port;
 272         aconnector->mst_port = master;
 273
 274         if (drm_connector_init(
 275                 dev,
 276                 connector,
 277                 &dm_dp_mst_connector_funcs,
 278                 DRM_MODE_CONNECTOR_DisplayPort)) {
 279                 kfree(aconnector);
 280                 return NULL;
 281         }
 282         drm_connector_helper_add(connector, &dm_dp_mst_connector_helper_funcs);
 283
 284         amdgpu_dm_connector_init_helper(
 285                 &adev->dm,
 286                 aconnector,
 287                 DRM_MODE_CONNECTOR_DisplayPort,
 288                 master->dc_link,
 289                 master->connector_id);
 290
 291         aconnector->mst_encoder = dm_dp_create_fake_mst_encoder(master);
 292         drm_connector_attach_encoder(&aconnector->base,
 293                                      &aconnector->mst_encoder->base);
 294
 295         drm_object_attach_property(
 296                 &connector->base,
 297                 dev->mode_config.path_property,
 298                 0);
 299         drm_object_attach_property(
 300                 &connector->base,
 301                 dev->mode_config.tile_property,
 302                 0);
 303
 304         drm_connector_set_path_property(connector, pathprop);
 305
 306         /*
 307          * Initialize connector state before adding the connectror to drm and
 308          * framebuffer lists
 309          */
 310         amdgpu_dm_connector_funcs_reset(connector);
 311
 312         DRM_INFO("DM_MST: added connector: %p [id: %d] [master: %p]\n",
 313                  aconnector, connector->base.id, aconnector->mst_port);
 314
 315         drm_dp_mst_get_port_malloc(port);
 316
 317         DRM_DEBUG_KMS(":%d\n", connector->base.id);
 318
 319         return connector;
 320 }
 321
 322 static void dm_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
 323                                         struct drm_connector *connector)
 324 {
 325         struct amdgpu_dm_connector *master = container_of(mgr, struct amdgpu_dm_connector, mst_mgr);
 326         struct drm_device *dev = master->base.dev;
 327         struct amdgpu_device *adev = dev->dev_private;
 328         struct amdgpu_dm_connector *aconnector = to_amdgpu_dm_connector(connector);
 329
 330         DRM_INFO("DM_MST: Disabling connector: %p [id: %d] [master: %p]\n",
 331                  aconnector, connector->base.id, aconnector->mst_port);
 332
 333         if (aconnector->dc_sink) {
 334                 amdgpu_dm_update_freesync_caps(connector, NULL);
 335                 dc_link_remove_remote_sink(aconnector->dc_link,
 336                                            aconnector->dc_sink);
 337                 dc_sink_release(aconnector->dc_sink);
 338                 aconnector->dc_sink = NULL;
 339         }
 340
 341         drm_connector_unregister(connector);
 342         if (adev->mode_info.rfbdev)
 343                 drm_fb_helper_remove_one_connector(&adev->mode_info.rfbdev->helper, connector);
 344         drm_connector_put(connector);
 345 }
 346
 347 static void dm_dp_mst_register_connector(struct drm_connector *connector)
 348 {
 349         struct drm_device *dev = connector->dev;
 350         struct amdgpu_device *adev = dev->dev_private;
 351
 352         if (adev->mode_info.rfbdev)
 353                 drm_fb_helper_add_one_connector(&adev->mode_info.rfbdev->helper, connector);
 354         else
 355                 DRM_ERROR("adev->mode_info.rfbdev is NULL\n");
 356
 357         drm_connector_register(connector);
 358 }
 359
 360 static const struct drm_dp_mst_topology_cbs dm_mst_cbs = {
 361         .add_connector = dm_dp_add_mst_connector,
 362         .destroy_connector = dm_dp_destroy_mst_connector,
 363         .register_connector = dm_dp_mst_register_connector
 364 };
 365
 366 void amdgpu_dm_initialize_dp_connector(struct amdgpu_display_manager *dm,
 367                                        struct amdgpu_dm_connector *aconnector)
 368 {
 369         aconnector->dm_dp_aux.aux.name = "dmdc";
 370         aconnector->dm_dp_aux.aux.dev = dm->adev->dev;
 371         aconnector->dm_dp_aux.aux.transfer = dm_dp_aux_transfer;
 372         aconnector->dm_dp_aux.ddc_service = aconnector->dc_link->ddc;
 373
 374         drm_dp_aux_register(&aconnector->dm_dp_aux.aux);
 375         drm_dp_cec_register_connector(&aconnector->dm_dp_aux.aux,
 376                                       aconnector->base.name, dm->adev->dev);
 377         aconnector->mst_mgr.cbs = &dm_mst_cbs;
 378         drm_dp_mst_topology_mgr_init(
 379                 &aconnector->mst_mgr,
 380                 dm->adev->ddev,
 381                 &aconnector->dm_dp_aux.aux,
 382                 16,
 383                 4,
 384                 aconnector->connector_id);
 385 }
 386