drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c

   1 /*
   2  * Copyright 2012-15 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: AMD
  23  *
  24  */
  25
  26 #include <linux/version.h>
  27 #include <drm/drm_atomic_helper.h>
  28 #include "dm_services.h"
  29 #include "amdgpu.h"
  30 #include "amdgpu_dm.h"
  31 #include "amdgpu_dm_mst_types.h"
  32
  33 #include "dc.h"
  34 #include "dm_helpers.h"
  35
  36 #include "dc_link_ddc.h"
  37
  38 /* #define TRACE_DPCD */
  39
  40 #ifdef TRACE_DPCD
  41 #define SIDE_BAND_MSG(address) (address >= DP_SIDEBAND_MSG_DOWN_REQ_BASE && address < DP_SINK_COUNT_ESI)
  42
  43 static inline char *side_band_msg_type_to_str(uint32_t address)
  44 {
  45         static char str[10] = {0};
  46
  47         if (address < DP_SIDEBAND_MSG_UP_REP_BASE)
  48                 strcpy(str, "DOWN_REQ");
  49         else if (address < DP_SIDEBAND_MSG_DOWN_REP_BASE)
  50                 strcpy(str, "UP_REP");
  51         else if (address < DP_SIDEBAND_MSG_UP_REQ_BASE)
  52                 strcpy(str, "DOWN_REP");
  53         else
  54                 strcpy(str, "UP_REQ");
  55
  56         return str;
  57 }
  58
  59 static void log_dpcd(uint8_t type,
  60                      uint32_t address,
  61                      uint8_t *data,
  62                      uint32_t size,
  63                      bool res)
  64 {
  65         DRM_DEBUG_KMS("Op: %s, addr: %04x, SideBand Msg: %s, Op res: %s\n",
  66                         (type == DP_AUX_NATIVE_READ) ||
  67                         (type == DP_AUX_I2C_READ) ?
  68                                         "Read" : "Write",
  69                         address,
  70                         SIDE_BAND_MSG(address) ?
  71                                         side_band_msg_type_to_str(address) : "Nop",
  72                         res ? "OK" : "Fail");
  73
  74         if (res) {
  75                 print_hex_dump(KERN_INFO, "Body: ", DUMP_PREFIX_NONE, 16, 1, data, size, false);
  76         }
  77 }
  78 #endif
  79
  80 static ssize_t dm_dp_aux_transfer(struct drm_dp_aux *aux,
  81                                   struct drm_dp_aux_msg *msg)
  82 {
  83         ssize_t result = 0;
  84         enum i2caux_transaction_action action;
  85         enum aux_transaction_type type;
  86
  87         if (WARN_ON(msg->size > 16))
  88                 return -E2BIG;
  89
  90         switch (msg->request & ~DP_AUX_I2C_MOT) {
  91         case DP_AUX_NATIVE_READ:
  92                 type = AUX_TRANSACTION_TYPE_DP;
  93                 action = I2CAUX_TRANSACTION_ACTION_DP_READ;
  94
  95                 result = dc_link_aux_transfer(TO_DM_AUX(aux)->ddc_service,
  96                                               msg->address,
  97                                               &msg->reply,
  98                                               msg->buffer,
  99                                               msg->size,
 100                                               type,
 101                                               action);
 102                 break;
 103         case DP_AUX_NATIVE_WRITE:
 104                 type = AUX_TRANSACTION_TYPE_DP;
 105                 action = I2CAUX_TRANSACTION_ACTION_DP_WRITE;
 106
 107                 dc_link_aux_transfer(TO_DM_AUX(aux)->ddc_service,
 108                                      msg->address,
 109                                      &msg->reply,
 110                                      msg->buffer,
 111                                      msg->size,
 112                                      type,
 113                                      action);
 114                 result = msg->size;
 115                 break;
 116         case DP_AUX_I2C_READ:
 117                 type = AUX_TRANSACTION_TYPE_I2C;
 118                 if (msg->request & DP_AUX_I2C_MOT)
 119                         action = I2CAUX_TRANSACTION_ACTION_I2C_READ_MOT;
 120                 else
 121                         action = I2CAUX_TRANSACTION_ACTION_I2C_READ;
 122
 123                 result = dc_link_aux_transfer(TO_DM_AUX(aux)->ddc_service,
 124                                               msg->address,
 125                                               &msg->reply,
 126                                               msg->buffer,
 127                                               msg->size,
 128                                               type,
 129                                               action);
 130                 break;
 131         case DP_AUX_I2C_WRITE:
 132                 type = AUX_TRANSACTION_TYPE_I2C;
 133                 if (msg->request & DP_AUX_I2C_MOT)
 134                         action = I2CAUX_TRANSACTION_ACTION_I2C_WRITE_MOT;
 135                 else
 136                         action = I2CAUX_TRANSACTION_ACTION_I2C_WRITE;
 137
 138                 dc_link_aux_transfer(TO_DM_AUX(aux)->ddc_service,
 139                                      msg->address,
 140                                      &msg->reply,
 141                                      msg->buffer,
 142                                      msg->size,
 143                                      type,
 144                                      action);
 145                 result = msg->size;
 146                 break;
 147         default:
 148                 return -EINVAL;
 149         }
 150
 151 #ifdef TRACE_DPCD
 152         log_dpcd(msg->request,
 153                  msg->address,
 154                  msg->buffer,
 155                  msg->size,
 156                  r == DDC_RESULT_SUCESSFULL);
 157 #endif
 158
 159         if (result < 0) /* DC doesn't know about kernel error codes */
 160                 result = -EIO;
 161
 162         return result;
 163 }
 164
 165 static enum drm_connector_status
 166 dm_dp_mst_detect(struct drm_connector *connector, bool force)
 167 {
 168         struct amdgpu_dm_connector *aconnector = to_amdgpu_dm_connector(connector);
 169         struct amdgpu_dm_connector *master = aconnector->mst_port;
 170
 171         enum drm_connector_status status =
 172                 drm_dp_mst_detect_port(
 173                         connector,
 174                         &master->mst_mgr,
 175                         aconnector->port);
 176
 177         return status;
 178 }
 179
 180 static void
 181 dm_dp_mst_connector_destroy(struct drm_connector *connector)
 182 {
 183         struct amdgpu_dm_connector *amdgpu_dm_connector = to_amdgpu_dm_connector(connector);
 184         struct amdgpu_encoder *amdgpu_encoder = amdgpu_dm_connector->mst_encoder;
 185
 186         if (amdgpu_dm_connector->edid) {
 187                 kfree(amdgpu_dm_connector->edid);
 188                 amdgpu_dm_connector->edid = NULL;
 189         }
 190
 191         drm_encoder_cleanup(&amdgpu_encoder->base);
 192         kfree(amdgpu_encoder);
 193         drm_connector_cleanup(connector);
 194         drm_dp_mst_put_port_malloc(amdgpu_dm_connector->port);
 195         kfree(amdgpu_dm_connector);
 196 }
 197
 198 static const struct drm_connector_funcs dm_dp_mst_connector_funcs = {
 199         .detect = dm_dp_mst_detect,
 200         .fill_modes = drm_helper_probe_single_connector_modes,
 201         .destroy = dm_dp_mst_connector_destroy,
 202         .reset = amdgpu_dm_connector_funcs_reset,
 203         .atomic_duplicate_state = amdgpu_dm_connector_atomic_duplicate_state,
 204         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
 205         .atomic_set_property = amdgpu_dm_connector_atomic_set_property,
 206         .atomic_get_property = amdgpu_dm_connector_atomic_get_property
 207 };
 208
 209 static int dm_dp_mst_get_modes(struct drm_connector *connector)
 210 {
 211         struct amdgpu_dm_connector *aconnector = to_amdgpu_dm_connector(connector);
 212         int ret = 0;
 213
 214         if (!aconnector)
 215                 return drm_add_edid_modes(connector, NULL);
 216
 217         if (!aconnector->edid) {
 218                 struct edid *edid;
 219                 edid = drm_dp_mst_get_edid(connector, &aconnector->mst_port->mst_mgr, aconnector->port);
 220
 221                 if (!edid) {
 222                         drm_connector_update_edid_property(
 223                                 &aconnector->base,
 224                                 NULL);
 225                         return ret;
 226                 }
 227
 228                 aconnector->edid = edid;
 229         }
 230
 231         if (!aconnector->dc_sink) {
 232                 struct dc_sink *dc_sink;
 233                 struct dc_sink_init_data init_params = {
 234                                 .link = aconnector->dc_link,
 235                                 .sink_signal = SIGNAL_TYPE_DISPLAY_PORT_MST };
 236                 dc_sink = dc_link_add_remote_sink(
 237                         aconnector->dc_link,
 238                         (uint8_t *)aconnector->edid,
 239                         (aconnector->edid->extensions + 1) * EDID_LENGTH,
 240                         &init_params);
 241
 242                 dc_sink->priv = aconnector;
 243                 aconnector->dc_sink = dc_sink;
 244
 245                 if (aconnector->dc_sink)
 246                         amdgpu_dm_update_freesync_caps(
 247                                         connector, aconnector->edid);
 248
 249         }
 250
 251         drm_connector_update_edid_property(
 252                                         &aconnector->base, aconnector->edid);
 253
 254         ret = drm_add_edid_modes(connector, aconnector->edid);
 255
 256         return ret;
 257 }
 258
 259 static struct drm_encoder *dm_mst_best_encoder(struct drm_connector *connector)
 260 {
 261         struct amdgpu_dm_connector *amdgpu_dm_connector = to_amdgpu_dm_connector(connector);
 262
 263         return &amdgpu_dm_connector->mst_encoder->base;
 264 }
 265
 266 static const struct drm_connector_helper_funcs dm_dp_mst_connector_helper_funcs = {
 267         .get_modes = dm_dp_mst_get_modes,
 268         .mode_valid = amdgpu_dm_connector_mode_valid,
 269         .best_encoder = dm_mst_best_encoder,
 270 };
 271
 272 static void amdgpu_dm_encoder_destroy(struct drm_encoder *encoder)
 273 {
 274         drm_encoder_cleanup(encoder);
 275         kfree(encoder);
 276 }
 277
 278 static const struct drm_encoder_funcs amdgpu_dm_encoder_funcs = {
 279         .destroy = amdgpu_dm_encoder_destroy,
 280 };
 281
 282 static struct amdgpu_encoder *
 283 dm_dp_create_fake_mst_encoder(struct amdgpu_dm_connector *connector)
 284 {
 285         struct drm_device *dev = connector->base.dev;
 286         struct amdgpu_device *adev = dev->dev_private;
 287         struct amdgpu_encoder *amdgpu_encoder;
 288         struct drm_encoder *encoder;
 289
 290         amdgpu_encoder = kzalloc(sizeof(*amdgpu_encoder), GFP_KERNEL);
 291         if (!amdgpu_encoder)
 292                 return NULL;
 293
 294         encoder = &amdgpu_encoder->base;
 295         encoder->possible_crtcs = amdgpu_dm_get_encoder_crtc_mask(adev);
 296
 297         drm_encoder_init(
 298                 dev,
 299                 &amdgpu_encoder->base,
 300                 &amdgpu_dm_encoder_funcs,
 301                 DRM_MODE_ENCODER_DPMST,
 302                 NULL);
 303
 304         drm_encoder_helper_add(encoder, &amdgpu_dm_encoder_helper_funcs);
 305
 306         return amdgpu_encoder;
 307 }
 308
 309 static struct drm_connector *
 310 dm_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
 311                         struct drm_dp_mst_port *port,
 312                         const char *pathprop)
 313 {
 314         struct amdgpu_dm_connector *master = container_of(mgr, struct amdgpu_dm_connector, mst_mgr);
 315         struct drm_device *dev = master->base.dev;
 316         struct amdgpu_device *adev = dev->dev_private;
 317         struct amdgpu_dm_connector *aconnector;
 318         struct drm_connector *connector;
 319
 320         aconnector = kzalloc(sizeof(*aconnector), GFP_KERNEL);
 321         if (!aconnector)
 322                 return NULL;
 323
 324         connector = &aconnector->base;
 325         aconnector->port = port;
 326         aconnector->mst_port = master;
 327
 328         if (drm_connector_init(
 329                 dev,
 330                 connector,
 331                 &dm_dp_mst_connector_funcs,
 332                 DRM_MODE_CONNECTOR_DisplayPort)) {
 333                 kfree(aconnector);
 334                 return NULL;
 335         }
 336         drm_connector_helper_add(connector, &dm_dp_mst_connector_helper_funcs);
 337
 338         amdgpu_dm_connector_init_helper(
 339                 &adev->dm,
 340                 aconnector,
 341                 DRM_MODE_CONNECTOR_DisplayPort,
 342                 master->dc_link,
 343                 master->connector_id);
 344
 345         aconnector->mst_encoder = dm_dp_create_fake_mst_encoder(master);
 346         drm_connector_attach_encoder(&aconnector->base,
 347                                      &aconnector->mst_encoder->base);
 348
 349         drm_object_attach_property(
 350                 &connector->base,
 351                 dev->mode_config.path_property,
 352                 0);
 353         drm_object_attach_property(
 354                 &connector->base,
 355                 dev->mode_config.tile_property,
 356                 0);
 357
 358         drm_connector_set_path_property(connector, pathprop);
 359
 360         /*
 361          * Initialize connector state before adding the connectror to drm and
 362          * framebuffer lists
 363          */
 364         amdgpu_dm_connector_funcs_reset(connector);
 365
 366         DRM_INFO("DM_MST: added connector: %p [id: %d] [master: %p]\n",
 367                  aconnector, connector->base.id, aconnector->mst_port);
 368
 369         drm_dp_mst_get_port_malloc(port);
 370
 371         DRM_DEBUG_KMS(":%d\n", connector->base.id);
 372
 373         return connector;
 374 }
 375
 376 static void dm_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
 377                                         struct drm_connector *connector)
 378 {
 379         struct amdgpu_dm_connector *master = container_of(mgr, struct amdgpu_dm_connector, mst_mgr);
 380         struct drm_device *dev = master->base.dev;
 381         struct amdgpu_device *adev = dev->dev_private;
 382         struct amdgpu_dm_connector *aconnector = to_amdgpu_dm_connector(connector);
 383
 384         DRM_INFO("DM_MST: Disabling connector: %p [id: %d] [master: %p]\n",
 385                  aconnector, connector->base.id, aconnector->mst_port);
 386
 387         if (aconnector->dc_sink) {
 388                 amdgpu_dm_update_freesync_caps(connector, NULL);
 389                 dc_link_remove_remote_sink(aconnector->dc_link,
 390                                            aconnector->dc_sink);
 391                 dc_sink_release(aconnector->dc_sink);
 392                 aconnector->dc_sink = NULL;
 393         }
 394
 395         drm_connector_unregister(connector);
 396         if (adev->mode_info.rfbdev)
 397                 drm_fb_helper_remove_one_connector(&adev->mode_info.rfbdev->helper, connector);
 398         drm_connector_put(connector);
 399 }
 400
 401 static void dm_dp_mst_register_connector(struct drm_connector *connector)
 402 {
 403         struct drm_device *dev = connector->dev;
 404         struct amdgpu_device *adev = dev->dev_private;
 405
 406         if (adev->mode_info.rfbdev)
 407                 drm_fb_helper_add_one_connector(&adev->mode_info.rfbdev->helper, connector);
 408         else
 409                 DRM_ERROR("adev->mode_info.rfbdev is NULL\n");
 410
 411         drm_connector_register(connector);
 412 }
 413
 414 static const struct drm_dp_mst_topology_cbs dm_mst_cbs = {
 415         .add_connector = dm_dp_add_mst_connector,
 416         .destroy_connector = dm_dp_destroy_mst_connector,
 417         .register_connector = dm_dp_mst_register_connector
 418 };
 419
 420 void amdgpu_dm_initialize_dp_connector(struct amdgpu_display_manager *dm,
 421                                        struct amdgpu_dm_connector *aconnector)
 422 {
 423         aconnector->dm_dp_aux.aux.name = "dmdc";
 424         aconnector->dm_dp_aux.aux.dev = dm->adev->dev;
 425         aconnector->dm_dp_aux.aux.transfer = dm_dp_aux_transfer;
 426         aconnector->dm_dp_aux.ddc_service = aconnector->dc_link->ddc;
 427
 428         drm_dp_aux_register(&aconnector->dm_dp_aux.aux);
 429         drm_dp_cec_register_connector(&aconnector->dm_dp_aux.aux,
 430                                       aconnector->base.name, dm->adev->dev);
 431         aconnector->mst_mgr.cbs = &dm_mst_cbs;
 432         drm_dp_mst_topology_mgr_init(
 433                 &aconnector->mst_mgr,
 434                 dm->adev->ddev,
 435                 &aconnector->dm_dp_aux.aux,
 436                 16,
 437                 4,
 438                 aconnector->connector_id);
 439 }
 440