drivers/gpu/drm/i915/display/intel_dp.h

   1 /* SPDX-License-Identifier: MIT */
   2 /*
   3  * Copyright © 2019 Intel Corporation
   4  */
   5
   6 #ifndef __INTEL_DP_H__
   7 #define __INTEL_DP_H__
   8
   9 #include <linux/types.h>
  10
  11 #include "i915_reg.h"
  12
  13 enum pipe;
  14 enum port;
  15 struct drm_connector_state;
  16 struct drm_encoder;
  17 struct drm_i915_private;
  18 struct drm_modeset_acquire_ctx;
  19 struct drm_dp_vsc_sdp;
  20 struct intel_atomic_state;
  21 struct intel_connector;
  22 struct intel_crtc_state;
  23 struct intel_digital_port;
  24 struct intel_dp;
  25 struct intel_encoder;
  26
  27 struct link_config_limits {
  28         int min_clock, max_clock;
  29         int min_lane_count, max_lane_count;
  30         int min_bpp, max_bpp;
  31 };
  32
  33 void intel_dp_adjust_compliance_config(struct intel_dp *intel_dp,
  34                                        struct intel_crtc_state *pipe_config,
  35                                        struct link_config_limits *limits);
  36 bool intel_dp_limited_color_range(const struct intel_crtc_state *crtc_state,
  37                                   const struct drm_connector_state *conn_state);
  38 int intel_dp_min_bpp(const struct intel_crtc_state *crtc_state);
  39 bool intel_dp_port_enabled(struct drm_i915_private *dev_priv,
  40                            i915_reg_t dp_reg, enum port port,
  41                            enum pipe *pipe);
  42 bool intel_dp_init(struct drm_i915_private *dev_priv, i915_reg_t output_reg,
  43                    enum port port);
  44 bool intel_dp_init_connector(struct intel_digital_port *dig_port,
  45                              struct intel_connector *intel_connector);
  46 void intel_dp_set_link_params(struct intel_dp *intel_dp,
  47                               int link_rate, u8 lane_count,
  48                               bool link_mst);
  49 int intel_dp_get_link_train_fallback_values(struct intel_dp *intel_dp,
  50                                             int link_rate, u8 lane_count);
  51 int intel_dp_retrain_link(struct intel_encoder *encoder,
  52                           struct drm_modeset_acquire_ctx *ctx);
  53 void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode);
  54 void intel_dp_sink_set_decompression_state(struct intel_dp *intel_dp,
  55                                            const struct intel_crtc_state *crtc_state,
  56                                            bool enable);
  57 void intel_dp_encoder_reset(struct drm_encoder *encoder);
  58 void intel_dp_encoder_suspend(struct intel_encoder *intel_encoder);
  59 void intel_dp_encoder_flush_work(struct drm_encoder *encoder);
  60 int intel_dp_compute_config(struct intel_encoder *encoder,
  61                             struct intel_crtc_state *pipe_config,
  62                             struct drm_connector_state *conn_state);
  63 bool intel_dp_is_edp(struct intel_dp *intel_dp);
  64 bool intel_dp_is_port_edp(struct drm_i915_private *dev_priv, enum port port);
  65 enum irqreturn intel_dp_hpd_pulse(struct intel_digital_port *dig_port,
  66                                   bool long_hpd);
  67 void intel_edp_backlight_on(const struct intel_crtc_state *crtc_state,
  68                             const struct drm_connector_state *conn_state);
  69 void intel_edp_backlight_off(const struct drm_connector_state *conn_state);
  70 void intel_edp_panel_vdd_on(struct intel_dp *intel_dp);
  71 void intel_edp_panel_on(struct intel_dp *intel_dp);
  72 void intel_edp_panel_off(struct intel_dp *intel_dp);
  73 void intel_dp_mst_suspend(struct drm_i915_private *dev_priv);
  74 void intel_dp_mst_resume(struct drm_i915_private *dev_priv);
  75 int intel_dp_max_link_rate(struct intel_dp *intel_dp);
  76 int intel_dp_max_lane_count(struct intel_dp *intel_dp);
  77 int intel_dp_rate_select(struct intel_dp *intel_dp, int rate);
  78 void intel_power_sequencer_reset(struct drm_i915_private *dev_priv);
  79 u32 intel_dp_pack_aux(const u8 *src, int src_bytes);
  80
  81 void intel_edp_drrs_enable(struct intel_dp *intel_dp,
  82                            const struct intel_crtc_state *crtc_state);
  83 void intel_edp_drrs_disable(struct intel_dp *intel_dp,
  84                             const struct intel_crtc_state *crtc_state);
  85 void intel_edp_drrs_update(struct intel_dp *intel_dp,
  86                            const struct intel_crtc_state *crtc_state);
  87 void intel_edp_drrs_invalidate(struct drm_i915_private *dev_priv,
  88                                unsigned int frontbuffer_bits);
  89 void intel_edp_drrs_flush(struct drm_i915_private *dev_priv,
  90                           unsigned int frontbuffer_bits);
  91
  92 void
  93 intel_dp_program_link_training_pattern(struct intel_dp *intel_dp,
  94                                        u8 dp_train_pat);
  95 void
  96 intel_dp_set_signal_levels(struct intel_dp *intel_dp);
  97 void intel_dp_set_idle_link_train(struct intel_dp *intel_dp);
  98 void intel_dp_compute_rate(struct intel_dp *intel_dp, int port_clock,
  99                            u8 *link_bw, u8 *rate_select);
 100 bool intel_dp_source_supports_hbr2(struct intel_dp *intel_dp);
 101 bool intel_dp_source_supports_hbr3(struct intel_dp *intel_dp);
 102 bool
 103 intel_dp_get_link_status(struct intel_dp *intel_dp, u8 *link_status);
 104
 105 bool intel_dp_get_colorimetry_status(struct intel_dp *intel_dp);
 106 int intel_dp_link_required(int pixel_clock, int bpp);
 107 int intel_dp_max_data_rate(int max_link_clock, int max_lanes);
 108 bool intel_dp_needs_vsc_sdp(const struct intel_crtc_state *crtc_state,
 109                             const struct drm_connector_state *conn_state);
 110 void intel_dp_compute_psr_vsc_sdp(struct intel_dp *intel_dp,
 111                                   const struct intel_crtc_state *crtc_state,
 112                                   const struct drm_connector_state *conn_state,
 113                                   struct drm_dp_vsc_sdp *vsc);
 114 void intel_write_dp_vsc_sdp(struct intel_encoder *encoder,
 115                             const struct intel_crtc_state *crtc_state,
 116                             struct drm_dp_vsc_sdp *vsc);
 117 void intel_dp_set_infoframes(struct intel_encoder *encoder, bool enable,
 118                              const struct intel_crtc_state *crtc_state,
 119                              const struct drm_connector_state *conn_state);
 120 void intel_read_dp_sdp(struct intel_encoder *encoder,
 121                        struct intel_crtc_state *crtc_state,
 122                        unsigned int type);
 123 bool intel_digital_port_connected(struct intel_encoder *encoder);
 124 void intel_dp_process_phy_request(struct intel_dp *intel_dp);
 125
 126 static inline unsigned int intel_dp_unused_lane_mask(int lane_count)
 127 {
 128         return ~((1 << lane_count) - 1) & 0xf;
 129 }
 130
 131 u32 intel_dp_mode_to_fec_clock(u32 mode_clock);
 132
 133 void intel_ddi_update_pipe(struct intel_atomic_state *state,
 134                            struct intel_encoder *encoder,
 135                            const struct intel_crtc_state *crtc_state,
 136                            const struct drm_connector_state *conn_state);
 137
 138 int intel_dp_init_hdcp(struct intel_digital_port *dig_port,
 139                        struct intel_connector *intel_connector);
 140
 141 #endif /* __INTEL_DP_H__ */