2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
25 * Eric Anholt <eric@anholt.net>
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
31 #include <drm/drm_atomic_helper.h>
32 #include <drm/drm_crtc.h>
36 #include "intel_connector.h"
38 #include "intel_display_types.h"
39 #include "intel_dvo.h"
40 #include "intel_dvo_dev.h"
41 #include "intel_dvo_regs.h"
42 #include "intel_gmbus.h"
43 #include "intel_panel.h"
45 #define INTEL_DVO_CHIP_NONE 0
46 #define INTEL_DVO_CHIP_LVDS 1
47 #define INTEL_DVO_CHIP_TMDS 2
48 #define INTEL_DVO_CHIP_TVOUT 4
49 #define INTEL_DVO_CHIP_LVDS_NO_FIXED 5
51 #define SIL164_ADDR 0x38
52 #define CH7xxx_ADDR 0x76
53 #define TFP410_ADDR 0x38
54 #define NS2501_ADDR 0x38
56 static const struct intel_dvo_device intel_dvo_devices
[] = {
58 .type
= INTEL_DVO_CHIP_TMDS
,
61 .slave_addr
= SIL164_ADDR
,
62 .dev_ops
= &sil164_ops
,
65 .type
= INTEL_DVO_CHIP_TMDS
,
68 .slave_addr
= CH7xxx_ADDR
,
69 .dev_ops
= &ch7xxx_ops
,
72 .type
= INTEL_DVO_CHIP_TMDS
,
75 .slave_addr
= 0x75, /* For some ch7010 */
76 .dev_ops
= &ch7xxx_ops
,
79 .type
= INTEL_DVO_CHIP_LVDS
,
82 .slave_addr
= 0x02, /* Might also be 0x44, 0x84, 0xc4 */
86 .type
= INTEL_DVO_CHIP_TMDS
,
89 .slave_addr
= TFP410_ADDR
,
90 .dev_ops
= &tfp410_ops
,
93 .type
= INTEL_DVO_CHIP_LVDS
,
97 .gpio
= GMBUS_PIN_DPB
,
98 .dev_ops
= &ch7017_ops
,
101 .type
= INTEL_DVO_CHIP_LVDS_NO_FIXED
,
104 .slave_addr
= NS2501_ADDR
,
105 .dev_ops
= &ns2501_ops
,
110 struct intel_encoder base
;
112 struct intel_dvo_device dev
;
114 struct intel_connector
*attached_connector
;
117 static struct intel_dvo
*enc_to_dvo(struct intel_encoder
*encoder
)
119 return container_of(encoder
, struct intel_dvo
, base
);
122 static struct intel_dvo
*intel_attached_dvo(struct intel_connector
*connector
)
124 return enc_to_dvo(intel_attached_encoder(connector
));
127 static bool intel_dvo_connector_get_hw_state(struct intel_connector
*connector
)
129 struct drm_i915_private
*i915
= to_i915(connector
->base
.dev
);
130 struct intel_encoder
*encoder
= intel_attached_encoder(connector
);
131 struct intel_dvo
*intel_dvo
= enc_to_dvo(encoder
);
132 enum port port
= encoder
->port
;
135 tmp
= intel_de_read(i915
, DVO(port
));
137 if (!(tmp
& DVO_ENABLE
))
140 return intel_dvo
->dev
.dev_ops
->get_hw_state(&intel_dvo
->dev
);
143 static bool intel_dvo_get_hw_state(struct intel_encoder
*encoder
,
146 struct drm_i915_private
*i915
= to_i915(encoder
->base
.dev
);
147 enum port port
= encoder
->port
;
150 tmp
= intel_de_read(i915
, DVO(port
));
152 *pipe
= REG_FIELD_GET(DVO_PIPE_SEL_MASK
, tmp
);
154 return tmp
& DVO_ENABLE
;
157 static void intel_dvo_get_config(struct intel_encoder
*encoder
,
158 struct intel_crtc_state
*pipe_config
)
160 struct drm_i915_private
*i915
= to_i915(encoder
->base
.dev
);
161 enum port port
= encoder
->port
;
164 pipe_config
->output_types
|= BIT(INTEL_OUTPUT_DVO
);
166 tmp
= intel_de_read(i915
, DVO(port
));
167 if (tmp
& DVO_HSYNC_ACTIVE_HIGH
)
168 flags
|= DRM_MODE_FLAG_PHSYNC
;
170 flags
|= DRM_MODE_FLAG_NHSYNC
;
171 if (tmp
& DVO_VSYNC_ACTIVE_HIGH
)
172 flags
|= DRM_MODE_FLAG_PVSYNC
;
174 flags
|= DRM_MODE_FLAG_NVSYNC
;
176 pipe_config
->hw
.adjusted_mode
.flags
|= flags
;
178 pipe_config
->hw
.adjusted_mode
.crtc_clock
= pipe_config
->port_clock
;
181 static void intel_disable_dvo(struct intel_atomic_state
*state
,
182 struct intel_encoder
*encoder
,
183 const struct intel_crtc_state
*old_crtc_state
,
184 const struct drm_connector_state
*old_conn_state
)
186 struct drm_i915_private
*i915
= to_i915(encoder
->base
.dev
);
187 struct intel_dvo
*intel_dvo
= enc_to_dvo(encoder
);
188 enum port port
= encoder
->port
;
190 intel_dvo
->dev
.dev_ops
->dpms(&intel_dvo
->dev
, false);
192 intel_de_rmw(i915
, DVO(port
), DVO_ENABLE
, 0);
193 intel_de_posting_read(i915
, DVO(port
));
196 static void intel_enable_dvo(struct intel_atomic_state
*state
,
197 struct intel_encoder
*encoder
,
198 const struct intel_crtc_state
*pipe_config
,
199 const struct drm_connector_state
*conn_state
)
201 struct drm_i915_private
*i915
= to_i915(encoder
->base
.dev
);
202 struct intel_dvo
*intel_dvo
= enc_to_dvo(encoder
);
203 enum port port
= encoder
->port
;
205 intel_dvo
->dev
.dev_ops
->mode_set(&intel_dvo
->dev
,
206 &pipe_config
->hw
.mode
,
207 &pipe_config
->hw
.adjusted_mode
);
209 intel_de_rmw(i915
, DVO(port
), 0, DVO_ENABLE
);
210 intel_de_posting_read(i915
, DVO(port
));
212 intel_dvo
->dev
.dev_ops
->dpms(&intel_dvo
->dev
, true);
215 static enum drm_mode_status
216 intel_dvo_mode_valid(struct drm_connector
*_connector
,
217 struct drm_display_mode
*mode
)
219 struct intel_connector
*connector
= to_intel_connector(_connector
);
220 struct intel_dvo
*intel_dvo
= intel_attached_dvo(connector
);
221 const struct drm_display_mode
*fixed_mode
=
222 intel_panel_fixed_mode(connector
, mode
);
223 int max_dotclk
= to_i915(connector
->base
.dev
)->max_dotclk_freq
;
224 int target_clock
= mode
->clock
;
226 if (mode
->flags
& DRM_MODE_FLAG_DBLSCAN
)
227 return MODE_NO_DBLESCAN
;
229 /* XXX: Validate clock range */
232 enum drm_mode_status status
;
234 status
= intel_panel_mode_valid(connector
, mode
);
235 if (status
!= MODE_OK
)
238 target_clock
= fixed_mode
->clock
;
241 if (target_clock
> max_dotclk
)
242 return MODE_CLOCK_HIGH
;
244 return intel_dvo
->dev
.dev_ops
->mode_valid(&intel_dvo
->dev
, mode
);
247 static int intel_dvo_compute_config(struct intel_encoder
*encoder
,
248 struct intel_crtc_state
*pipe_config
,
249 struct drm_connector_state
*conn_state
)
251 struct intel_dvo
*intel_dvo
= enc_to_dvo(encoder
);
252 struct intel_connector
*connector
= to_intel_connector(conn_state
->connector
);
253 struct drm_display_mode
*adjusted_mode
= &pipe_config
->hw
.adjusted_mode
;
254 const struct drm_display_mode
*fixed_mode
=
255 intel_panel_fixed_mode(intel_dvo
->attached_connector
, adjusted_mode
);
258 * If we have timings from the BIOS for the panel, put them in
259 * to the adjusted mode. The CRTC will be set up for this mode,
260 * with the panel scaling set up to source from the H/VDisplay
261 * of the original mode.
266 ret
= intel_panel_compute_config(connector
, adjusted_mode
);
271 if (adjusted_mode
->flags
& DRM_MODE_FLAG_DBLSCAN
)
274 pipe_config
->sink_format
= INTEL_OUTPUT_FORMAT_RGB
;
275 pipe_config
->output_format
= INTEL_OUTPUT_FORMAT_RGB
;
280 static void intel_dvo_pre_enable(struct intel_atomic_state
*state
,
281 struct intel_encoder
*encoder
,
282 const struct intel_crtc_state
*pipe_config
,
283 const struct drm_connector_state
*conn_state
)
285 struct drm_i915_private
*i915
= to_i915(encoder
->base
.dev
);
286 struct intel_crtc
*crtc
= to_intel_crtc(pipe_config
->uapi
.crtc
);
287 const struct drm_display_mode
*adjusted_mode
= &pipe_config
->hw
.adjusted_mode
;
288 enum port port
= encoder
->port
;
289 enum pipe pipe
= crtc
->pipe
;
292 /* Save the active data order, since I don't know what it should be set to. */
293 dvo_val
= intel_de_read(i915
, DVO(port
)) &
294 (DVO_DEDICATED_INT_ENABLE
|
295 DVO_PRESERVE_MASK
| DVO_ACT_DATA_ORDER_MASK
);
296 dvo_val
|= DVO_DATA_ORDER_FP
| DVO_BORDER_ENABLE
|
297 DVO_BLANK_ACTIVE_HIGH
;
299 dvo_val
|= DVO_PIPE_SEL(pipe
);
300 dvo_val
|= DVO_PIPE_STALL
;
301 if (adjusted_mode
->flags
& DRM_MODE_FLAG_PHSYNC
)
302 dvo_val
|= DVO_HSYNC_ACTIVE_HIGH
;
303 if (adjusted_mode
->flags
& DRM_MODE_FLAG_PVSYNC
)
304 dvo_val
|= DVO_VSYNC_ACTIVE_HIGH
;
306 intel_de_write(i915
, DVO_SRCDIM(port
),
307 DVO_SRCDIM_HORIZONTAL(adjusted_mode
->crtc_hdisplay
) |
308 DVO_SRCDIM_VERTICAL(adjusted_mode
->crtc_vdisplay
));
309 intel_de_write(i915
, DVO(port
), dvo_val
);
312 static enum drm_connector_status
313 intel_dvo_detect(struct drm_connector
*_connector
, bool force
)
315 struct intel_connector
*connector
= to_intel_connector(_connector
);
316 struct drm_i915_private
*i915
= to_i915(connector
->base
.dev
);
317 struct intel_dvo
*intel_dvo
= intel_attached_dvo(connector
);
319 drm_dbg_kms(&i915
->drm
, "[CONNECTOR:%d:%s]\n",
320 connector
->base
.base
.id
, connector
->base
.name
);
322 if (!intel_display_device_enabled(i915
))
323 return connector_status_disconnected
;
325 return intel_dvo
->dev
.dev_ops
->detect(&intel_dvo
->dev
);
328 static int intel_dvo_get_modes(struct drm_connector
*_connector
)
330 struct intel_connector
*connector
= to_intel_connector(_connector
);
334 * We should probably have an i2c driver get_modes function for those
335 * devices which will have a fixed set of modes determined by the chip
336 * (TV-out, for example), but for now with just TMDS and LVDS,
337 * that's not the case.
339 num_modes
= intel_ddc_get_modes(&connector
->base
, connector
->base
.ddc
);
343 return intel_panel_get_modes(connector
);
346 static const struct drm_connector_funcs intel_dvo_connector_funcs
= {
347 .detect
= intel_dvo_detect
,
348 .late_register
= intel_connector_register
,
349 .early_unregister
= intel_connector_unregister
,
350 .destroy
= intel_connector_destroy
,
351 .fill_modes
= drm_helper_probe_single_connector_modes
,
352 .atomic_destroy_state
= drm_atomic_helper_connector_destroy_state
,
353 .atomic_duplicate_state
= drm_atomic_helper_connector_duplicate_state
,
356 static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs
= {
357 .mode_valid
= intel_dvo_mode_valid
,
358 .get_modes
= intel_dvo_get_modes
,
361 static void intel_dvo_enc_destroy(struct drm_encoder
*encoder
)
363 struct intel_dvo
*intel_dvo
= enc_to_dvo(to_intel_encoder(encoder
));
365 if (intel_dvo
->dev
.dev_ops
->destroy
)
366 intel_dvo
->dev
.dev_ops
->destroy(&intel_dvo
->dev
);
368 intel_encoder_destroy(encoder
);
371 static const struct drm_encoder_funcs intel_dvo_enc_funcs
= {
372 .destroy
= intel_dvo_enc_destroy
,
375 static int intel_dvo_encoder_type(const struct intel_dvo_device
*dvo
)
378 case INTEL_DVO_CHIP_TMDS
:
379 return DRM_MODE_ENCODER_TMDS
;
380 case INTEL_DVO_CHIP_LVDS_NO_FIXED
:
381 case INTEL_DVO_CHIP_LVDS
:
382 return DRM_MODE_ENCODER_LVDS
;
384 MISSING_CASE(dvo
->type
);
385 return DRM_MODE_ENCODER_NONE
;
389 static int intel_dvo_connector_type(const struct intel_dvo_device
*dvo
)
392 case INTEL_DVO_CHIP_TMDS
:
393 return DRM_MODE_CONNECTOR_DVII
;
394 case INTEL_DVO_CHIP_LVDS_NO_FIXED
:
395 case INTEL_DVO_CHIP_LVDS
:
396 return DRM_MODE_CONNECTOR_LVDS
;
398 MISSING_CASE(dvo
->type
);
399 return DRM_MODE_CONNECTOR_Unknown
;
403 static bool intel_dvo_init_dev(struct drm_i915_private
*dev_priv
,
404 struct intel_dvo
*intel_dvo
,
405 const struct intel_dvo_device
*dvo
)
407 struct i2c_adapter
*i2c
;
408 u32 dpll
[I915_MAX_PIPES
];
414 * Allow the I2C driver info to specify the GPIO to be used in
415 * special cases, but otherwise default to what's defined
418 if (intel_gmbus_is_valid_pin(dev_priv
, dvo
->gpio
))
420 else if (dvo
->type
== INTEL_DVO_CHIP_LVDS
)
421 gpio
= GMBUS_PIN_SSC
;
423 gpio
= GMBUS_PIN_DPB
;
426 * Set up the I2C bus necessary for the chip we're probing.
427 * It appears that everything is on GPIOE except for panels
428 * on i830 laptops, which are on GPIOB (DVOA).
430 i2c
= intel_gmbus_get_adapter(dev_priv
, gpio
);
432 intel_dvo
->dev
= *dvo
;
435 * GMBUS NAK handling seems to be unstable, hence let the
436 * transmitter detection run in bit banging mode for now.
438 intel_gmbus_force_bit(i2c
, true);
441 * ns2501 requires the DVO 2x clock before it will
442 * respond to i2c accesses, so make sure we have
443 * the clock enabled before we attempt to initialize
446 for_each_pipe(dev_priv
, pipe
)
447 dpll
[pipe
] = intel_de_rmw(dev_priv
, DPLL(pipe
), 0, DPLL_DVO_2X_MODE
);
449 ret
= dvo
->dev_ops
->init(&intel_dvo
->dev
, i2c
);
451 /* restore the DVO 2x clock state to original */
452 for_each_pipe(dev_priv
, pipe
) {
453 intel_de_write(dev_priv
, DPLL(pipe
), dpll
[pipe
]);
456 intel_gmbus_force_bit(i2c
, false);
461 static bool intel_dvo_probe(struct drm_i915_private
*i915
,
462 struct intel_dvo
*intel_dvo
)
466 /* Now, try to find a controller */
467 for (i
= 0; i
< ARRAY_SIZE(intel_dvo_devices
); i
++) {
468 if (intel_dvo_init_dev(i915
, intel_dvo
,
469 &intel_dvo_devices
[i
]))
476 void intel_dvo_init(struct drm_i915_private
*i915
)
478 struct intel_connector
*connector
;
479 struct intel_encoder
*encoder
;
480 struct intel_dvo
*intel_dvo
;
482 intel_dvo
= kzalloc(sizeof(*intel_dvo
), GFP_KERNEL
);
486 connector
= intel_connector_alloc();
492 intel_dvo
->attached_connector
= connector
;
494 encoder
= &intel_dvo
->base
;
496 encoder
->disable
= intel_disable_dvo
;
497 encoder
->enable
= intel_enable_dvo
;
498 encoder
->get_hw_state
= intel_dvo_get_hw_state
;
499 encoder
->get_config
= intel_dvo_get_config
;
500 encoder
->compute_config
= intel_dvo_compute_config
;
501 encoder
->pre_enable
= intel_dvo_pre_enable
;
502 connector
->get_hw_state
= intel_dvo_connector_get_hw_state
;
504 if (!intel_dvo_probe(i915
, intel_dvo
)) {
506 intel_connector_free(connector
);
510 assert_port_valid(i915
, intel_dvo
->dev
.port
);
512 encoder
->type
= INTEL_OUTPUT_DVO
;
513 encoder
->power_domain
= POWER_DOMAIN_PORT_OTHER
;
514 encoder
->port
= intel_dvo
->dev
.port
;
515 encoder
->pipe_mask
= ~0;
517 if (intel_dvo
->dev
.type
!= INTEL_DVO_CHIP_LVDS
)
518 encoder
->cloneable
= BIT(INTEL_OUTPUT_ANALOG
) |
519 BIT(INTEL_OUTPUT_DVO
);
521 drm_encoder_init(&i915
->drm
, &encoder
->base
,
522 &intel_dvo_enc_funcs
,
523 intel_dvo_encoder_type(&intel_dvo
->dev
),
524 "DVO %c", port_name(encoder
->port
));
526 drm_dbg_kms(&i915
->drm
, "[ENCODER:%d:%s] detected %s\n",
527 encoder
->base
.base
.id
, encoder
->base
.name
,
528 intel_dvo
->dev
.name
);
530 if (intel_dvo
->dev
.type
== INTEL_DVO_CHIP_TMDS
)
531 connector
->polled
= DRM_CONNECTOR_POLL_CONNECT
|
532 DRM_CONNECTOR_POLL_DISCONNECT
;
534 drm_connector_init_with_ddc(&i915
->drm
, &connector
->base
,
535 &intel_dvo_connector_funcs
,
536 intel_dvo_connector_type(&intel_dvo
->dev
),
537 intel_gmbus_get_adapter(i915
, GMBUS_PIN_DPC
));
539 drm_connector_helper_add(&connector
->base
,
540 &intel_dvo_connector_helper_funcs
);
541 connector
->base
.display_info
.subpixel_order
= SubPixelHorizontalRGB
;
543 intel_connector_attach_encoder(connector
, encoder
);
545 if (intel_dvo
->dev
.type
== INTEL_DVO_CHIP_LVDS
) {
547 * For our LVDS chipsets, we should hopefully be able
548 * to dig the fixed panel mode out of the BIOS data.
549 * However, it's in a different format from the BIOS
550 * data on chipsets with integrated LVDS (stored in AIM
551 * headers, likely), so for now, just get the current
552 * mode being output through DVO.
554 intel_panel_add_encoder_fixed_mode(connector
, encoder
);
556 intel_panel_init(connector
, NULL
);