2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
26 * Eric Anholt <eric@anholt.net>
29 #include <linux/delay.h>
30 #include <linux/export.h>
31 #include <linux/i2c.h>
32 #include <linux/slab.h>
34 #include <drm/display/drm_hdmi_helper.h>
35 #include <drm/drm_atomic_helper.h>
36 #include <drm/drm_crtc.h>
37 #include <drm/drm_edid.h>
38 #include <drm/drm_eld.h>
42 #include "intel_atomic.h"
43 #include "intel_audio.h"
44 #include "intel_connector.h"
45 #include "intel_crtc.h"
47 #include "intel_display_types.h"
48 #include "intel_fdi.h"
49 #include "intel_fifo_underrun.h"
50 #include "intel_gmbus.h"
51 #include "intel_hdmi.h"
52 #include "intel_hotplug.h"
53 #include "intel_panel.h"
54 #include "intel_sdvo.h"
55 #include "intel_sdvo_regs.h"
57 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
58 #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
59 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
60 #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
62 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK | SDVO_TV_MASK)
64 #define IS_TV(c) ((c)->output_flag & SDVO_TV_MASK)
65 #define IS_TMDS(c) ((c)->output_flag & SDVO_TMDS_MASK)
66 #define IS_LVDS(c) ((c)->output_flag & SDVO_LVDS_MASK)
67 #define IS_TV_OR_LVDS(c) ((c)->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
68 #define IS_DIGITAL(c) ((c)->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
70 #define HAS_DDC(c) ((c)->output_flag & (SDVO_RGB_MASK | SDVO_TMDS_MASK | \
73 static const char * const tv_format_names
[] = {
74 "NTSC_M" , "NTSC_J" , "NTSC_443",
75 "PAL_B" , "PAL_D" , "PAL_G" ,
76 "PAL_H" , "PAL_I" , "PAL_M" ,
77 "PAL_N" , "PAL_NC" , "PAL_60" ,
78 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
79 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
83 #define TV_FORMAT_NUM ARRAY_SIZE(tv_format_names)
87 struct intel_sdvo_ddc
{
88 struct i2c_adapter ddc
;
89 struct intel_sdvo
*sdvo
;
94 struct intel_encoder base
;
96 struct i2c_adapter
*i2c
;
99 struct intel_sdvo_ddc ddc
[3];
101 /* Register for the SDVO device: SDVOB or SDVOC */
105 * Capabilities of the SDVO device returned by
106 * intel_sdvo_get_capabilities()
108 struct intel_sdvo_caps caps
;
112 /* Pixel clock limitations reported by the SDVO device, in kHz */
113 int pixel_clock_min
, pixel_clock_max
;
116 * Hotplug activation bits for this device
121 * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd
126 struct intel_sdvo_connector
{
127 struct intel_connector base
;
129 /* Mark the type of connector */
132 /* This contains all current supported TV format */
133 u8 tv_format_supported
[TV_FORMAT_NUM
];
134 int format_supported_num
;
135 struct drm_property
*tv_format
;
137 /* add the property for the SDVO-TV */
138 struct drm_property
*left
;
139 struct drm_property
*right
;
140 struct drm_property
*top
;
141 struct drm_property
*bottom
;
142 struct drm_property
*hpos
;
143 struct drm_property
*vpos
;
144 struct drm_property
*contrast
;
145 struct drm_property
*saturation
;
146 struct drm_property
*hue
;
147 struct drm_property
*sharpness
;
148 struct drm_property
*flicker_filter
;
149 struct drm_property
*flicker_filter_adaptive
;
150 struct drm_property
*flicker_filter_2d
;
151 struct drm_property
*tv_chroma_filter
;
152 struct drm_property
*tv_luma_filter
;
153 struct drm_property
*dot_crawl
;
155 /* add the property for the SDVO-TV/LVDS */
156 struct drm_property
*brightness
;
158 /* this is to get the range of margin.*/
159 u32 max_hscan
, max_vscan
;
162 * This is set if we treat the device as HDMI, instead of DVI.
167 struct intel_sdvo_connector_state
{
168 /* base.base: tv.saturation/contrast/hue/brightness */
169 struct intel_digital_connector_state base
;
172 unsigned overscan_h
, overscan_v
, hpos
, vpos
, sharpness
;
173 unsigned flicker_filter
, flicker_filter_2d
, flicker_filter_adaptive
;
174 unsigned chroma_filter
, luma_filter
, dot_crawl
;
178 static struct intel_sdvo
*to_sdvo(struct intel_encoder
*encoder
)
180 return container_of(encoder
, struct intel_sdvo
, base
);
183 static struct intel_sdvo
*intel_attached_sdvo(struct intel_connector
*connector
)
185 return to_sdvo(intel_attached_encoder(connector
));
188 static struct intel_sdvo_connector
*
189 to_intel_sdvo_connector(struct drm_connector
*connector
)
191 return container_of(connector
, struct intel_sdvo_connector
, base
.base
);
194 #define to_intel_sdvo_connector_state(conn_state) \
195 container_of((conn_state), struct intel_sdvo_connector_state, base.base)
198 intel_sdvo_output_setup(struct intel_sdvo
*intel_sdvo
);
200 intel_sdvo_tv_create_property(struct intel_sdvo
*intel_sdvo
,
201 struct intel_sdvo_connector
*intel_sdvo_connector
,
204 intel_sdvo_create_enhance_property(struct intel_sdvo
*intel_sdvo
,
205 struct intel_sdvo_connector
*intel_sdvo_connector
);
208 * Writes the SDVOB or SDVOC with the given value, but always writes both
209 * SDVOB and SDVOC to work around apparent hardware issues (according to
210 * comments in the BIOS).
212 static void intel_sdvo_write_sdvox(struct intel_sdvo
*intel_sdvo
, u32 val
)
214 struct drm_device
*dev
= intel_sdvo
->base
.base
.dev
;
215 struct drm_i915_private
*dev_priv
= to_i915(dev
);
216 u32 bval
= val
, cval
= val
;
219 if (HAS_PCH_SPLIT(dev_priv
)) {
220 intel_de_write(dev_priv
, intel_sdvo
->sdvo_reg
, val
);
221 intel_de_posting_read(dev_priv
, intel_sdvo
->sdvo_reg
);
223 * HW workaround, need to write this twice for issue
224 * that may result in first write getting masked.
226 if (HAS_PCH_IBX(dev_priv
)) {
227 intel_de_write(dev_priv
, intel_sdvo
->sdvo_reg
, val
);
228 intel_de_posting_read(dev_priv
, intel_sdvo
->sdvo_reg
);
233 if (intel_sdvo
->base
.port
== PORT_B
)
234 cval
= intel_de_read(dev_priv
, GEN3_SDVOC
);
236 bval
= intel_de_read(dev_priv
, GEN3_SDVOB
);
239 * Write the registers twice for luck. Sometimes,
240 * writing them only once doesn't appear to 'stick'.
241 * The BIOS does this too. Yay, magic
243 for (i
= 0; i
< 2; i
++) {
244 intel_de_write(dev_priv
, GEN3_SDVOB
, bval
);
245 intel_de_posting_read(dev_priv
, GEN3_SDVOB
);
247 intel_de_write(dev_priv
, GEN3_SDVOC
, cval
);
248 intel_de_posting_read(dev_priv
, GEN3_SDVOC
);
252 static bool intel_sdvo_read_byte(struct intel_sdvo
*intel_sdvo
, u8 addr
, u8
*ch
)
254 struct i2c_msg msgs
[] = {
256 .addr
= intel_sdvo
->slave_addr
,
262 .addr
= intel_sdvo
->slave_addr
,
270 if ((ret
= i2c_transfer(intel_sdvo
->i2c
, msgs
, 2)) == 2)
273 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret
);
277 #define SDVO_CMD_NAME_ENTRY(cmd_) { .cmd = SDVO_CMD_ ## cmd_, .name = #cmd_ }
279 /** Mapping of command numbers to names, for debug output */
280 static const struct {
283 } __packed sdvo_cmd_names
[] = {
284 SDVO_CMD_NAME_ENTRY(RESET
),
285 SDVO_CMD_NAME_ENTRY(GET_DEVICE_CAPS
),
286 SDVO_CMD_NAME_ENTRY(GET_FIRMWARE_REV
),
287 SDVO_CMD_NAME_ENTRY(GET_TRAINED_INPUTS
),
288 SDVO_CMD_NAME_ENTRY(GET_ACTIVE_OUTPUTS
),
289 SDVO_CMD_NAME_ENTRY(SET_ACTIVE_OUTPUTS
),
290 SDVO_CMD_NAME_ENTRY(GET_IN_OUT_MAP
),
291 SDVO_CMD_NAME_ENTRY(SET_IN_OUT_MAP
),
292 SDVO_CMD_NAME_ENTRY(GET_ATTACHED_DISPLAYS
),
293 SDVO_CMD_NAME_ENTRY(GET_HOT_PLUG_SUPPORT
),
294 SDVO_CMD_NAME_ENTRY(SET_ACTIVE_HOT_PLUG
),
295 SDVO_CMD_NAME_ENTRY(GET_ACTIVE_HOT_PLUG
),
296 SDVO_CMD_NAME_ENTRY(GET_INTERRUPT_EVENT_SOURCE
),
297 SDVO_CMD_NAME_ENTRY(SET_TARGET_INPUT
),
298 SDVO_CMD_NAME_ENTRY(SET_TARGET_OUTPUT
),
299 SDVO_CMD_NAME_ENTRY(GET_INPUT_TIMINGS_PART1
),
300 SDVO_CMD_NAME_ENTRY(GET_INPUT_TIMINGS_PART2
),
301 SDVO_CMD_NAME_ENTRY(SET_INPUT_TIMINGS_PART1
),
302 SDVO_CMD_NAME_ENTRY(SET_INPUT_TIMINGS_PART2
),
303 SDVO_CMD_NAME_ENTRY(SET_OUTPUT_TIMINGS_PART1
),
304 SDVO_CMD_NAME_ENTRY(SET_OUTPUT_TIMINGS_PART2
),
305 SDVO_CMD_NAME_ENTRY(GET_OUTPUT_TIMINGS_PART1
),
306 SDVO_CMD_NAME_ENTRY(GET_OUTPUT_TIMINGS_PART2
),
307 SDVO_CMD_NAME_ENTRY(CREATE_PREFERRED_INPUT_TIMING
),
308 SDVO_CMD_NAME_ENTRY(GET_PREFERRED_INPUT_TIMING_PART1
),
309 SDVO_CMD_NAME_ENTRY(GET_PREFERRED_INPUT_TIMING_PART2
),
310 SDVO_CMD_NAME_ENTRY(GET_INPUT_PIXEL_CLOCK_RANGE
),
311 SDVO_CMD_NAME_ENTRY(GET_OUTPUT_PIXEL_CLOCK_RANGE
),
312 SDVO_CMD_NAME_ENTRY(GET_SUPPORTED_CLOCK_RATE_MULTS
),
313 SDVO_CMD_NAME_ENTRY(GET_CLOCK_RATE_MULT
),
314 SDVO_CMD_NAME_ENTRY(SET_CLOCK_RATE_MULT
),
315 SDVO_CMD_NAME_ENTRY(GET_SUPPORTED_TV_FORMATS
),
316 SDVO_CMD_NAME_ENTRY(GET_TV_FORMAT
),
317 SDVO_CMD_NAME_ENTRY(SET_TV_FORMAT
),
318 SDVO_CMD_NAME_ENTRY(GET_SUPPORTED_POWER_STATES
),
319 SDVO_CMD_NAME_ENTRY(GET_POWER_STATE
),
320 SDVO_CMD_NAME_ENTRY(SET_ENCODER_POWER_STATE
),
321 SDVO_CMD_NAME_ENTRY(SET_DISPLAY_POWER_STATE
),
322 SDVO_CMD_NAME_ENTRY(SET_CONTROL_BUS_SWITCH
),
323 SDVO_CMD_NAME_ENTRY(GET_SDTV_RESOLUTION_SUPPORT
),
324 SDVO_CMD_NAME_ENTRY(GET_SCALED_HDTV_RESOLUTION_SUPPORT
),
325 SDVO_CMD_NAME_ENTRY(GET_SUPPORTED_ENHANCEMENTS
),
327 /* Add the op code for SDVO enhancements */
328 SDVO_CMD_NAME_ENTRY(GET_MAX_HPOS
),
329 SDVO_CMD_NAME_ENTRY(GET_HPOS
),
330 SDVO_CMD_NAME_ENTRY(SET_HPOS
),
331 SDVO_CMD_NAME_ENTRY(GET_MAX_VPOS
),
332 SDVO_CMD_NAME_ENTRY(GET_VPOS
),
333 SDVO_CMD_NAME_ENTRY(SET_VPOS
),
334 SDVO_CMD_NAME_ENTRY(GET_MAX_SATURATION
),
335 SDVO_CMD_NAME_ENTRY(GET_SATURATION
),
336 SDVO_CMD_NAME_ENTRY(SET_SATURATION
),
337 SDVO_CMD_NAME_ENTRY(GET_MAX_HUE
),
338 SDVO_CMD_NAME_ENTRY(GET_HUE
),
339 SDVO_CMD_NAME_ENTRY(SET_HUE
),
340 SDVO_CMD_NAME_ENTRY(GET_MAX_CONTRAST
),
341 SDVO_CMD_NAME_ENTRY(GET_CONTRAST
),
342 SDVO_CMD_NAME_ENTRY(SET_CONTRAST
),
343 SDVO_CMD_NAME_ENTRY(GET_MAX_BRIGHTNESS
),
344 SDVO_CMD_NAME_ENTRY(GET_BRIGHTNESS
),
345 SDVO_CMD_NAME_ENTRY(SET_BRIGHTNESS
),
346 SDVO_CMD_NAME_ENTRY(GET_MAX_OVERSCAN_H
),
347 SDVO_CMD_NAME_ENTRY(GET_OVERSCAN_H
),
348 SDVO_CMD_NAME_ENTRY(SET_OVERSCAN_H
),
349 SDVO_CMD_NAME_ENTRY(GET_MAX_OVERSCAN_V
),
350 SDVO_CMD_NAME_ENTRY(GET_OVERSCAN_V
),
351 SDVO_CMD_NAME_ENTRY(SET_OVERSCAN_V
),
352 SDVO_CMD_NAME_ENTRY(GET_MAX_FLICKER_FILTER
),
353 SDVO_CMD_NAME_ENTRY(GET_FLICKER_FILTER
),
354 SDVO_CMD_NAME_ENTRY(SET_FLICKER_FILTER
),
355 SDVO_CMD_NAME_ENTRY(GET_MAX_FLICKER_FILTER_ADAPTIVE
),
356 SDVO_CMD_NAME_ENTRY(GET_FLICKER_FILTER_ADAPTIVE
),
357 SDVO_CMD_NAME_ENTRY(SET_FLICKER_FILTER_ADAPTIVE
),
358 SDVO_CMD_NAME_ENTRY(GET_MAX_FLICKER_FILTER_2D
),
359 SDVO_CMD_NAME_ENTRY(GET_FLICKER_FILTER_2D
),
360 SDVO_CMD_NAME_ENTRY(SET_FLICKER_FILTER_2D
),
361 SDVO_CMD_NAME_ENTRY(GET_MAX_SHARPNESS
),
362 SDVO_CMD_NAME_ENTRY(GET_SHARPNESS
),
363 SDVO_CMD_NAME_ENTRY(SET_SHARPNESS
),
364 SDVO_CMD_NAME_ENTRY(GET_DOT_CRAWL
),
365 SDVO_CMD_NAME_ENTRY(SET_DOT_CRAWL
),
366 SDVO_CMD_NAME_ENTRY(GET_MAX_TV_CHROMA_FILTER
),
367 SDVO_CMD_NAME_ENTRY(GET_TV_CHROMA_FILTER
),
368 SDVO_CMD_NAME_ENTRY(SET_TV_CHROMA_FILTER
),
369 SDVO_CMD_NAME_ENTRY(GET_MAX_TV_LUMA_FILTER
),
370 SDVO_CMD_NAME_ENTRY(GET_TV_LUMA_FILTER
),
371 SDVO_CMD_NAME_ENTRY(SET_TV_LUMA_FILTER
),
374 SDVO_CMD_NAME_ENTRY(GET_SUPP_ENCODE
),
375 SDVO_CMD_NAME_ENTRY(GET_ENCODE
),
376 SDVO_CMD_NAME_ENTRY(SET_ENCODE
),
377 SDVO_CMD_NAME_ENTRY(SET_PIXEL_REPLI
),
378 SDVO_CMD_NAME_ENTRY(GET_PIXEL_REPLI
),
379 SDVO_CMD_NAME_ENTRY(GET_COLORIMETRY_CAP
),
380 SDVO_CMD_NAME_ENTRY(SET_COLORIMETRY
),
381 SDVO_CMD_NAME_ENTRY(GET_COLORIMETRY
),
382 SDVO_CMD_NAME_ENTRY(GET_AUDIO_ENCRYPT_PREFER
),
383 SDVO_CMD_NAME_ENTRY(SET_AUDIO_STAT
),
384 SDVO_CMD_NAME_ENTRY(GET_AUDIO_STAT
),
385 SDVO_CMD_NAME_ENTRY(GET_HBUF_INDEX
),
386 SDVO_CMD_NAME_ENTRY(SET_HBUF_INDEX
),
387 SDVO_CMD_NAME_ENTRY(GET_HBUF_INFO
),
388 SDVO_CMD_NAME_ENTRY(GET_HBUF_AV_SPLIT
),
389 SDVO_CMD_NAME_ENTRY(SET_HBUF_AV_SPLIT
),
390 SDVO_CMD_NAME_ENTRY(GET_HBUF_TXRATE
),
391 SDVO_CMD_NAME_ENTRY(SET_HBUF_TXRATE
),
392 SDVO_CMD_NAME_ENTRY(SET_HBUF_DATA
),
393 SDVO_CMD_NAME_ENTRY(GET_HBUF_DATA
),
396 #undef SDVO_CMD_NAME_ENTRY
398 static const char *sdvo_cmd_name(u8 cmd
)
402 for (i
= 0; i
< ARRAY_SIZE(sdvo_cmd_names
); i
++) {
403 if (cmd
== sdvo_cmd_names
[i
].cmd
)
404 return sdvo_cmd_names
[i
].name
;
410 #define SDVO_NAME(svdo) ((svdo)->base.port == PORT_B ? "SDVOB" : "SDVOC")
412 static void intel_sdvo_debug_write(struct intel_sdvo
*intel_sdvo
, u8 cmd
,
413 const void *args
, int args_len
)
415 struct drm_i915_private
*dev_priv
= to_i915(intel_sdvo
->base
.base
.dev
);
416 const char *cmd_name
;
420 #define BUF_PRINT(args...) \
421 pos += snprintf(buffer + pos, max_t(int, sizeof(buffer) - pos, 0), args)
423 for (i
= 0; i
< args_len
; i
++) {
424 BUF_PRINT("%02X ", ((u8
*)args
)[i
]);
430 cmd_name
= sdvo_cmd_name(cmd
);
432 BUF_PRINT("(%s)", cmd_name
);
434 BUF_PRINT("(%02X)", cmd
);
436 drm_WARN_ON(&dev_priv
->drm
, pos
>= sizeof(buffer
) - 1);
439 DRM_DEBUG_KMS("%s: W: %02X %s\n", SDVO_NAME(intel_sdvo
), cmd
, buffer
);
442 static const char * const cmd_status_names
[] = {
443 [SDVO_CMD_STATUS_POWER_ON
] = "Power on",
444 [SDVO_CMD_STATUS_SUCCESS
] = "Success",
445 [SDVO_CMD_STATUS_NOTSUPP
] = "Not supported",
446 [SDVO_CMD_STATUS_INVALID_ARG
] = "Invalid arg",
447 [SDVO_CMD_STATUS_PENDING
] = "Pending",
448 [SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED
] = "Target not specified",
449 [SDVO_CMD_STATUS_SCALING_NOT_SUPP
] = "Scaling not supported",
452 static const char *sdvo_cmd_status(u8 status
)
454 if (status
< ARRAY_SIZE(cmd_status_names
))
455 return cmd_status_names
[status
];
460 static bool __intel_sdvo_write_cmd(struct intel_sdvo
*intel_sdvo
, u8 cmd
,
461 const void *args
, int args_len
,
465 struct i2c_msg
*msgs
;
468 /* Would be simpler to allocate both in one go ? */
469 buf
= kzalloc(args_len
* 2 + 2, GFP_KERNEL
);
473 msgs
= kcalloc(args_len
+ 3, sizeof(*msgs
), GFP_KERNEL
);
479 intel_sdvo_debug_write(intel_sdvo
, cmd
, args
, args_len
);
481 for (i
= 0; i
< args_len
; i
++) {
482 msgs
[i
].addr
= intel_sdvo
->slave_addr
;
485 msgs
[i
].buf
= buf
+ 2 *i
;
486 buf
[2*i
+ 0] = SDVO_I2C_ARG_0
- i
;
487 buf
[2*i
+ 1] = ((u8
*)args
)[i
];
489 msgs
[i
].addr
= intel_sdvo
->slave_addr
;
492 msgs
[i
].buf
= buf
+ 2*i
;
493 buf
[2*i
+ 0] = SDVO_I2C_OPCODE
;
496 /* the following two are to read the response */
497 status
= SDVO_I2C_CMD_STATUS
;
498 msgs
[i
+1].addr
= intel_sdvo
->slave_addr
;
501 msgs
[i
+1].buf
= &status
;
503 msgs
[i
+2].addr
= intel_sdvo
->slave_addr
;
504 msgs
[i
+2].flags
= I2C_M_RD
;
506 msgs
[i
+2].buf
= &status
;
509 ret
= i2c_transfer(intel_sdvo
->i2c
, msgs
, i
+3);
511 ret
= __i2c_transfer(intel_sdvo
->i2c
, msgs
, i
+3);
513 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret
);
518 /* failure in I2C transfer */
519 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret
, i
+3);
529 static bool intel_sdvo_write_cmd(struct intel_sdvo
*intel_sdvo
, u8 cmd
,
530 const void *args
, int args_len
)
532 return __intel_sdvo_write_cmd(intel_sdvo
, cmd
, args
, args_len
, true);
535 static bool intel_sdvo_read_response(struct intel_sdvo
*intel_sdvo
,
536 void *response
, int response_len
)
538 struct drm_i915_private
*dev_priv
= to_i915(intel_sdvo
->base
.base
.dev
);
539 const char *cmd_status
;
540 u8 retry
= 15; /* 5 quick checks, followed by 10 long checks */
548 * The documentation states that all commands will be
549 * processed within 15µs, and that we need only poll
550 * the status byte a maximum of 3 times in order for the
551 * command to be complete.
553 * Check 5 times in case the hardware failed to read the docs.
555 * Also beware that the first response by many devices is to
556 * reply PENDING and stall for time. TVs are notorious for
557 * requiring longer than specified to complete their replies.
558 * Originally (in the DDX long ago), the delay was only ever 15ms
559 * with an additional delay of 30ms applied for TVs added later after
560 * many experiments. To accommodate both sets of delays, we do a
561 * sequence of slow checks if the device is falling behind and fails
562 * to reply within 5*15µs.
564 if (!intel_sdvo_read_byte(intel_sdvo
,
569 while ((status
== SDVO_CMD_STATUS_PENDING
||
570 status
== SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED
) && --retry
) {
576 if (!intel_sdvo_read_byte(intel_sdvo
,
582 #define BUF_PRINT(args...) \
583 pos += snprintf(buffer + pos, max_t(int, sizeof(buffer) - pos, 0), args)
585 cmd_status
= sdvo_cmd_status(status
);
587 BUF_PRINT("(%s)", cmd_status
);
589 BUF_PRINT("(??? %d)", status
);
591 if (status
!= SDVO_CMD_STATUS_SUCCESS
)
594 /* Read the command response */
595 for (i
= 0; i
< response_len
; i
++) {
596 if (!intel_sdvo_read_byte(intel_sdvo
,
597 SDVO_I2C_RETURN_0
+ i
,
598 &((u8
*)response
)[i
]))
600 BUF_PRINT(" %02X", ((u8
*)response
)[i
]);
603 drm_WARN_ON(&dev_priv
->drm
, pos
>= sizeof(buffer
) - 1);
606 DRM_DEBUG_KMS("%s: R: %s\n", SDVO_NAME(intel_sdvo
), buffer
);
610 DRM_DEBUG_KMS("%s: R: ... failed %s\n",
611 SDVO_NAME(intel_sdvo
), buffer
);
615 static int intel_sdvo_get_pixel_multiplier(const struct drm_display_mode
*adjusted_mode
)
617 if (adjusted_mode
->crtc_clock
>= 100000)
619 else if (adjusted_mode
->crtc_clock
>= 50000)
625 static bool __intel_sdvo_set_control_bus_switch(struct intel_sdvo
*intel_sdvo
,
628 /* This must be the immediately preceding write before the i2c xfer */
629 return __intel_sdvo_write_cmd(intel_sdvo
,
630 SDVO_CMD_SET_CONTROL_BUS_SWITCH
,
634 static bool intel_sdvo_set_value(struct intel_sdvo
*intel_sdvo
, u8 cmd
, const void *data
, int len
)
636 if (!intel_sdvo_write_cmd(intel_sdvo
, cmd
, data
, len
))
639 return intel_sdvo_read_response(intel_sdvo
, NULL
, 0);
643 intel_sdvo_get_value(struct intel_sdvo
*intel_sdvo
, u8 cmd
, void *value
, int len
)
645 if (!intel_sdvo_write_cmd(intel_sdvo
, cmd
, NULL
, 0))
648 return intel_sdvo_read_response(intel_sdvo
, value
, len
);
651 static bool intel_sdvo_set_target_input(struct intel_sdvo
*intel_sdvo
)
653 struct intel_sdvo_set_target_input_args targets
= {};
654 return intel_sdvo_set_value(intel_sdvo
,
655 SDVO_CMD_SET_TARGET_INPUT
,
656 &targets
, sizeof(targets
));
660 * Return whether each input is trained.
662 * This function is making an assumption about the layout of the response,
663 * which should be checked against the docs.
665 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo
*intel_sdvo
, bool *input_1
, bool *input_2
)
667 struct intel_sdvo_get_trained_inputs_response response
;
669 BUILD_BUG_ON(sizeof(response
) != 1);
670 if (!intel_sdvo_get_value(intel_sdvo
, SDVO_CMD_GET_TRAINED_INPUTS
,
671 &response
, sizeof(response
)))
674 *input_1
= response
.input0_trained
;
675 *input_2
= response
.input1_trained
;
679 static bool intel_sdvo_set_active_outputs(struct intel_sdvo
*intel_sdvo
,
682 return intel_sdvo_set_value(intel_sdvo
,
683 SDVO_CMD_SET_ACTIVE_OUTPUTS
,
684 &outputs
, sizeof(outputs
));
687 static bool intel_sdvo_get_active_outputs(struct intel_sdvo
*intel_sdvo
,
690 return intel_sdvo_get_value(intel_sdvo
,
691 SDVO_CMD_GET_ACTIVE_OUTPUTS
,
692 outputs
, sizeof(*outputs
));
695 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo
*intel_sdvo
,
698 u8 state
= SDVO_ENCODER_STATE_ON
;
701 case DRM_MODE_DPMS_ON
:
702 state
= SDVO_ENCODER_STATE_ON
;
704 case DRM_MODE_DPMS_STANDBY
:
705 state
= SDVO_ENCODER_STATE_STANDBY
;
707 case DRM_MODE_DPMS_SUSPEND
:
708 state
= SDVO_ENCODER_STATE_SUSPEND
;
710 case DRM_MODE_DPMS_OFF
:
711 state
= SDVO_ENCODER_STATE_OFF
;
715 return intel_sdvo_set_value(intel_sdvo
,
716 SDVO_CMD_SET_ENCODER_POWER_STATE
, &state
, sizeof(state
));
719 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo
*intel_sdvo
,
723 struct intel_sdvo_pixel_clock_range clocks
;
725 BUILD_BUG_ON(sizeof(clocks
) != 4);
726 if (!intel_sdvo_get_value(intel_sdvo
,
727 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE
,
728 &clocks
, sizeof(clocks
)))
731 /* Convert the values from units of 10 kHz to kHz. */
732 *clock_min
= clocks
.min
* 10;
733 *clock_max
= clocks
.max
* 10;
737 static bool intel_sdvo_set_target_output(struct intel_sdvo
*intel_sdvo
,
740 return intel_sdvo_set_value(intel_sdvo
,
741 SDVO_CMD_SET_TARGET_OUTPUT
,
742 &outputs
, sizeof(outputs
));
745 static bool intel_sdvo_set_timing(struct intel_sdvo
*intel_sdvo
, u8 cmd
,
746 struct intel_sdvo_dtd
*dtd
)
748 return intel_sdvo_set_value(intel_sdvo
, cmd
, &dtd
->part1
, sizeof(dtd
->part1
)) &&
749 intel_sdvo_set_value(intel_sdvo
, cmd
+ 1, &dtd
->part2
, sizeof(dtd
->part2
));
752 static bool intel_sdvo_get_timing(struct intel_sdvo
*intel_sdvo
, u8 cmd
,
753 struct intel_sdvo_dtd
*dtd
)
755 return intel_sdvo_get_value(intel_sdvo
, cmd
, &dtd
->part1
, sizeof(dtd
->part1
)) &&
756 intel_sdvo_get_value(intel_sdvo
, cmd
+ 1, &dtd
->part2
, sizeof(dtd
->part2
));
759 static bool intel_sdvo_set_input_timing(struct intel_sdvo
*intel_sdvo
,
760 struct intel_sdvo_dtd
*dtd
)
762 return intel_sdvo_set_timing(intel_sdvo
,
763 SDVO_CMD_SET_INPUT_TIMINGS_PART1
, dtd
);
766 static bool intel_sdvo_set_output_timing(struct intel_sdvo
*intel_sdvo
,
767 struct intel_sdvo_dtd
*dtd
)
769 return intel_sdvo_set_timing(intel_sdvo
,
770 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1
, dtd
);
773 static bool intel_sdvo_get_input_timing(struct intel_sdvo
*intel_sdvo
,
774 struct intel_sdvo_dtd
*dtd
)
776 return intel_sdvo_get_timing(intel_sdvo
,
777 SDVO_CMD_GET_INPUT_TIMINGS_PART1
, dtd
);
781 intel_sdvo_create_preferred_input_timing(struct intel_sdvo
*intel_sdvo
,
782 struct intel_sdvo_connector
*intel_sdvo_connector
,
783 const struct drm_display_mode
*mode
)
785 struct intel_sdvo_preferred_input_timing_args args
;
787 memset(&args
, 0, sizeof(args
));
788 args
.clock
= mode
->clock
/ 10;
789 args
.width
= mode
->hdisplay
;
790 args
.height
= mode
->vdisplay
;
793 if (IS_LVDS(intel_sdvo_connector
)) {
794 const struct drm_display_mode
*fixed_mode
=
795 intel_panel_fixed_mode(&intel_sdvo_connector
->base
, mode
);
797 if (fixed_mode
->hdisplay
!= args
.width
||
798 fixed_mode
->vdisplay
!= args
.height
)
802 return intel_sdvo_set_value(intel_sdvo
,
803 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING
,
804 &args
, sizeof(args
));
807 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo
*intel_sdvo
,
808 struct intel_sdvo_dtd
*dtd
)
810 BUILD_BUG_ON(sizeof(dtd
->part1
) != 8);
811 BUILD_BUG_ON(sizeof(dtd
->part2
) != 8);
812 return intel_sdvo_get_value(intel_sdvo
, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1
,
813 &dtd
->part1
, sizeof(dtd
->part1
)) &&
814 intel_sdvo_get_value(intel_sdvo
, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2
,
815 &dtd
->part2
, sizeof(dtd
->part2
));
818 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo
*intel_sdvo
, u8 val
)
820 return intel_sdvo_set_value(intel_sdvo
, SDVO_CMD_SET_CLOCK_RATE_MULT
, &val
, 1);
823 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd
*dtd
,
824 const struct drm_display_mode
*mode
)
827 u16 h_blank_len
, h_sync_len
, v_blank_len
, v_sync_len
;
828 u16 h_sync_offset
, v_sync_offset
;
831 memset(dtd
, 0, sizeof(*dtd
));
833 width
= mode
->hdisplay
;
834 height
= mode
->vdisplay
;
836 /* do some mode translations */
837 h_blank_len
= mode
->htotal
- mode
->hdisplay
;
838 h_sync_len
= mode
->hsync_end
- mode
->hsync_start
;
840 v_blank_len
= mode
->vtotal
- mode
->vdisplay
;
841 v_sync_len
= mode
->vsync_end
- mode
->vsync_start
;
843 h_sync_offset
= mode
->hsync_start
- mode
->hdisplay
;
844 v_sync_offset
= mode
->vsync_start
- mode
->vdisplay
;
846 mode_clock
= mode
->clock
;
848 dtd
->part1
.clock
= mode_clock
;
850 dtd
->part1
.h_active
= width
& 0xff;
851 dtd
->part1
.h_blank
= h_blank_len
& 0xff;
852 dtd
->part1
.h_high
= (((width
>> 8) & 0xf) << 4) |
853 ((h_blank_len
>> 8) & 0xf);
854 dtd
->part1
.v_active
= height
& 0xff;
855 dtd
->part1
.v_blank
= v_blank_len
& 0xff;
856 dtd
->part1
.v_high
= (((height
>> 8) & 0xf) << 4) |
857 ((v_blank_len
>> 8) & 0xf);
859 dtd
->part2
.h_sync_off
= h_sync_offset
& 0xff;
860 dtd
->part2
.h_sync_width
= h_sync_len
& 0xff;
861 dtd
->part2
.v_sync_off_width
= (v_sync_offset
& 0xf) << 4 |
863 dtd
->part2
.sync_off_width_high
= ((h_sync_offset
& 0x300) >> 2) |
864 ((h_sync_len
& 0x300) >> 4) | ((v_sync_offset
& 0x30) >> 2) |
865 ((v_sync_len
& 0x30) >> 4);
867 dtd
->part2
.dtd_flags
= 0x18;
868 if (mode
->flags
& DRM_MODE_FLAG_INTERLACE
)
869 dtd
->part2
.dtd_flags
|= DTD_FLAG_INTERLACE
;
870 if (mode
->flags
& DRM_MODE_FLAG_PHSYNC
)
871 dtd
->part2
.dtd_flags
|= DTD_FLAG_HSYNC_POSITIVE
;
872 if (mode
->flags
& DRM_MODE_FLAG_PVSYNC
)
873 dtd
->part2
.dtd_flags
|= DTD_FLAG_VSYNC_POSITIVE
;
875 dtd
->part2
.v_sync_off_high
= v_sync_offset
& 0xc0;
878 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode
*pmode
,
879 const struct intel_sdvo_dtd
*dtd
)
881 struct drm_display_mode mode
= {};
883 mode
.hdisplay
= dtd
->part1
.h_active
;
884 mode
.hdisplay
+= ((dtd
->part1
.h_high
>> 4) & 0x0f) << 8;
885 mode
.hsync_start
= mode
.hdisplay
+ dtd
->part2
.h_sync_off
;
886 mode
.hsync_start
+= (dtd
->part2
.sync_off_width_high
& 0xc0) << 2;
887 mode
.hsync_end
= mode
.hsync_start
+ dtd
->part2
.h_sync_width
;
888 mode
.hsync_end
+= (dtd
->part2
.sync_off_width_high
& 0x30) << 4;
889 mode
.htotal
= mode
.hdisplay
+ dtd
->part1
.h_blank
;
890 mode
.htotal
+= (dtd
->part1
.h_high
& 0xf) << 8;
892 mode
.vdisplay
= dtd
->part1
.v_active
;
893 mode
.vdisplay
+= ((dtd
->part1
.v_high
>> 4) & 0x0f) << 8;
894 mode
.vsync_start
= mode
.vdisplay
;
895 mode
.vsync_start
+= (dtd
->part2
.v_sync_off_width
>> 4) & 0xf;
896 mode
.vsync_start
+= (dtd
->part2
.sync_off_width_high
& 0x0c) << 2;
897 mode
.vsync_start
+= dtd
->part2
.v_sync_off_high
& 0xc0;
898 mode
.vsync_end
= mode
.vsync_start
+
899 (dtd
->part2
.v_sync_off_width
& 0xf);
900 mode
.vsync_end
+= (dtd
->part2
.sync_off_width_high
& 0x3) << 4;
901 mode
.vtotal
= mode
.vdisplay
+ dtd
->part1
.v_blank
;
902 mode
.vtotal
+= (dtd
->part1
.v_high
& 0xf) << 8;
904 mode
.clock
= dtd
->part1
.clock
* 10;
906 if (dtd
->part2
.dtd_flags
& DTD_FLAG_INTERLACE
)
907 mode
.flags
|= DRM_MODE_FLAG_INTERLACE
;
908 if (dtd
->part2
.dtd_flags
& DTD_FLAG_HSYNC_POSITIVE
)
909 mode
.flags
|= DRM_MODE_FLAG_PHSYNC
;
911 mode
.flags
|= DRM_MODE_FLAG_NHSYNC
;
912 if (dtd
->part2
.dtd_flags
& DTD_FLAG_VSYNC_POSITIVE
)
913 mode
.flags
|= DRM_MODE_FLAG_PVSYNC
;
915 mode
.flags
|= DRM_MODE_FLAG_NVSYNC
;
917 drm_mode_set_crtcinfo(&mode
, 0);
919 drm_mode_copy(pmode
, &mode
);
922 static bool intel_sdvo_check_supp_encode(struct intel_sdvo
*intel_sdvo
)
924 struct intel_sdvo_encode encode
;
926 BUILD_BUG_ON(sizeof(encode
) != 2);
927 return intel_sdvo_get_value(intel_sdvo
,
928 SDVO_CMD_GET_SUPP_ENCODE
,
929 &encode
, sizeof(encode
));
932 static bool intel_sdvo_set_encode(struct intel_sdvo
*intel_sdvo
,
935 return intel_sdvo_set_value(intel_sdvo
, SDVO_CMD_SET_ENCODE
, &mode
, 1);
938 static bool intel_sdvo_set_colorimetry(struct intel_sdvo
*intel_sdvo
,
941 return intel_sdvo_set_value(intel_sdvo
, SDVO_CMD_SET_COLORIMETRY
, &mode
, 1);
944 static bool intel_sdvo_set_pixel_replication(struct intel_sdvo
*intel_sdvo
,
947 return intel_sdvo_set_value(intel_sdvo
, SDVO_CMD_SET_PIXEL_REPLI
,
951 static bool intel_sdvo_set_audio_state(struct intel_sdvo
*intel_sdvo
,
954 return intel_sdvo_set_value(intel_sdvo
, SDVO_CMD_SET_AUDIO_STAT
,
958 static bool intel_sdvo_get_hbuf_size(struct intel_sdvo
*intel_sdvo
,
961 if (!intel_sdvo_get_value(intel_sdvo
, SDVO_CMD_GET_HBUF_INFO
,
965 /* Buffer size is 0 based, hooray! However zero means zero. */
973 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo
*intel_sdvo
)
982 intel_sdvo_get_value(encoder
, SDVO_CMD_GET_HBUF_AV_SPLIT
, &av_split
, 1);
984 for (i
= 0; i
<= av_split
; i
++) {
985 set_buf_index
[0] = i
; set_buf_index
[1] = 0;
986 intel_sdvo_write_cmd(encoder
, SDVO_CMD_SET_HBUF_INDEX
,
988 intel_sdvo_write_cmd(encoder
, SDVO_CMD_GET_HBUF_INFO
, NULL
, 0);
989 intel_sdvo_read_response(encoder
, &buf_size
, 1);
992 for (j
= 0; j
<= buf_size
; j
+= 8) {
993 intel_sdvo_write_cmd(encoder
, SDVO_CMD_GET_HBUF_DATA
,
995 intel_sdvo_read_response(encoder
, pos
, 8);
1002 static bool intel_sdvo_write_infoframe(struct intel_sdvo
*intel_sdvo
,
1003 unsigned int if_index
, u8 tx_rate
,
1004 const u8
*data
, unsigned int length
)
1006 u8 set_buf_index
[2] = { if_index
, 0 };
1007 u8 hbuf_size
, tmp
[8];
1010 if (!intel_sdvo_set_value(intel_sdvo
,
1011 SDVO_CMD_SET_HBUF_INDEX
,
1015 if (!intel_sdvo_get_hbuf_size(intel_sdvo
, &hbuf_size
))
1018 DRM_DEBUG_KMS("writing sdvo hbuf: %i, length %u, hbuf_size: %i\n",
1019 if_index
, length
, hbuf_size
);
1021 if (hbuf_size
< length
)
1024 for (i
= 0; i
< hbuf_size
; i
+= 8) {
1027 memcpy(tmp
, data
+ i
, min_t(unsigned, 8, length
- i
));
1029 if (!intel_sdvo_set_value(intel_sdvo
,
1030 SDVO_CMD_SET_HBUF_DATA
,
1035 return intel_sdvo_set_value(intel_sdvo
,
1036 SDVO_CMD_SET_HBUF_TXRATE
,
1040 static ssize_t
intel_sdvo_read_infoframe(struct intel_sdvo
*intel_sdvo
,
1041 unsigned int if_index
,
1042 u8
*data
, unsigned int length
)
1044 u8 set_buf_index
[2] = { if_index
, 0 };
1045 u8 hbuf_size
, tx_rate
, av_split
;
1048 if (!intel_sdvo_get_value(intel_sdvo
,
1049 SDVO_CMD_GET_HBUF_AV_SPLIT
,
1053 if (av_split
< if_index
)
1056 if (!intel_sdvo_set_value(intel_sdvo
,
1057 SDVO_CMD_SET_HBUF_INDEX
,
1061 if (!intel_sdvo_get_value(intel_sdvo
,
1062 SDVO_CMD_GET_HBUF_TXRATE
,
1066 /* TX_DISABLED doesn't mean disabled for ELD */
1067 if (if_index
!= SDVO_HBUF_INDEX_ELD
&& tx_rate
== SDVO_HBUF_TX_DISABLED
)
1070 if (!intel_sdvo_get_hbuf_size(intel_sdvo
, &hbuf_size
))
1073 DRM_DEBUG_KMS("reading sdvo hbuf: %i, length %u, hbuf_size: %i\n",
1074 if_index
, length
, hbuf_size
);
1076 hbuf_size
= min_t(unsigned int, length
, hbuf_size
);
1078 for (i
= 0; i
< hbuf_size
; i
+= 8) {
1079 if (!intel_sdvo_write_cmd(intel_sdvo
, SDVO_CMD_GET_HBUF_DATA
, NULL
, 0))
1081 if (!intel_sdvo_read_response(intel_sdvo
, &data
[i
],
1082 min_t(unsigned int, 8, hbuf_size
- i
)))
1089 static bool intel_sdvo_compute_avi_infoframe(struct intel_sdvo
*intel_sdvo
,
1090 struct intel_crtc_state
*crtc_state
,
1091 struct drm_connector_state
*conn_state
)
1093 struct drm_i915_private
*dev_priv
= to_i915(intel_sdvo
->base
.base
.dev
);
1094 struct hdmi_avi_infoframe
*frame
= &crtc_state
->infoframes
.avi
.avi
;
1095 const struct drm_display_mode
*adjusted_mode
=
1096 &crtc_state
->hw
.adjusted_mode
;
1099 if (!crtc_state
->has_hdmi_sink
)
1102 crtc_state
->infoframes
.enable
|=
1103 intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI
);
1105 ret
= drm_hdmi_avi_infoframe_from_display_mode(frame
,
1106 conn_state
->connector
,
1111 drm_hdmi_avi_infoframe_quant_range(frame
,
1112 conn_state
->connector
,
1114 crtc_state
->limited_color_range
?
1115 HDMI_QUANTIZATION_RANGE_LIMITED
:
1116 HDMI_QUANTIZATION_RANGE_FULL
);
1118 ret
= hdmi_avi_infoframe_check(frame
);
1119 if (drm_WARN_ON(&dev_priv
->drm
, ret
))
1125 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo
*intel_sdvo
,
1126 const struct intel_crtc_state
*crtc_state
)
1128 struct drm_i915_private
*dev_priv
= to_i915(intel_sdvo
->base
.base
.dev
);
1129 u8 sdvo_data
[HDMI_INFOFRAME_SIZE(AVI
)];
1130 const union hdmi_infoframe
*frame
= &crtc_state
->infoframes
.avi
;
1133 if ((crtc_state
->infoframes
.enable
&
1134 intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI
)) == 0)
1137 if (drm_WARN_ON(&dev_priv
->drm
,
1138 frame
->any
.type
!= HDMI_INFOFRAME_TYPE_AVI
))
1141 len
= hdmi_infoframe_pack_only(frame
, sdvo_data
, sizeof(sdvo_data
));
1142 if (drm_WARN_ON(&dev_priv
->drm
, len
< 0))
1145 return intel_sdvo_write_infoframe(intel_sdvo
, SDVO_HBUF_INDEX_AVI_IF
,
1150 static void intel_sdvo_get_avi_infoframe(struct intel_sdvo
*intel_sdvo
,
1151 struct intel_crtc_state
*crtc_state
)
1153 u8 sdvo_data
[HDMI_INFOFRAME_SIZE(AVI
)];
1154 union hdmi_infoframe
*frame
= &crtc_state
->infoframes
.avi
;
1158 if (!crtc_state
->has_hdmi_sink
)
1161 len
= intel_sdvo_read_infoframe(intel_sdvo
, SDVO_HBUF_INDEX_AVI_IF
,
1162 sdvo_data
, sizeof(sdvo_data
));
1164 DRM_DEBUG_KMS("failed to read AVI infoframe\n");
1166 } else if (len
== 0) {
1170 crtc_state
->infoframes
.enable
|=
1171 intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI
);
1173 ret
= hdmi_infoframe_unpack(frame
, sdvo_data
, len
);
1175 DRM_DEBUG_KMS("Failed to unpack AVI infoframe\n");
1179 if (frame
->any
.type
!= HDMI_INFOFRAME_TYPE_AVI
)
1180 DRM_DEBUG_KMS("Found the wrong infoframe type 0x%x (expected 0x%02x)\n",
1181 frame
->any
.type
, HDMI_INFOFRAME_TYPE_AVI
);
1184 static void intel_sdvo_get_eld(struct intel_sdvo
*intel_sdvo
,
1185 struct intel_crtc_state
*crtc_state
)
1187 struct drm_i915_private
*i915
= to_i915(intel_sdvo
->base
.base
.dev
);
1191 if (!crtc_state
->has_audio
)
1194 if (!intel_sdvo_get_value(intel_sdvo
, SDVO_CMD_GET_AUDIO_STAT
, &val
, 1))
1197 if ((val
& SDVO_AUDIO_ELD_VALID
) == 0)
1200 len
= intel_sdvo_read_infoframe(intel_sdvo
, SDVO_HBUF_INDEX_ELD
,
1201 crtc_state
->eld
, sizeof(crtc_state
->eld
));
1203 drm_dbg_kms(&i915
->drm
, "failed to read ELD\n");
1206 static bool intel_sdvo_set_tv_format(struct intel_sdvo
*intel_sdvo
,
1207 const struct drm_connector_state
*conn_state
)
1209 struct intel_sdvo_tv_format format
;
1212 format_map
= 1 << conn_state
->tv
.legacy_mode
;
1213 memset(&format
, 0, sizeof(format
));
1214 memcpy(&format
, &format_map
, min(sizeof(format
), sizeof(format_map
)));
1216 BUILD_BUG_ON(sizeof(format
) != 6);
1217 return intel_sdvo_set_value(intel_sdvo
,
1218 SDVO_CMD_SET_TV_FORMAT
,
1219 &format
, sizeof(format
));
1223 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo
*intel_sdvo
,
1224 struct intel_sdvo_connector
*intel_sdvo_connector
,
1225 const struct drm_display_mode
*mode
)
1227 struct intel_sdvo_dtd output_dtd
;
1229 if (!intel_sdvo_set_target_output(intel_sdvo
,
1230 intel_sdvo_connector
->output_flag
))
1233 intel_sdvo_get_dtd_from_mode(&output_dtd
, mode
);
1234 if (!intel_sdvo_set_output_timing(intel_sdvo
, &output_dtd
))
1241 * Asks the sdvo controller for the preferred input mode given the output mode.
1242 * Unfortunately we have to set up the full output mode to do that.
1245 intel_sdvo_get_preferred_input_mode(struct intel_sdvo
*intel_sdvo
,
1246 struct intel_sdvo_connector
*intel_sdvo_connector
,
1247 const struct drm_display_mode
*mode
,
1248 struct drm_display_mode
*adjusted_mode
)
1250 struct intel_sdvo_dtd input_dtd
;
1252 /* Reset the input timing to the screen. Assume always input 0. */
1253 if (!intel_sdvo_set_target_input(intel_sdvo
))
1256 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo
,
1257 intel_sdvo_connector
,
1261 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo
,
1265 intel_sdvo_get_mode_from_dtd(adjusted_mode
, &input_dtd
);
1266 intel_sdvo
->dtd_sdvo_flags
= input_dtd
.part2
.sdvo_flags
;
1271 static int i9xx_adjust_sdvo_tv_clock(struct intel_crtc_state
*pipe_config
)
1273 struct drm_i915_private
*dev_priv
= to_i915(pipe_config
->uapi
.crtc
->dev
);
1274 unsigned int dotclock
= pipe_config
->hw
.adjusted_mode
.crtc_clock
;
1275 struct dpll
*clock
= &pipe_config
->dpll
;
1278 * SDVO TV has fixed PLL values depend on its clock range,
1279 * this mirrors vbios setting.
1281 if (dotclock
>= 100000 && dotclock
< 140500) {
1287 } else if (dotclock
>= 140500 && dotclock
<= 200000) {
1294 drm_dbg_kms(&dev_priv
->drm
,
1295 "SDVO TV clock out of range: %i\n", dotclock
);
1299 pipe_config
->clock_set
= true;
1304 static bool intel_has_hdmi_sink(struct intel_sdvo_connector
*intel_sdvo_connector
,
1305 const struct drm_connector_state
*conn_state
)
1307 struct drm_connector
*connector
= conn_state
->connector
;
1309 return intel_sdvo_connector
->is_hdmi
&&
1310 connector
->display_info
.is_hdmi
&&
1311 READ_ONCE(to_intel_digital_connector_state(conn_state
)->force_audio
) != HDMI_AUDIO_OFF_DVI
;
1314 static bool intel_sdvo_limited_color_range(struct intel_encoder
*encoder
,
1315 const struct intel_crtc_state
*crtc_state
,
1316 const struct drm_connector_state
*conn_state
)
1318 struct intel_sdvo
*intel_sdvo
= to_sdvo(encoder
);
1320 if ((intel_sdvo
->colorimetry_cap
& SDVO_COLORIMETRY_RGB220
) == 0)
1323 return intel_hdmi_limited_color_range(crtc_state
, conn_state
);
1326 static bool intel_sdvo_has_audio(struct intel_encoder
*encoder
,
1327 const struct intel_crtc_state
*crtc_state
,
1328 const struct drm_connector_state
*conn_state
)
1330 struct drm_connector
*connector
= conn_state
->connector
;
1331 struct intel_sdvo_connector
*intel_sdvo_connector
=
1332 to_intel_sdvo_connector(connector
);
1333 const struct intel_digital_connector_state
*intel_conn_state
=
1334 to_intel_digital_connector_state(conn_state
);
1336 if (!crtc_state
->has_hdmi_sink
)
1339 if (intel_conn_state
->force_audio
== HDMI_AUDIO_AUTO
)
1340 return intel_sdvo_connector
->is_hdmi
&&
1341 connector
->display_info
.has_audio
;
1343 return intel_conn_state
->force_audio
== HDMI_AUDIO_ON
;
1346 static int intel_sdvo_compute_config(struct intel_encoder
*encoder
,
1347 struct intel_crtc_state
*pipe_config
,
1348 struct drm_connector_state
*conn_state
)
1350 struct intel_sdvo
*intel_sdvo
= to_sdvo(encoder
);
1351 struct intel_sdvo_connector
*intel_sdvo_connector
=
1352 to_intel_sdvo_connector(conn_state
->connector
);
1353 struct drm_display_mode
*adjusted_mode
= &pipe_config
->hw
.adjusted_mode
;
1354 struct drm_display_mode
*mode
= &pipe_config
->hw
.mode
;
1356 if (HAS_PCH_SPLIT(to_i915(encoder
->base
.dev
))) {
1357 pipe_config
->has_pch_encoder
= true;
1358 if (!intel_fdi_compute_pipe_bpp(pipe_config
))
1362 DRM_DEBUG_KMS("forcing bpc to 8 for SDVO\n");
1363 /* FIXME: Don't increase pipe_bpp */
1364 pipe_config
->pipe_bpp
= 8*3;
1365 pipe_config
->sink_format
= INTEL_OUTPUT_FORMAT_RGB
;
1366 pipe_config
->output_format
= INTEL_OUTPUT_FORMAT_RGB
;
1369 * We need to construct preferred input timings based on our
1370 * output timings. To do that, we have to set the output
1371 * timings, even though this isn't really the right place in
1372 * the sequence to do it. Oh well.
1374 if (IS_TV(intel_sdvo_connector
)) {
1375 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo
,
1376 intel_sdvo_connector
,
1380 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo
,
1381 intel_sdvo_connector
,
1384 pipe_config
->sdvo_tv_clock
= true;
1385 } else if (IS_LVDS(intel_sdvo_connector
)) {
1386 const struct drm_display_mode
*fixed_mode
=
1387 intel_panel_fixed_mode(&intel_sdvo_connector
->base
, mode
);
1390 ret
= intel_panel_compute_config(&intel_sdvo_connector
->base
,
1395 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo
,
1396 intel_sdvo_connector
,
1400 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo
,
1401 intel_sdvo_connector
,
1406 if (adjusted_mode
->flags
& DRM_MODE_FLAG_DBLSCAN
)
1410 * Make the CRTC code factor in the SDVO pixel multiplier. The
1411 * SDVO device will factor out the multiplier during mode_set.
1413 pipe_config
->pixel_multiplier
=
1414 intel_sdvo_get_pixel_multiplier(adjusted_mode
);
1416 pipe_config
->has_hdmi_sink
= intel_has_hdmi_sink(intel_sdvo_connector
, conn_state
);
1418 pipe_config
->has_audio
=
1419 intel_sdvo_has_audio(encoder
, pipe_config
, conn_state
) &&
1420 intel_audio_compute_config(encoder
, pipe_config
, conn_state
);
1422 pipe_config
->limited_color_range
=
1423 intel_sdvo_limited_color_range(encoder
, pipe_config
,
1426 /* Clock computation needs to happen after pixel multiplier. */
1427 if (IS_TV(intel_sdvo_connector
)) {
1430 ret
= i9xx_adjust_sdvo_tv_clock(pipe_config
);
1435 if (conn_state
->picture_aspect_ratio
)
1436 adjusted_mode
->picture_aspect_ratio
=
1437 conn_state
->picture_aspect_ratio
;
1439 if (!intel_sdvo_compute_avi_infoframe(intel_sdvo
,
1440 pipe_config
, conn_state
)) {
1441 DRM_DEBUG_KMS("bad AVI infoframe\n");
1448 #define UPDATE_PROPERTY(input, NAME) \
1451 intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_##NAME, &val, sizeof(val)); \
1454 static void intel_sdvo_update_props(struct intel_sdvo
*intel_sdvo
,
1455 const struct intel_sdvo_connector_state
*sdvo_state
)
1457 const struct drm_connector_state
*conn_state
= &sdvo_state
->base
.base
;
1458 struct intel_sdvo_connector
*intel_sdvo_conn
=
1459 to_intel_sdvo_connector(conn_state
->connector
);
1462 if (intel_sdvo_conn
->left
)
1463 UPDATE_PROPERTY(sdvo_state
->tv
.overscan_h
, OVERSCAN_H
);
1465 if (intel_sdvo_conn
->top
)
1466 UPDATE_PROPERTY(sdvo_state
->tv
.overscan_v
, OVERSCAN_V
);
1468 if (intel_sdvo_conn
->hpos
)
1469 UPDATE_PROPERTY(sdvo_state
->tv
.hpos
, HPOS
);
1471 if (intel_sdvo_conn
->vpos
)
1472 UPDATE_PROPERTY(sdvo_state
->tv
.vpos
, VPOS
);
1474 if (intel_sdvo_conn
->saturation
)
1475 UPDATE_PROPERTY(conn_state
->tv
.saturation
, SATURATION
);
1477 if (intel_sdvo_conn
->contrast
)
1478 UPDATE_PROPERTY(conn_state
->tv
.contrast
, CONTRAST
);
1480 if (intel_sdvo_conn
->hue
)
1481 UPDATE_PROPERTY(conn_state
->tv
.hue
, HUE
);
1483 if (intel_sdvo_conn
->brightness
)
1484 UPDATE_PROPERTY(conn_state
->tv
.brightness
, BRIGHTNESS
);
1486 if (intel_sdvo_conn
->sharpness
)
1487 UPDATE_PROPERTY(sdvo_state
->tv
.sharpness
, SHARPNESS
);
1489 if (intel_sdvo_conn
->flicker_filter
)
1490 UPDATE_PROPERTY(sdvo_state
->tv
.flicker_filter
, FLICKER_FILTER
);
1492 if (intel_sdvo_conn
->flicker_filter_2d
)
1493 UPDATE_PROPERTY(sdvo_state
->tv
.flicker_filter_2d
, FLICKER_FILTER_2D
);
1495 if (intel_sdvo_conn
->flicker_filter_adaptive
)
1496 UPDATE_PROPERTY(sdvo_state
->tv
.flicker_filter_adaptive
, FLICKER_FILTER_ADAPTIVE
);
1498 if (intel_sdvo_conn
->tv_chroma_filter
)
1499 UPDATE_PROPERTY(sdvo_state
->tv
.chroma_filter
, TV_CHROMA_FILTER
);
1501 if (intel_sdvo_conn
->tv_luma_filter
)
1502 UPDATE_PROPERTY(sdvo_state
->tv
.luma_filter
, TV_LUMA_FILTER
);
1504 if (intel_sdvo_conn
->dot_crawl
)
1505 UPDATE_PROPERTY(sdvo_state
->tv
.dot_crawl
, DOT_CRAWL
);
1507 #undef UPDATE_PROPERTY
1510 static void intel_sdvo_pre_enable(struct intel_atomic_state
*state
,
1511 struct intel_encoder
*intel_encoder
,
1512 const struct intel_crtc_state
*crtc_state
,
1513 const struct drm_connector_state
*conn_state
)
1515 struct drm_i915_private
*dev_priv
= to_i915(intel_encoder
->base
.dev
);
1516 struct intel_crtc
*crtc
= to_intel_crtc(crtc_state
->uapi
.crtc
);
1517 const struct drm_display_mode
*adjusted_mode
= &crtc_state
->hw
.adjusted_mode
;
1518 const struct intel_sdvo_connector_state
*sdvo_state
=
1519 to_intel_sdvo_connector_state(conn_state
);
1520 struct intel_sdvo_connector
*intel_sdvo_connector
=
1521 to_intel_sdvo_connector(conn_state
->connector
);
1522 const struct drm_display_mode
*mode
= &crtc_state
->hw
.mode
;
1523 struct intel_sdvo
*intel_sdvo
= to_sdvo(intel_encoder
);
1525 struct intel_sdvo_in_out_map in_out
;
1526 struct intel_sdvo_dtd input_dtd
, output_dtd
;
1529 intel_sdvo_update_props(intel_sdvo
, sdvo_state
);
1532 * First, set the input mapping for the first input to our controlled
1533 * output. This is only correct if we're a single-input device, in
1534 * which case the first input is the output from the appropriate SDVO
1535 * channel on the motherboard. In a two-input device, the first input
1536 * will be SDVOB and the second SDVOC.
1538 in_out
.in0
= intel_sdvo_connector
->output_flag
;
1541 intel_sdvo_set_value(intel_sdvo
,
1542 SDVO_CMD_SET_IN_OUT_MAP
,
1543 &in_out
, sizeof(in_out
));
1545 /* Set the output timings to the screen */
1546 if (!intel_sdvo_set_target_output(intel_sdvo
,
1547 intel_sdvo_connector
->output_flag
))
1550 /* lvds has a special fixed output timing. */
1551 if (IS_LVDS(intel_sdvo_connector
)) {
1552 const struct drm_display_mode
*fixed_mode
=
1553 intel_panel_fixed_mode(&intel_sdvo_connector
->base
, mode
);
1555 intel_sdvo_get_dtd_from_mode(&output_dtd
, fixed_mode
);
1557 intel_sdvo_get_dtd_from_mode(&output_dtd
, mode
);
1559 if (!intel_sdvo_set_output_timing(intel_sdvo
, &output_dtd
))
1560 drm_info(&dev_priv
->drm
,
1561 "Setting output timings on %s failed\n",
1562 SDVO_NAME(intel_sdvo
));
1564 /* Set the input timing to the screen. Assume always input 0. */
1565 if (!intel_sdvo_set_target_input(intel_sdvo
))
1568 if (crtc_state
->has_hdmi_sink
) {
1569 intel_sdvo_set_encode(intel_sdvo
, SDVO_ENCODE_HDMI
);
1570 intel_sdvo_set_colorimetry(intel_sdvo
,
1571 crtc_state
->limited_color_range
?
1572 SDVO_COLORIMETRY_RGB220
:
1573 SDVO_COLORIMETRY_RGB256
);
1574 intel_sdvo_set_avi_infoframe(intel_sdvo
, crtc_state
);
1575 intel_sdvo_set_pixel_replication(intel_sdvo
,
1576 !!(adjusted_mode
->flags
&
1577 DRM_MODE_FLAG_DBLCLK
));
1579 intel_sdvo_set_encode(intel_sdvo
, SDVO_ENCODE_DVI
);
1581 if (IS_TV(intel_sdvo_connector
) &&
1582 !intel_sdvo_set_tv_format(intel_sdvo
, conn_state
))
1585 intel_sdvo_get_dtd_from_mode(&input_dtd
, adjusted_mode
);
1587 if (IS_TV(intel_sdvo_connector
) || IS_LVDS(intel_sdvo_connector
))
1588 input_dtd
.part2
.sdvo_flags
= intel_sdvo
->dtd_sdvo_flags
;
1589 if (!intel_sdvo_set_input_timing(intel_sdvo
, &input_dtd
))
1590 drm_info(&dev_priv
->drm
,
1591 "Setting input timings on %s failed\n",
1592 SDVO_NAME(intel_sdvo
));
1594 switch (crtc_state
->pixel_multiplier
) {
1596 drm_WARN(&dev_priv
->drm
, 1,
1597 "unknown pixel multiplier specified\n");
1599 case 1: rate
= SDVO_CLOCK_RATE_MULT_1X
; break;
1600 case 2: rate
= SDVO_CLOCK_RATE_MULT_2X
; break;
1601 case 4: rate
= SDVO_CLOCK_RATE_MULT_4X
; break;
1603 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo
, rate
))
1606 /* Set the SDVO control regs. */
1607 if (DISPLAY_VER(dev_priv
) >= 4) {
1608 /* The real mode polarity is set by the SDVO commands, using
1609 * struct intel_sdvo_dtd. */
1610 sdvox
= SDVO_VSYNC_ACTIVE_HIGH
| SDVO_HSYNC_ACTIVE_HIGH
;
1611 if (DISPLAY_VER(dev_priv
) < 5)
1612 sdvox
|= SDVO_BORDER_ENABLE
;
1614 sdvox
= intel_de_read(dev_priv
, intel_sdvo
->sdvo_reg
);
1615 if (intel_sdvo
->base
.port
== PORT_B
)
1616 sdvox
&= SDVOB_PRESERVE_MASK
;
1618 sdvox
&= SDVOC_PRESERVE_MASK
;
1619 sdvox
|= (9 << 19) | SDVO_BORDER_ENABLE
;
1622 if (HAS_PCH_CPT(dev_priv
))
1623 sdvox
|= SDVO_PIPE_SEL_CPT(crtc
->pipe
);
1625 sdvox
|= SDVO_PIPE_SEL(crtc
->pipe
);
1627 if (DISPLAY_VER(dev_priv
) >= 4) {
1628 /* done in crtc_mode_set as the dpll_md reg must be written early */
1629 } else if (IS_I945G(dev_priv
) || IS_I945GM(dev_priv
) ||
1630 IS_G33(dev_priv
) || IS_PINEVIEW(dev_priv
)) {
1631 /* done in crtc_mode_set as it lives inside the dpll register */
1633 sdvox
|= (crtc_state
->pixel_multiplier
- 1)
1634 << SDVO_PORT_MULTIPLY_SHIFT
;
1637 if (input_dtd
.part2
.sdvo_flags
& SDVO_NEED_TO_STALL
&&
1638 DISPLAY_VER(dev_priv
) < 5)
1639 sdvox
|= SDVO_STALL_SELECT
;
1640 intel_sdvo_write_sdvox(intel_sdvo
, sdvox
);
1643 static bool intel_sdvo_connector_get_hw_state(struct intel_connector
*connector
)
1645 struct intel_sdvo_connector
*intel_sdvo_connector
=
1646 to_intel_sdvo_connector(&connector
->base
);
1647 struct intel_sdvo
*intel_sdvo
= intel_attached_sdvo(connector
);
1648 u16 active_outputs
= 0;
1650 intel_sdvo_get_active_outputs(intel_sdvo
, &active_outputs
);
1652 return active_outputs
& intel_sdvo_connector
->output_flag
;
1655 bool intel_sdvo_port_enabled(struct drm_i915_private
*dev_priv
,
1656 i915_reg_t sdvo_reg
, enum pipe
*pipe
)
1660 val
= intel_de_read(dev_priv
, sdvo_reg
);
1662 /* asserts want to know the pipe even if the port is disabled */
1663 if (HAS_PCH_CPT(dev_priv
))
1664 *pipe
= (val
& SDVO_PIPE_SEL_MASK_CPT
) >> SDVO_PIPE_SEL_SHIFT_CPT
;
1665 else if (IS_CHERRYVIEW(dev_priv
))
1666 *pipe
= (val
& SDVO_PIPE_SEL_MASK_CHV
) >> SDVO_PIPE_SEL_SHIFT_CHV
;
1668 *pipe
= (val
& SDVO_PIPE_SEL_MASK
) >> SDVO_PIPE_SEL_SHIFT
;
1670 return val
& SDVO_ENABLE
;
1673 static bool intel_sdvo_get_hw_state(struct intel_encoder
*encoder
,
1676 struct drm_i915_private
*dev_priv
= to_i915(encoder
->base
.dev
);
1677 struct intel_sdvo
*intel_sdvo
= to_sdvo(encoder
);
1678 u16 active_outputs
= 0;
1681 intel_sdvo_get_active_outputs(intel_sdvo
, &active_outputs
);
1683 ret
= intel_sdvo_port_enabled(dev_priv
, intel_sdvo
->sdvo_reg
, pipe
);
1685 return ret
|| active_outputs
;
1688 static void intel_sdvo_get_config(struct intel_encoder
*encoder
,
1689 struct intel_crtc_state
*pipe_config
)
1691 struct drm_device
*dev
= encoder
->base
.dev
;
1692 struct drm_i915_private
*dev_priv
= to_i915(dev
);
1693 struct intel_sdvo
*intel_sdvo
= to_sdvo(encoder
);
1694 struct intel_sdvo_dtd dtd
;
1695 int encoder_pixel_multiplier
= 0;
1697 u32 flags
= 0, sdvox
;
1701 pipe_config
->output_types
|= BIT(INTEL_OUTPUT_SDVO
);
1703 sdvox
= intel_de_read(dev_priv
, intel_sdvo
->sdvo_reg
);
1705 ret
= intel_sdvo_get_input_timing(intel_sdvo
, &dtd
);
1708 * Some sdvo encoders are not spec compliant and don't
1709 * implement the mandatory get_timings function.
1711 drm_dbg(&dev_priv
->drm
, "failed to retrieve SDVO DTD\n");
1712 pipe_config
->quirks
|= PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS
;
1714 if (dtd
.part2
.dtd_flags
& DTD_FLAG_HSYNC_POSITIVE
)
1715 flags
|= DRM_MODE_FLAG_PHSYNC
;
1717 flags
|= DRM_MODE_FLAG_NHSYNC
;
1719 if (dtd
.part2
.dtd_flags
& DTD_FLAG_VSYNC_POSITIVE
)
1720 flags
|= DRM_MODE_FLAG_PVSYNC
;
1722 flags
|= DRM_MODE_FLAG_NVSYNC
;
1725 pipe_config
->hw
.adjusted_mode
.flags
|= flags
;
1728 * pixel multiplier readout is tricky: Only on i915g/gm it is stored in
1729 * the sdvo port register, on all other platforms it is part of the dpll
1730 * state. Since the general pipe state readout happens before the
1731 * encoder->get_config we so already have a valid pixel multplier on all
1734 if (IS_I915G(dev_priv
) || IS_I915GM(dev_priv
)) {
1735 pipe_config
->pixel_multiplier
=
1736 ((sdvox
& SDVO_PORT_MULTIPLY_MASK
)
1737 >> SDVO_PORT_MULTIPLY_SHIFT
) + 1;
1740 dotclock
= pipe_config
->port_clock
;
1742 if (pipe_config
->pixel_multiplier
)
1743 dotclock
/= pipe_config
->pixel_multiplier
;
1745 pipe_config
->hw
.adjusted_mode
.crtc_clock
= dotclock
;
1747 /* Cross check the port pixel multiplier with the sdvo encoder state. */
1748 if (intel_sdvo_get_value(intel_sdvo
, SDVO_CMD_GET_CLOCK_RATE_MULT
,
1751 case SDVO_CLOCK_RATE_MULT_1X
:
1752 encoder_pixel_multiplier
= 1;
1754 case SDVO_CLOCK_RATE_MULT_2X
:
1755 encoder_pixel_multiplier
= 2;
1757 case SDVO_CLOCK_RATE_MULT_4X
:
1758 encoder_pixel_multiplier
= 4;
1764 encoder_pixel_multiplier
!= pipe_config
->pixel_multiplier
,
1765 "SDVO pixel multiplier mismatch, port: %i, encoder: %i\n",
1766 pipe_config
->pixel_multiplier
, encoder_pixel_multiplier
);
1768 if (intel_sdvo_get_value(intel_sdvo
, SDVO_CMD_GET_COLORIMETRY
,
1770 if (val
== SDVO_COLORIMETRY_RGB220
)
1771 pipe_config
->limited_color_range
= true;
1774 if (intel_sdvo_get_value(intel_sdvo
, SDVO_CMD_GET_AUDIO_STAT
,
1776 if (val
& SDVO_AUDIO_PRESENCE_DETECT
)
1777 pipe_config
->has_audio
= true;
1780 if (intel_sdvo_get_value(intel_sdvo
, SDVO_CMD_GET_ENCODE
,
1782 if (val
== SDVO_ENCODE_HDMI
)
1783 pipe_config
->has_hdmi_sink
= true;
1786 intel_sdvo_get_avi_infoframe(intel_sdvo
, pipe_config
);
1788 intel_sdvo_get_eld(intel_sdvo
, pipe_config
);
1791 static void intel_sdvo_disable_audio(struct intel_encoder
*encoder
,
1792 const struct intel_crtc_state
*old_crtc_state
,
1793 const struct drm_connector_state
*old_conn_state
)
1795 struct intel_sdvo
*intel_sdvo
= to_sdvo(encoder
);
1797 if (!old_crtc_state
->has_audio
)
1800 intel_sdvo_set_audio_state(intel_sdvo
, 0);
1803 static void intel_sdvo_enable_audio(struct intel_encoder
*encoder
,
1804 const struct intel_crtc_state
*crtc_state
,
1805 const struct drm_connector_state
*conn_state
)
1807 struct intel_sdvo
*intel_sdvo
= to_sdvo(encoder
);
1808 const u8
*eld
= crtc_state
->eld
;
1810 if (!crtc_state
->has_audio
)
1813 intel_sdvo_set_audio_state(intel_sdvo
, 0);
1815 intel_sdvo_write_infoframe(intel_sdvo
, SDVO_HBUF_INDEX_ELD
,
1816 SDVO_HBUF_TX_DISABLED
,
1817 eld
, drm_eld_size(eld
));
1819 intel_sdvo_set_audio_state(intel_sdvo
, SDVO_AUDIO_ELD_VALID
|
1820 SDVO_AUDIO_PRESENCE_DETECT
);
1823 static void intel_disable_sdvo(struct intel_atomic_state
*state
,
1824 struct intel_encoder
*encoder
,
1825 const struct intel_crtc_state
*old_crtc_state
,
1826 const struct drm_connector_state
*conn_state
)
1828 struct drm_i915_private
*dev_priv
= to_i915(encoder
->base
.dev
);
1829 struct intel_sdvo
*intel_sdvo
= to_sdvo(encoder
);
1830 struct intel_crtc
*crtc
= to_intel_crtc(old_crtc_state
->uapi
.crtc
);
1833 encoder
->audio_disable(encoder
, old_crtc_state
, conn_state
);
1835 intel_sdvo_set_active_outputs(intel_sdvo
, 0);
1837 intel_sdvo_set_encoder_power_state(intel_sdvo
,
1840 temp
= intel_de_read(dev_priv
, intel_sdvo
->sdvo_reg
);
1842 temp
&= ~SDVO_ENABLE
;
1843 intel_sdvo_write_sdvox(intel_sdvo
, temp
);
1846 * HW workaround for IBX, we need to move the port
1847 * to transcoder A after disabling it to allow the
1848 * matching DP port to be enabled on transcoder A.
1850 if (HAS_PCH_IBX(dev_priv
) && crtc
->pipe
== PIPE_B
) {
1852 * We get CPU/PCH FIFO underruns on the other pipe when
1853 * doing the workaround. Sweep them under the rug.
1855 intel_set_cpu_fifo_underrun_reporting(dev_priv
, PIPE_A
, false);
1856 intel_set_pch_fifo_underrun_reporting(dev_priv
, PIPE_A
, false);
1858 temp
&= ~SDVO_PIPE_SEL_MASK
;
1859 temp
|= SDVO_ENABLE
| SDVO_PIPE_SEL(PIPE_A
);
1860 intel_sdvo_write_sdvox(intel_sdvo
, temp
);
1862 temp
&= ~SDVO_ENABLE
;
1863 intel_sdvo_write_sdvox(intel_sdvo
, temp
);
1865 intel_wait_for_vblank_if_active(dev_priv
, PIPE_A
);
1866 intel_set_cpu_fifo_underrun_reporting(dev_priv
, PIPE_A
, true);
1867 intel_set_pch_fifo_underrun_reporting(dev_priv
, PIPE_A
, true);
1871 static void pch_disable_sdvo(struct intel_atomic_state
*state
,
1872 struct intel_encoder
*encoder
,
1873 const struct intel_crtc_state
*old_crtc_state
,
1874 const struct drm_connector_state
*old_conn_state
)
1878 static void pch_post_disable_sdvo(struct intel_atomic_state
*state
,
1879 struct intel_encoder
*encoder
,
1880 const struct intel_crtc_state
*old_crtc_state
,
1881 const struct drm_connector_state
*old_conn_state
)
1883 intel_disable_sdvo(state
, encoder
, old_crtc_state
, old_conn_state
);
1886 static void intel_enable_sdvo(struct intel_atomic_state
*state
,
1887 struct intel_encoder
*encoder
,
1888 const struct intel_crtc_state
*pipe_config
,
1889 const struct drm_connector_state
*conn_state
)
1891 struct drm_device
*dev
= encoder
->base
.dev
;
1892 struct drm_i915_private
*dev_priv
= to_i915(dev
);
1893 struct intel_sdvo
*intel_sdvo
= to_sdvo(encoder
);
1894 struct intel_sdvo_connector
*intel_sdvo_connector
=
1895 to_intel_sdvo_connector(conn_state
->connector
);
1896 struct intel_crtc
*crtc
= to_intel_crtc(pipe_config
->uapi
.crtc
);
1898 bool input1
, input2
;
1902 temp
= intel_de_read(dev_priv
, intel_sdvo
->sdvo_reg
);
1903 temp
|= SDVO_ENABLE
;
1904 intel_sdvo_write_sdvox(intel_sdvo
, temp
);
1906 for (i
= 0; i
< 2; i
++)
1907 intel_crtc_wait_for_next_vblank(crtc
);
1909 success
= intel_sdvo_get_trained_inputs(intel_sdvo
, &input1
, &input2
);
1911 * Warn if the device reported failure to sync.
1913 * A lot of SDVO devices fail to notify of sync, but it's
1914 * a given it the status is a success, we succeeded.
1916 if (success
&& !input1
) {
1917 drm_dbg_kms(&dev_priv
->drm
,
1918 "First %s output reported failure to "
1919 "sync\n", SDVO_NAME(intel_sdvo
));
1923 intel_sdvo_set_encoder_power_state(intel_sdvo
,
1925 intel_sdvo_set_active_outputs(intel_sdvo
, intel_sdvo_connector
->output_flag
);
1927 encoder
->audio_enable(encoder
, pipe_config
, conn_state
);
1930 static enum drm_mode_status
1931 intel_sdvo_mode_valid(struct drm_connector
*connector
,
1932 struct drm_display_mode
*mode
)
1934 struct drm_i915_private
*i915
= to_i915(connector
->dev
);
1935 struct intel_sdvo
*intel_sdvo
= intel_attached_sdvo(to_intel_connector(connector
));
1936 struct intel_sdvo_connector
*intel_sdvo_connector
=
1937 to_intel_sdvo_connector(connector
);
1938 bool has_hdmi_sink
= intel_has_hdmi_sink(intel_sdvo_connector
, connector
->state
);
1939 int max_dotclk
= i915
->max_dotclk_freq
;
1940 enum drm_mode_status status
;
1941 int clock
= mode
->clock
;
1943 status
= intel_cpu_transcoder_mode_valid(i915
, mode
);
1944 if (status
!= MODE_OK
)
1947 if (mode
->flags
& DRM_MODE_FLAG_DBLSCAN
)
1948 return MODE_NO_DBLESCAN
;
1950 if (clock
> max_dotclk
)
1951 return MODE_CLOCK_HIGH
;
1953 if (mode
->flags
& DRM_MODE_FLAG_DBLCLK
) {
1955 return MODE_CLOCK_LOW
;
1959 if (intel_sdvo
->pixel_clock_min
> clock
)
1960 return MODE_CLOCK_LOW
;
1962 if (intel_sdvo
->pixel_clock_max
< clock
)
1963 return MODE_CLOCK_HIGH
;
1965 if (IS_LVDS(intel_sdvo_connector
)) {
1966 enum drm_mode_status status
;
1968 status
= intel_panel_mode_valid(&intel_sdvo_connector
->base
, mode
);
1969 if (status
!= MODE_OK
)
1976 static bool intel_sdvo_get_capabilities(struct intel_sdvo
*intel_sdvo
, struct intel_sdvo_caps
*caps
)
1978 BUILD_BUG_ON(sizeof(*caps
) != 8);
1979 if (!intel_sdvo_get_value(intel_sdvo
,
1980 SDVO_CMD_GET_DEVICE_CAPS
,
1981 caps
, sizeof(*caps
)))
1984 DRM_DEBUG_KMS("SDVO capabilities:\n"
1987 " device_rev_id: %d\n"
1988 " sdvo_version_major: %d\n"
1989 " sdvo_version_minor: %d\n"
1990 " sdvo_num_inputs: %d\n"
1991 " smooth_scaling: %d\n"
1992 " sharp_scaling: %d\n"
1994 " down_scaling: %d\n"
1995 " stall_support: %d\n"
1996 " output_flags: %d\n",
1999 caps
->device_rev_id
,
2000 caps
->sdvo_version_major
,
2001 caps
->sdvo_version_minor
,
2002 caps
->sdvo_num_inputs
,
2003 caps
->smooth_scaling
,
2004 caps
->sharp_scaling
,
2007 caps
->stall_support
,
2008 caps
->output_flags
);
2013 static u8
intel_sdvo_get_colorimetry_cap(struct intel_sdvo
*intel_sdvo
)
2017 if (!intel_sdvo_get_value(intel_sdvo
, SDVO_CMD_GET_COLORIMETRY_CAP
,
2019 return SDVO_COLORIMETRY_RGB256
;
2024 static u16
intel_sdvo_get_hotplug_support(struct intel_sdvo
*intel_sdvo
)
2026 struct drm_i915_private
*dev_priv
= to_i915(intel_sdvo
->base
.base
.dev
);
2029 if (!I915_HAS_HOTPLUG(dev_priv
))
2033 * HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
2036 if (IS_I945G(dev_priv
) || IS_I945GM(dev_priv
))
2039 if (!intel_sdvo_get_value(intel_sdvo
, SDVO_CMD_GET_HOT_PLUG_SUPPORT
,
2040 &hotplug
, sizeof(hotplug
)))
2046 static void intel_sdvo_enable_hotplug(struct intel_encoder
*encoder
)
2048 struct intel_sdvo
*intel_sdvo
= to_sdvo(encoder
);
2050 intel_sdvo_write_cmd(intel_sdvo
, SDVO_CMD_SET_ACTIVE_HOT_PLUG
,
2051 &intel_sdvo
->hotplug_active
, 2);
2054 static enum intel_hotplug_state
2055 intel_sdvo_hotplug(struct intel_encoder
*encoder
,
2056 struct intel_connector
*connector
)
2058 intel_sdvo_enable_hotplug(encoder
);
2060 return intel_encoder_hotplug(encoder
, connector
);
2063 static const struct drm_edid
*
2064 intel_sdvo_get_edid(struct drm_connector
*connector
)
2066 struct i2c_adapter
*ddc
= connector
->ddc
;
2071 return drm_edid_read_ddc(connector
, ddc
);
2074 /* Mac mini hack -- use the same DDC as the analog connector */
2075 static const struct drm_edid
*
2076 intel_sdvo_get_analog_edid(struct drm_connector
*connector
)
2078 struct drm_i915_private
*i915
= to_i915(connector
->dev
);
2079 struct i2c_adapter
*ddc
;
2081 ddc
= intel_gmbus_get_adapter(i915
, i915
->display
.vbt
.crt_ddc_pin
);
2085 return drm_edid_read_ddc(connector
, ddc
);
2088 static enum drm_connector_status
2089 intel_sdvo_tmds_sink_detect(struct drm_connector
*connector
)
2091 enum drm_connector_status status
;
2092 const struct drm_edid
*drm_edid
;
2094 drm_edid
= intel_sdvo_get_edid(connector
);
2097 * When there is no edid and no monitor is connected with VGA
2098 * port, try to use the CRT ddc to read the EDID for DVI-connector.
2101 drm_edid
= intel_sdvo_get_analog_edid(connector
);
2103 status
= connector_status_unknown
;
2105 /* DDC bus is shared, match EDID to connector type */
2106 if (drm_edid_is_digital(drm_edid
))
2107 status
= connector_status_connected
;
2109 status
= connector_status_disconnected
;
2110 drm_edid_free(drm_edid
);
2117 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector
*sdvo
,
2118 const struct drm_edid
*drm_edid
)
2120 bool monitor_is_digital
= drm_edid_is_digital(drm_edid
);
2121 bool connector_is_digital
= !!IS_DIGITAL(sdvo
);
2123 DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
2124 connector_is_digital
, monitor_is_digital
);
2125 return connector_is_digital
== monitor_is_digital
;
2128 static enum drm_connector_status
2129 intel_sdvo_detect(struct drm_connector
*connector
, bool force
)
2131 struct drm_i915_private
*i915
= to_i915(connector
->dev
);
2132 struct intel_sdvo
*intel_sdvo
= intel_attached_sdvo(to_intel_connector(connector
));
2133 struct intel_sdvo_connector
*intel_sdvo_connector
= to_intel_sdvo_connector(connector
);
2134 enum drm_connector_status ret
;
2137 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
2138 connector
->base
.id
, connector
->name
);
2140 if (!intel_display_device_enabled(i915
))
2141 return connector_status_disconnected
;
2143 if (!intel_sdvo_set_target_output(intel_sdvo
,
2144 intel_sdvo_connector
->output_flag
))
2145 return connector_status_unknown
;
2147 if (!intel_sdvo_get_value(intel_sdvo
,
2148 SDVO_CMD_GET_ATTACHED_DISPLAYS
,
2150 return connector_status_unknown
;
2152 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
2153 response
& 0xff, response
>> 8,
2154 intel_sdvo_connector
->output_flag
);
2157 return connector_status_disconnected
;
2159 if ((intel_sdvo_connector
->output_flag
& response
) == 0)
2160 ret
= connector_status_disconnected
;
2161 else if (IS_TMDS(intel_sdvo_connector
))
2162 ret
= intel_sdvo_tmds_sink_detect(connector
);
2164 const struct drm_edid
*drm_edid
;
2166 /* if we have an edid check it matches the connection */
2167 drm_edid
= intel_sdvo_get_edid(connector
);
2169 drm_edid
= intel_sdvo_get_analog_edid(connector
);
2171 if (intel_sdvo_connector_matches_edid(intel_sdvo_connector
,
2173 ret
= connector_status_connected
;
2175 ret
= connector_status_disconnected
;
2177 drm_edid_free(drm_edid
);
2179 ret
= connector_status_connected
;
2186 static int intel_sdvo_get_ddc_modes(struct drm_connector
*connector
)
2189 const struct drm_edid
*drm_edid
;
2191 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
2192 connector
->base
.id
, connector
->name
);
2194 /* set the bus switch and get the modes */
2195 drm_edid
= intel_sdvo_get_edid(connector
);
2198 * Mac mini hack. On this device, the DVI-I connector shares one DDC
2199 * link between analog and digital outputs. So, if the regular SDVO
2200 * DDC fails, check to see if the analog output is disconnected, in
2201 * which case we'll look there for the digital DDC data.
2204 drm_edid
= intel_sdvo_get_analog_edid(connector
);
2209 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector
),
2211 num_modes
+= intel_connector_update_modes(connector
, drm_edid
);
2213 drm_edid_free(drm_edid
);
2219 * Set of SDVO TV modes.
2220 * Note! This is in reply order (see loop in get_tv_modes).
2221 * XXX: all 60Hz refresh?
2223 static const struct drm_display_mode sdvo_tv_modes
[] = {
2224 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER
, 5815, 320, 321, 384,
2225 416, 0, 200, 201, 232, 233, 0,
2226 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
2227 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER
, 6814, 320, 321, 384,
2228 416, 0, 240, 241, 272, 273, 0,
2229 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
2230 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER
, 9910, 400, 401, 464,
2231 496, 0, 300, 301, 332, 333, 0,
2232 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
2233 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER
, 16913, 640, 641, 704,
2234 736, 0, 350, 351, 382, 383, 0,
2235 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
2236 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER
, 19121, 640, 641, 704,
2237 736, 0, 400, 401, 432, 433, 0,
2238 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
2239 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER
, 22654, 640, 641, 704,
2240 736, 0, 480, 481, 512, 513, 0,
2241 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
2242 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER
, 24624, 704, 705, 768,
2243 800, 0, 480, 481, 512, 513, 0,
2244 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
2245 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER
, 29232, 704, 705, 768,
2246 800, 0, 576, 577, 608, 609, 0,
2247 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
2248 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER
, 18751, 720, 721, 784,
2249 816, 0, 350, 351, 382, 383, 0,
2250 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
2251 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER
, 21199, 720, 721, 784,
2252 816, 0, 400, 401, 432, 433, 0,
2253 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
2254 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER
, 25116, 720, 721, 784,
2255 816, 0, 480, 481, 512, 513, 0,
2256 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
2257 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER
, 28054, 720, 721, 784,
2258 816, 0, 540, 541, 572, 573, 0,
2259 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
2260 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER
, 29816, 720, 721, 784,
2261 816, 0, 576, 577, 608, 609, 0,
2262 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
2263 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER
, 31570, 768, 769, 832,
2264 864, 0, 576, 577, 608, 609, 0,
2265 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
2266 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER
, 34030, 800, 801, 864,
2267 896, 0, 600, 601, 632, 633, 0,
2268 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
2269 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER
, 36581, 832, 833, 896,
2270 928, 0, 624, 625, 656, 657, 0,
2271 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
2272 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER
, 48707, 920, 921, 984,
2273 1016, 0, 766, 767, 798, 799, 0,
2274 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
2275 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER
, 53827, 1024, 1025, 1088,
2276 1120, 0, 768, 769, 800, 801, 0,
2277 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
2278 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER
, 87265, 1280, 1281, 1344,
2279 1376, 0, 1024, 1025, 1056, 1057, 0,
2280 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
2283 static int intel_sdvo_get_tv_modes(struct drm_connector
*connector
)
2285 struct intel_sdvo
*intel_sdvo
= intel_attached_sdvo(to_intel_connector(connector
));
2286 struct intel_sdvo_connector
*intel_sdvo_connector
=
2287 to_intel_sdvo_connector(connector
);
2288 const struct drm_connector_state
*conn_state
= connector
->state
;
2289 struct intel_sdvo_sdtv_resolution_request tv_res
;
2290 u32 reply
= 0, format_map
= 0;
2294 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
2295 connector
->base
.id
, connector
->name
);
2298 * Read the list of supported input resolutions for the selected TV
2301 format_map
= 1 << conn_state
->tv
.legacy_mode
;
2302 memcpy(&tv_res
, &format_map
,
2303 min(sizeof(format_map
), sizeof(struct intel_sdvo_sdtv_resolution_request
)));
2305 if (!intel_sdvo_set_target_output(intel_sdvo
, intel_sdvo_connector
->output_flag
))
2308 BUILD_BUG_ON(sizeof(tv_res
) != 3);
2309 if (!intel_sdvo_write_cmd(intel_sdvo
,
2310 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT
,
2311 &tv_res
, sizeof(tv_res
)))
2313 if (!intel_sdvo_read_response(intel_sdvo
, &reply
, 3))
2316 for (i
= 0; i
< ARRAY_SIZE(sdvo_tv_modes
); i
++) {
2317 if (reply
& (1 << i
)) {
2318 struct drm_display_mode
*nmode
;
2319 nmode
= drm_mode_duplicate(connector
->dev
,
2322 drm_mode_probed_add(connector
, nmode
);
2331 static int intel_sdvo_get_lvds_modes(struct drm_connector
*connector
)
2333 struct drm_i915_private
*dev_priv
= to_i915(connector
->dev
);
2335 drm_dbg_kms(&dev_priv
->drm
, "[CONNECTOR:%d:%s]\n",
2336 connector
->base
.id
, connector
->name
);
2338 return intel_panel_get_modes(to_intel_connector(connector
));
2341 static int intel_sdvo_get_modes(struct drm_connector
*connector
)
2343 struct intel_sdvo_connector
*intel_sdvo_connector
= to_intel_sdvo_connector(connector
);
2345 if (IS_TV(intel_sdvo_connector
))
2346 return intel_sdvo_get_tv_modes(connector
);
2347 else if (IS_LVDS(intel_sdvo_connector
))
2348 return intel_sdvo_get_lvds_modes(connector
);
2350 return intel_sdvo_get_ddc_modes(connector
);
2354 intel_sdvo_connector_atomic_get_property(struct drm_connector
*connector
,
2355 const struct drm_connector_state
*state
,
2356 struct drm_property
*property
,
2359 struct intel_sdvo_connector
*intel_sdvo_connector
= to_intel_sdvo_connector(connector
);
2360 const struct intel_sdvo_connector_state
*sdvo_state
= to_intel_sdvo_connector_state((void *)state
);
2362 if (property
== intel_sdvo_connector
->tv_format
) {
2365 for (i
= 0; i
< intel_sdvo_connector
->format_supported_num
; i
++)
2366 if (state
->tv
.legacy_mode
== intel_sdvo_connector
->tv_format_supported
[i
]) {
2372 drm_WARN_ON(connector
->dev
, 1);
2374 } else if (property
== intel_sdvo_connector
->top
||
2375 property
== intel_sdvo_connector
->bottom
)
2376 *val
= intel_sdvo_connector
->max_vscan
- sdvo_state
->tv
.overscan_v
;
2377 else if (property
== intel_sdvo_connector
->left
||
2378 property
== intel_sdvo_connector
->right
)
2379 *val
= intel_sdvo_connector
->max_hscan
- sdvo_state
->tv
.overscan_h
;
2380 else if (property
== intel_sdvo_connector
->hpos
)
2381 *val
= sdvo_state
->tv
.hpos
;
2382 else if (property
== intel_sdvo_connector
->vpos
)
2383 *val
= sdvo_state
->tv
.vpos
;
2384 else if (property
== intel_sdvo_connector
->saturation
)
2385 *val
= state
->tv
.saturation
;
2386 else if (property
== intel_sdvo_connector
->contrast
)
2387 *val
= state
->tv
.contrast
;
2388 else if (property
== intel_sdvo_connector
->hue
)
2389 *val
= state
->tv
.hue
;
2390 else if (property
== intel_sdvo_connector
->brightness
)
2391 *val
= state
->tv
.brightness
;
2392 else if (property
== intel_sdvo_connector
->sharpness
)
2393 *val
= sdvo_state
->tv
.sharpness
;
2394 else if (property
== intel_sdvo_connector
->flicker_filter
)
2395 *val
= sdvo_state
->tv
.flicker_filter
;
2396 else if (property
== intel_sdvo_connector
->flicker_filter_2d
)
2397 *val
= sdvo_state
->tv
.flicker_filter_2d
;
2398 else if (property
== intel_sdvo_connector
->flicker_filter_adaptive
)
2399 *val
= sdvo_state
->tv
.flicker_filter_adaptive
;
2400 else if (property
== intel_sdvo_connector
->tv_chroma_filter
)
2401 *val
= sdvo_state
->tv
.chroma_filter
;
2402 else if (property
== intel_sdvo_connector
->tv_luma_filter
)
2403 *val
= sdvo_state
->tv
.luma_filter
;
2404 else if (property
== intel_sdvo_connector
->dot_crawl
)
2405 *val
= sdvo_state
->tv
.dot_crawl
;
2407 return intel_digital_connector_atomic_get_property(connector
, state
, property
, val
);
2413 intel_sdvo_connector_atomic_set_property(struct drm_connector
*connector
,
2414 struct drm_connector_state
*state
,
2415 struct drm_property
*property
,
2418 struct intel_sdvo_connector
*intel_sdvo_connector
= to_intel_sdvo_connector(connector
);
2419 struct intel_sdvo_connector_state
*sdvo_state
= to_intel_sdvo_connector_state(state
);
2421 if (property
== intel_sdvo_connector
->tv_format
) {
2422 state
->tv
.legacy_mode
= intel_sdvo_connector
->tv_format_supported
[val
];
2425 struct drm_crtc_state
*crtc_state
=
2426 drm_atomic_get_new_crtc_state(state
->state
, state
->crtc
);
2428 crtc_state
->connectors_changed
= true;
2430 } else if (property
== intel_sdvo_connector
->top
||
2431 property
== intel_sdvo_connector
->bottom
)
2432 /* Cannot set these independent from each other */
2433 sdvo_state
->tv
.overscan_v
= intel_sdvo_connector
->max_vscan
- val
;
2434 else if (property
== intel_sdvo_connector
->left
||
2435 property
== intel_sdvo_connector
->right
)
2436 /* Cannot set these independent from each other */
2437 sdvo_state
->tv
.overscan_h
= intel_sdvo_connector
->max_hscan
- val
;
2438 else if (property
== intel_sdvo_connector
->hpos
)
2439 sdvo_state
->tv
.hpos
= val
;
2440 else if (property
== intel_sdvo_connector
->vpos
)
2441 sdvo_state
->tv
.vpos
= val
;
2442 else if (property
== intel_sdvo_connector
->saturation
)
2443 state
->tv
.saturation
= val
;
2444 else if (property
== intel_sdvo_connector
->contrast
)
2445 state
->tv
.contrast
= val
;
2446 else if (property
== intel_sdvo_connector
->hue
)
2447 state
->tv
.hue
= val
;
2448 else if (property
== intel_sdvo_connector
->brightness
)
2449 state
->tv
.brightness
= val
;
2450 else if (property
== intel_sdvo_connector
->sharpness
)
2451 sdvo_state
->tv
.sharpness
= val
;
2452 else if (property
== intel_sdvo_connector
->flicker_filter
)
2453 sdvo_state
->tv
.flicker_filter
= val
;
2454 else if (property
== intel_sdvo_connector
->flicker_filter_2d
)
2455 sdvo_state
->tv
.flicker_filter_2d
= val
;
2456 else if (property
== intel_sdvo_connector
->flicker_filter_adaptive
)
2457 sdvo_state
->tv
.flicker_filter_adaptive
= val
;
2458 else if (property
== intel_sdvo_connector
->tv_chroma_filter
)
2459 sdvo_state
->tv
.chroma_filter
= val
;
2460 else if (property
== intel_sdvo_connector
->tv_luma_filter
)
2461 sdvo_state
->tv
.luma_filter
= val
;
2462 else if (property
== intel_sdvo_connector
->dot_crawl
)
2463 sdvo_state
->tv
.dot_crawl
= val
;
2465 return intel_digital_connector_atomic_set_property(connector
, state
, property
, val
);
2470 static struct drm_connector_state
*
2471 intel_sdvo_connector_duplicate_state(struct drm_connector
*connector
)
2473 struct intel_sdvo_connector_state
*state
;
2475 state
= kmemdup(connector
->state
, sizeof(*state
), GFP_KERNEL
);
2479 __drm_atomic_helper_connector_duplicate_state(connector
, &state
->base
.base
);
2480 return &state
->base
.base
;
2483 static const struct drm_connector_funcs intel_sdvo_connector_funcs
= {
2484 .detect
= intel_sdvo_detect
,
2485 .fill_modes
= drm_helper_probe_single_connector_modes
,
2486 .atomic_get_property
= intel_sdvo_connector_atomic_get_property
,
2487 .atomic_set_property
= intel_sdvo_connector_atomic_set_property
,
2488 .late_register
= intel_connector_register
,
2489 .early_unregister
= intel_connector_unregister
,
2490 .destroy
= intel_connector_destroy
,
2491 .atomic_destroy_state
= drm_atomic_helper_connector_destroy_state
,
2492 .atomic_duplicate_state
= intel_sdvo_connector_duplicate_state
,
2495 static int intel_sdvo_atomic_check(struct drm_connector
*conn
,
2496 struct drm_atomic_state
*state
)
2498 struct drm_connector_state
*new_conn_state
=
2499 drm_atomic_get_new_connector_state(state
, conn
);
2500 struct drm_connector_state
*old_conn_state
=
2501 drm_atomic_get_old_connector_state(state
, conn
);
2502 struct intel_sdvo_connector_state
*old_state
=
2503 to_intel_sdvo_connector_state(old_conn_state
);
2504 struct intel_sdvo_connector_state
*new_state
=
2505 to_intel_sdvo_connector_state(new_conn_state
);
2507 if (new_conn_state
->crtc
&&
2508 (memcmp(&old_state
->tv
, &new_state
->tv
, sizeof(old_state
->tv
)) ||
2509 memcmp(&old_conn_state
->tv
, &new_conn_state
->tv
, sizeof(old_conn_state
->tv
)))) {
2510 struct drm_crtc_state
*crtc_state
=
2511 drm_atomic_get_new_crtc_state(state
,
2512 new_conn_state
->crtc
);
2514 crtc_state
->connectors_changed
= true;
2517 return intel_digital_connector_atomic_check(conn
, state
);
2520 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs
= {
2521 .get_modes
= intel_sdvo_get_modes
,
2522 .mode_valid
= intel_sdvo_mode_valid
,
2523 .atomic_check
= intel_sdvo_atomic_check
,
2526 static void intel_sdvo_encoder_destroy(struct drm_encoder
*_encoder
)
2528 struct intel_encoder
*encoder
= to_intel_encoder(_encoder
);
2529 struct intel_sdvo
*sdvo
= to_sdvo(encoder
);
2532 for (i
= 0; i
< ARRAY_SIZE(sdvo
->ddc
); i
++) {
2533 if (sdvo
->ddc
[i
].ddc_bus
)
2534 i2c_del_adapter(&sdvo
->ddc
[i
].ddc
);
2537 drm_encoder_cleanup(&encoder
->base
);
2541 static const struct drm_encoder_funcs intel_sdvo_enc_funcs
= {
2542 .destroy
= intel_sdvo_encoder_destroy
,
2546 intel_sdvo_guess_ddc_bus(struct intel_sdvo
*sdvo
,
2547 struct intel_sdvo_connector
*connector
)
2553 * Make a mask of outputs less than or equal to our own priority in the
2556 switch (connector
->output_flag
) {
2557 case SDVO_OUTPUT_LVDS1
:
2558 mask
|= SDVO_OUTPUT_LVDS1
;
2560 case SDVO_OUTPUT_LVDS0
:
2561 mask
|= SDVO_OUTPUT_LVDS0
;
2563 case SDVO_OUTPUT_TMDS1
:
2564 mask
|= SDVO_OUTPUT_TMDS1
;
2566 case SDVO_OUTPUT_TMDS0
:
2567 mask
|= SDVO_OUTPUT_TMDS0
;
2569 case SDVO_OUTPUT_RGB1
:
2570 mask
|= SDVO_OUTPUT_RGB1
;
2572 case SDVO_OUTPUT_RGB0
:
2573 mask
|= SDVO_OUTPUT_RGB0
;
2577 /* Count bits to find what number we are in the priority list. */
2578 mask
&= sdvo
->caps
.output_flags
;
2579 num_bits
= hweight16(mask
);
2580 /* If more than 3 outputs, default to DDC bus 3 for now. */
2584 /* Corresponds to SDVO_CONTROL_BUS_DDCx */
2589 * Choose the appropriate DDC bus for control bus switch command for this
2590 * SDVO output based on the controlled output.
2592 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
2593 * outputs, then LVDS outputs.
2595 static struct intel_sdvo_ddc
*
2596 intel_sdvo_select_ddc_bus(struct intel_sdvo
*sdvo
,
2597 struct intel_sdvo_connector
*connector
)
2599 struct drm_i915_private
*dev_priv
= to_i915(sdvo
->base
.base
.dev
);
2600 const struct sdvo_device_mapping
*mapping
;
2603 if (sdvo
->base
.port
== PORT_B
)
2604 mapping
= &dev_priv
->display
.vbt
.sdvo_mappings
[0];
2606 mapping
= &dev_priv
->display
.vbt
.sdvo_mappings
[1];
2608 if (mapping
->initialized
)
2609 ddc_bus
= (mapping
->ddc_pin
& 0xf0) >> 4;
2611 ddc_bus
= intel_sdvo_guess_ddc_bus(sdvo
, connector
);
2613 if (ddc_bus
< 1 || ddc_bus
> 3)
2616 return &sdvo
->ddc
[ddc_bus
- 1];
2620 intel_sdvo_select_i2c_bus(struct intel_sdvo
*sdvo
)
2622 struct drm_i915_private
*dev_priv
= to_i915(sdvo
->base
.base
.dev
);
2623 const struct sdvo_device_mapping
*mapping
;
2626 if (sdvo
->base
.port
== PORT_B
)
2627 mapping
= &dev_priv
->display
.vbt
.sdvo_mappings
[0];
2629 mapping
= &dev_priv
->display
.vbt
.sdvo_mappings
[1];
2631 if (mapping
->initialized
&&
2632 intel_gmbus_is_valid_pin(dev_priv
, mapping
->i2c_pin
))
2633 pin
= mapping
->i2c_pin
;
2635 pin
= GMBUS_PIN_DPB
;
2637 drm_dbg_kms(&dev_priv
->drm
, "[ENCODER:%d:%s] I2C pin %d, slave addr 0x%x\n",
2638 sdvo
->base
.base
.base
.id
, sdvo
->base
.base
.name
,
2639 pin
, sdvo
->slave_addr
);
2641 sdvo
->i2c
= intel_gmbus_get_adapter(dev_priv
, pin
);
2644 * With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow
2645 * our code totally fails once we start using gmbus. Hence fall back to
2646 * bit banging for now.
2648 intel_gmbus_force_bit(sdvo
->i2c
, true);
2651 /* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */
2653 intel_sdvo_unselect_i2c_bus(struct intel_sdvo
*sdvo
)
2655 intel_gmbus_force_bit(sdvo
->i2c
, false);
2659 intel_sdvo_is_hdmi_connector(struct intel_sdvo
*intel_sdvo
)
2661 return intel_sdvo_check_supp_encode(intel_sdvo
);
2665 intel_sdvo_get_slave_addr(struct intel_sdvo
*sdvo
)
2667 struct drm_i915_private
*dev_priv
= to_i915(sdvo
->base
.base
.dev
);
2668 const struct sdvo_device_mapping
*my_mapping
, *other_mapping
;
2670 if (sdvo
->base
.port
== PORT_B
) {
2671 my_mapping
= &dev_priv
->display
.vbt
.sdvo_mappings
[0];
2672 other_mapping
= &dev_priv
->display
.vbt
.sdvo_mappings
[1];
2674 my_mapping
= &dev_priv
->display
.vbt
.sdvo_mappings
[1];
2675 other_mapping
= &dev_priv
->display
.vbt
.sdvo_mappings
[0];
2678 /* If the BIOS described our SDVO device, take advantage of it. */
2679 if (my_mapping
->slave_addr
)
2680 return my_mapping
->slave_addr
;
2683 * If the BIOS only described a different SDVO device, use the
2684 * address that it isn't using.
2686 if (other_mapping
->slave_addr
) {
2687 if (other_mapping
->slave_addr
== 0x70)
2694 * No SDVO device info is found for another DVO port,
2695 * so use mapping assumption we had before BIOS parsing.
2697 if (sdvo
->base
.port
== PORT_B
)
2704 intel_sdvo_init_ddc_proxy(struct intel_sdvo_ddc
*ddc
,
2705 struct intel_sdvo
*sdvo
, int bit
);
2708 intel_sdvo_connector_init(struct intel_sdvo_connector
*connector
,
2709 struct intel_sdvo
*encoder
)
2711 struct drm_i915_private
*i915
= to_i915(encoder
->base
.base
.dev
);
2712 struct intel_sdvo_ddc
*ddc
= NULL
;
2715 if (HAS_DDC(connector
))
2716 ddc
= intel_sdvo_select_ddc_bus(encoder
, connector
);
2718 ret
= drm_connector_init_with_ddc(encoder
->base
.base
.dev
,
2719 &connector
->base
.base
,
2720 &intel_sdvo_connector_funcs
,
2721 connector
->base
.base
.connector_type
,
2722 ddc
? &ddc
->ddc
: NULL
);
2726 drm_connector_helper_add(&connector
->base
.base
,
2727 &intel_sdvo_connector_helper_funcs
);
2729 connector
->base
.base
.display_info
.subpixel_order
= SubPixelHorizontalRGB
;
2730 connector
->base
.base
.interlace_allowed
= true;
2731 connector
->base
.get_hw_state
= intel_sdvo_connector_get_hw_state
;
2733 intel_connector_attach_encoder(&connector
->base
, &encoder
->base
);
2736 drm_dbg_kms(&i915
->drm
, "[CONNECTOR:%d:%s] using %s\n",
2737 connector
->base
.base
.base
.id
, connector
->base
.base
.name
,
2744 intel_sdvo_add_hdmi_properties(struct intel_sdvo
*intel_sdvo
,
2745 struct intel_sdvo_connector
*connector
)
2747 intel_attach_force_audio_property(&connector
->base
.base
);
2748 if (intel_sdvo
->colorimetry_cap
& SDVO_COLORIMETRY_RGB220
)
2749 intel_attach_broadcast_rgb_property(&connector
->base
.base
);
2750 intel_attach_aspect_ratio_property(&connector
->base
.base
);
2753 static struct intel_sdvo_connector
*intel_sdvo_connector_alloc(void)
2755 struct intel_sdvo_connector
*sdvo_connector
;
2756 struct intel_sdvo_connector_state
*conn_state
;
2758 sdvo_connector
= kzalloc(sizeof(*sdvo_connector
), GFP_KERNEL
);
2759 if (!sdvo_connector
)
2762 conn_state
= kzalloc(sizeof(*conn_state
), GFP_KERNEL
);
2764 kfree(sdvo_connector
);
2768 __drm_atomic_helper_connector_reset(&sdvo_connector
->base
.base
,
2769 &conn_state
->base
.base
);
2771 intel_panel_init_alloc(&sdvo_connector
->base
);
2773 return sdvo_connector
;
2777 intel_sdvo_dvi_init(struct intel_sdvo
*intel_sdvo
, u16 type
)
2779 struct drm_encoder
*encoder
= &intel_sdvo
->base
.base
;
2780 struct drm_connector
*connector
;
2781 struct intel_encoder
*intel_encoder
= to_intel_encoder(encoder
);
2782 struct intel_connector
*intel_connector
;
2783 struct intel_sdvo_connector
*intel_sdvo_connector
;
2785 DRM_DEBUG_KMS("initialising DVI type 0x%x\n", type
);
2787 intel_sdvo_connector
= intel_sdvo_connector_alloc();
2788 if (!intel_sdvo_connector
)
2791 intel_sdvo_connector
->output_flag
= type
;
2793 intel_connector
= &intel_sdvo_connector
->base
;
2794 connector
= &intel_connector
->base
;
2795 if (intel_sdvo_get_hotplug_support(intel_sdvo
) &
2796 intel_sdvo_connector
->output_flag
) {
2797 intel_sdvo
->hotplug_active
|= intel_sdvo_connector
->output_flag
;
2799 * Some SDVO devices have one-shot hotplug interrupts.
2800 * Ensure that they get re-enabled when an interrupt happens.
2802 intel_connector
->polled
= DRM_CONNECTOR_POLL_HPD
;
2803 intel_encoder
->hotplug
= intel_sdvo_hotplug
;
2804 intel_sdvo_enable_hotplug(intel_encoder
);
2806 intel_connector
->polled
= DRM_CONNECTOR_POLL_CONNECT
| DRM_CONNECTOR_POLL_DISCONNECT
;
2808 encoder
->encoder_type
= DRM_MODE_ENCODER_TMDS
;
2809 connector
->connector_type
= DRM_MODE_CONNECTOR_DVID
;
2811 if (intel_sdvo_is_hdmi_connector(intel_sdvo
)) {
2812 connector
->connector_type
= DRM_MODE_CONNECTOR_HDMIA
;
2813 intel_sdvo_connector
->is_hdmi
= true;
2816 if (intel_sdvo_connector_init(intel_sdvo_connector
, intel_sdvo
) < 0) {
2817 kfree(intel_sdvo_connector
);
2821 if (intel_sdvo_connector
->is_hdmi
)
2822 intel_sdvo_add_hdmi_properties(intel_sdvo
, intel_sdvo_connector
);
2828 intel_sdvo_tv_init(struct intel_sdvo
*intel_sdvo
, u16 type
)
2830 struct drm_encoder
*encoder
= &intel_sdvo
->base
.base
;
2831 struct drm_connector
*connector
;
2832 struct intel_connector
*intel_connector
;
2833 struct intel_sdvo_connector
*intel_sdvo_connector
;
2835 DRM_DEBUG_KMS("initialising TV type 0x%x\n", type
);
2837 intel_sdvo_connector
= intel_sdvo_connector_alloc();
2838 if (!intel_sdvo_connector
)
2841 intel_connector
= &intel_sdvo_connector
->base
;
2842 connector
= &intel_connector
->base
;
2843 encoder
->encoder_type
= DRM_MODE_ENCODER_TVDAC
;
2844 connector
->connector_type
= DRM_MODE_CONNECTOR_SVIDEO
;
2846 intel_sdvo_connector
->output_flag
= type
;
2848 if (intel_sdvo_connector_init(intel_sdvo_connector
, intel_sdvo
) < 0) {
2849 kfree(intel_sdvo_connector
);
2853 if (!intel_sdvo_tv_create_property(intel_sdvo
, intel_sdvo_connector
, type
))
2856 if (!intel_sdvo_create_enhance_property(intel_sdvo
, intel_sdvo_connector
))
2862 intel_connector_destroy(connector
);
2867 intel_sdvo_analog_init(struct intel_sdvo
*intel_sdvo
, u16 type
)
2869 struct drm_encoder
*encoder
= &intel_sdvo
->base
.base
;
2870 struct drm_connector
*connector
;
2871 struct intel_connector
*intel_connector
;
2872 struct intel_sdvo_connector
*intel_sdvo_connector
;
2874 DRM_DEBUG_KMS("initialising analog type 0x%x\n", type
);
2876 intel_sdvo_connector
= intel_sdvo_connector_alloc();
2877 if (!intel_sdvo_connector
)
2880 intel_connector
= &intel_sdvo_connector
->base
;
2881 connector
= &intel_connector
->base
;
2882 intel_connector
->polled
= DRM_CONNECTOR_POLL_CONNECT
;
2883 encoder
->encoder_type
= DRM_MODE_ENCODER_DAC
;
2884 connector
->connector_type
= DRM_MODE_CONNECTOR_VGA
;
2886 intel_sdvo_connector
->output_flag
= type
;
2888 if (intel_sdvo_connector_init(intel_sdvo_connector
, intel_sdvo
) < 0) {
2889 kfree(intel_sdvo_connector
);
2897 intel_sdvo_lvds_init(struct intel_sdvo
*intel_sdvo
, u16 type
)
2899 struct drm_encoder
*encoder
= &intel_sdvo
->base
.base
;
2900 struct drm_i915_private
*i915
= to_i915(encoder
->dev
);
2901 struct drm_connector
*connector
;
2902 struct intel_connector
*intel_connector
;
2903 struct intel_sdvo_connector
*intel_sdvo_connector
;
2905 DRM_DEBUG_KMS("initialising LVDS type 0x%x\n", type
);
2907 intel_sdvo_connector
= intel_sdvo_connector_alloc();
2908 if (!intel_sdvo_connector
)
2911 intel_connector
= &intel_sdvo_connector
->base
;
2912 connector
= &intel_connector
->base
;
2913 encoder
->encoder_type
= DRM_MODE_ENCODER_LVDS
;
2914 connector
->connector_type
= DRM_MODE_CONNECTOR_LVDS
;
2916 intel_sdvo_connector
->output_flag
= type
;
2918 if (intel_sdvo_connector_init(intel_sdvo_connector
, intel_sdvo
) < 0) {
2919 kfree(intel_sdvo_connector
);
2923 if (!intel_sdvo_create_enhance_property(intel_sdvo
, intel_sdvo_connector
))
2926 intel_bios_init_panel_late(i915
, &intel_connector
->panel
, NULL
, NULL
);
2929 * Fetch modes from VBT. For SDVO prefer the VBT mode since some
2930 * SDVO->LVDS transcoders can't cope with the EDID mode.
2932 intel_panel_add_vbt_sdvo_fixed_mode(intel_connector
);
2934 if (!intel_panel_preferred_fixed_mode(intel_connector
)) {
2935 mutex_lock(&i915
->drm
.mode_config
.mutex
);
2937 intel_ddc_get_modes(connector
, connector
->ddc
);
2938 intel_panel_add_edid_fixed_modes(intel_connector
, false);
2940 mutex_unlock(&i915
->drm
.mode_config
.mutex
);
2943 intel_panel_init(intel_connector
, NULL
);
2945 if (!intel_panel_preferred_fixed_mode(intel_connector
))
2951 intel_connector_destroy(connector
);
2955 static u16
intel_sdvo_filter_output_flags(u16 flags
)
2957 flags
&= SDVO_OUTPUT_MASK
;
2959 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2960 if (!(flags
& SDVO_OUTPUT_TMDS0
))
2961 flags
&= ~SDVO_OUTPUT_TMDS1
;
2963 if (!(flags
& SDVO_OUTPUT_RGB0
))
2964 flags
&= ~SDVO_OUTPUT_RGB1
;
2966 if (!(flags
& SDVO_OUTPUT_LVDS0
))
2967 flags
&= ~SDVO_OUTPUT_LVDS1
;
2972 static bool intel_sdvo_output_init(struct intel_sdvo
*sdvo
, u16 type
)
2974 if (type
& SDVO_TMDS_MASK
)
2975 return intel_sdvo_dvi_init(sdvo
, type
);
2976 else if (type
& SDVO_TV_MASK
)
2977 return intel_sdvo_tv_init(sdvo
, type
);
2978 else if (type
& SDVO_RGB_MASK
)
2979 return intel_sdvo_analog_init(sdvo
, type
);
2980 else if (type
& SDVO_LVDS_MASK
)
2981 return intel_sdvo_lvds_init(sdvo
, type
);
2987 intel_sdvo_output_setup(struct intel_sdvo
*intel_sdvo
)
2989 static const u16 probe_order
[] = {
2992 /* TV has no XXX1 function block */
3004 flags
= intel_sdvo_filter_output_flags(intel_sdvo
->caps
.output_flags
);
3007 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%04x)\n",
3008 SDVO_NAME(intel_sdvo
), intel_sdvo
->caps
.output_flags
);
3012 for (i
= 0; i
< ARRAY_SIZE(probe_order
); i
++) {
3013 u16 type
= flags
& probe_order
[i
];
3018 if (!intel_sdvo_output_init(intel_sdvo
, type
))
3022 intel_sdvo
->base
.pipe_mask
= ~0;
3027 static void intel_sdvo_output_cleanup(struct intel_sdvo
*intel_sdvo
)
3029 struct drm_device
*dev
= intel_sdvo
->base
.base
.dev
;
3030 struct drm_connector
*connector
, *tmp
;
3032 list_for_each_entry_safe(connector
, tmp
,
3033 &dev
->mode_config
.connector_list
, head
) {
3034 if (intel_attached_encoder(to_intel_connector(connector
)) == &intel_sdvo
->base
) {
3035 drm_connector_unregister(connector
);
3036 intel_connector_destroy(connector
);
3041 static bool intel_sdvo_tv_create_property(struct intel_sdvo
*intel_sdvo
,
3042 struct intel_sdvo_connector
*intel_sdvo_connector
,
3045 struct drm_device
*dev
= intel_sdvo
->base
.base
.dev
;
3046 struct intel_sdvo_tv_format format
;
3049 if (!intel_sdvo_set_target_output(intel_sdvo
, type
))
3052 BUILD_BUG_ON(sizeof(format
) != 6);
3053 if (!intel_sdvo_get_value(intel_sdvo
,
3054 SDVO_CMD_GET_SUPPORTED_TV_FORMATS
,
3055 &format
, sizeof(format
)))
3058 memcpy(&format_map
, &format
, min(sizeof(format_map
), sizeof(format
)));
3060 if (format_map
== 0)
3063 intel_sdvo_connector
->format_supported_num
= 0;
3064 for (i
= 0 ; i
< TV_FORMAT_NUM
; i
++)
3065 if (format_map
& (1 << i
))
3066 intel_sdvo_connector
->tv_format_supported
[intel_sdvo_connector
->format_supported_num
++] = i
;
3069 intel_sdvo_connector
->tv_format
=
3070 drm_property_create(dev
, DRM_MODE_PROP_ENUM
,
3071 "mode", intel_sdvo_connector
->format_supported_num
);
3072 if (!intel_sdvo_connector
->tv_format
)
3075 for (i
= 0; i
< intel_sdvo_connector
->format_supported_num
; i
++)
3076 drm_property_add_enum(intel_sdvo_connector
->tv_format
, i
,
3077 tv_format_names
[intel_sdvo_connector
->tv_format_supported
[i
]]);
3079 intel_sdvo_connector
->base
.base
.state
->tv
.legacy_mode
= intel_sdvo_connector
->tv_format_supported
[0];
3080 drm_object_attach_property(&intel_sdvo_connector
->base
.base
.base
,
3081 intel_sdvo_connector
->tv_format
, 0);
3086 #define _ENHANCEMENT(state_assignment, name, NAME) do { \
3087 if (enhancements.name) { \
3088 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
3089 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
3091 intel_sdvo_connector->name = \
3092 drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
3093 if (!intel_sdvo_connector->name) return false; \
3094 state_assignment = response; \
3095 drm_object_attach_property(&connector->base, \
3096 intel_sdvo_connector->name, 0); \
3097 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
3098 data_value[0], data_value[1], response); \
3102 #define ENHANCEMENT(state, name, NAME) _ENHANCEMENT((state)->name, name, NAME)
3105 intel_sdvo_create_enhance_property_tv(struct intel_sdvo
*intel_sdvo
,
3106 struct intel_sdvo_connector
*intel_sdvo_connector
,
3107 struct intel_sdvo_enhancements_reply enhancements
)
3109 struct drm_device
*dev
= intel_sdvo
->base
.base
.dev
;
3110 struct drm_connector
*connector
= &intel_sdvo_connector
->base
.base
;
3111 struct drm_connector_state
*conn_state
= connector
->state
;
3112 struct intel_sdvo_connector_state
*sdvo_state
=
3113 to_intel_sdvo_connector_state(conn_state
);
3114 u16 response
, data_value
[2];
3116 /* when horizontal overscan is supported, Add the left/right property */
3117 if (enhancements
.overscan_h
) {
3118 if (!intel_sdvo_get_value(intel_sdvo
,
3119 SDVO_CMD_GET_MAX_OVERSCAN_H
,
3123 if (!intel_sdvo_get_value(intel_sdvo
,
3124 SDVO_CMD_GET_OVERSCAN_H
,
3128 sdvo_state
->tv
.overscan_h
= response
;
3130 intel_sdvo_connector
->max_hscan
= data_value
[0];
3131 intel_sdvo_connector
->left
=
3132 drm_property_create_range(dev
, 0, "left_margin", 0, data_value
[0]);
3133 if (!intel_sdvo_connector
->left
)
3136 drm_object_attach_property(&connector
->base
,
3137 intel_sdvo_connector
->left
, 0);
3139 intel_sdvo_connector
->right
=
3140 drm_property_create_range(dev
, 0, "right_margin", 0, data_value
[0]);
3141 if (!intel_sdvo_connector
->right
)
3144 drm_object_attach_property(&connector
->base
,
3145 intel_sdvo_connector
->right
, 0);
3146 DRM_DEBUG_KMS("h_overscan: max %d, "
3147 "default %d, current %d\n",
3148 data_value
[0], data_value
[1], response
);
3151 if (enhancements
.overscan_v
) {
3152 if (!intel_sdvo_get_value(intel_sdvo
,
3153 SDVO_CMD_GET_MAX_OVERSCAN_V
,
3157 if (!intel_sdvo_get_value(intel_sdvo
,
3158 SDVO_CMD_GET_OVERSCAN_V
,
3162 sdvo_state
->tv
.overscan_v
= response
;
3164 intel_sdvo_connector
->max_vscan
= data_value
[0];
3165 intel_sdvo_connector
->top
=
3166 drm_property_create_range(dev
, 0,
3167 "top_margin", 0, data_value
[0]);
3168 if (!intel_sdvo_connector
->top
)
3171 drm_object_attach_property(&connector
->base
,
3172 intel_sdvo_connector
->top
, 0);
3174 intel_sdvo_connector
->bottom
=
3175 drm_property_create_range(dev
, 0,
3176 "bottom_margin", 0, data_value
[0]);
3177 if (!intel_sdvo_connector
->bottom
)
3180 drm_object_attach_property(&connector
->base
,
3181 intel_sdvo_connector
->bottom
, 0);
3182 DRM_DEBUG_KMS("v_overscan: max %d, "
3183 "default %d, current %d\n",
3184 data_value
[0], data_value
[1], response
);
3187 ENHANCEMENT(&sdvo_state
->tv
, hpos
, HPOS
);
3188 ENHANCEMENT(&sdvo_state
->tv
, vpos
, VPOS
);
3189 ENHANCEMENT(&conn_state
->tv
, saturation
, SATURATION
);
3190 ENHANCEMENT(&conn_state
->tv
, contrast
, CONTRAST
);
3191 ENHANCEMENT(&conn_state
->tv
, hue
, HUE
);
3192 ENHANCEMENT(&conn_state
->tv
, brightness
, BRIGHTNESS
);
3193 ENHANCEMENT(&sdvo_state
->tv
, sharpness
, SHARPNESS
);
3194 ENHANCEMENT(&sdvo_state
->tv
, flicker_filter
, FLICKER_FILTER
);
3195 ENHANCEMENT(&sdvo_state
->tv
, flicker_filter_adaptive
, FLICKER_FILTER_ADAPTIVE
);
3196 ENHANCEMENT(&sdvo_state
->tv
, flicker_filter_2d
, FLICKER_FILTER_2D
);
3197 _ENHANCEMENT(sdvo_state
->tv
.chroma_filter
, tv_chroma_filter
, TV_CHROMA_FILTER
);
3198 _ENHANCEMENT(sdvo_state
->tv
.luma_filter
, tv_luma_filter
, TV_LUMA_FILTER
);
3200 if (enhancements
.dot_crawl
) {
3201 if (!intel_sdvo_get_value(intel_sdvo
, SDVO_CMD_GET_DOT_CRAWL
, &response
, 2))
3204 sdvo_state
->tv
.dot_crawl
= response
& 0x1;
3205 intel_sdvo_connector
->dot_crawl
=
3206 drm_property_create_range(dev
, 0, "dot_crawl", 0, 1);
3207 if (!intel_sdvo_connector
->dot_crawl
)
3210 drm_object_attach_property(&connector
->base
,
3211 intel_sdvo_connector
->dot_crawl
, 0);
3212 DRM_DEBUG_KMS("dot crawl: current %d\n", response
);
3219 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo
*intel_sdvo
,
3220 struct intel_sdvo_connector
*intel_sdvo_connector
,
3221 struct intel_sdvo_enhancements_reply enhancements
)
3223 struct drm_device
*dev
= intel_sdvo
->base
.base
.dev
;
3224 struct drm_connector
*connector
= &intel_sdvo_connector
->base
.base
;
3225 u16 response
, data_value
[2];
3227 ENHANCEMENT(&connector
->state
->tv
, brightness
, BRIGHTNESS
);
3234 static bool intel_sdvo_create_enhance_property(struct intel_sdvo
*intel_sdvo
,
3235 struct intel_sdvo_connector
*intel_sdvo_connector
)
3238 struct intel_sdvo_enhancements_reply reply
;
3242 BUILD_BUG_ON(sizeof(enhancements
) != 2);
3244 if (!intel_sdvo_get_value(intel_sdvo
,
3245 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS
,
3246 &enhancements
, sizeof(enhancements
)) ||
3247 enhancements
.response
== 0) {
3248 DRM_DEBUG_KMS("No enhancement is supported\n");
3252 if (IS_TV(intel_sdvo_connector
))
3253 return intel_sdvo_create_enhance_property_tv(intel_sdvo
, intel_sdvo_connector
, enhancements
.reply
);
3254 else if (IS_LVDS(intel_sdvo_connector
))
3255 return intel_sdvo_create_enhance_property_lvds(intel_sdvo
, intel_sdvo_connector
, enhancements
.reply
);
3260 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter
*adapter
,
3261 struct i2c_msg
*msgs
,
3264 struct intel_sdvo_ddc
*ddc
= adapter
->algo_data
;
3265 struct intel_sdvo
*sdvo
= ddc
->sdvo
;
3267 if (!__intel_sdvo_set_control_bus_switch(sdvo
, 1 << ddc
->ddc_bus
))
3270 return sdvo
->i2c
->algo
->master_xfer(sdvo
->i2c
, msgs
, num
);
3273 static u32
intel_sdvo_ddc_proxy_func(struct i2c_adapter
*adapter
)
3275 struct intel_sdvo_ddc
*ddc
= adapter
->algo_data
;
3276 struct intel_sdvo
*sdvo
= ddc
->sdvo
;
3278 return sdvo
->i2c
->algo
->functionality(sdvo
->i2c
);
3281 static const struct i2c_algorithm intel_sdvo_ddc_proxy
= {
3282 .master_xfer
= intel_sdvo_ddc_proxy_xfer
,
3283 .functionality
= intel_sdvo_ddc_proxy_func
3286 static void proxy_lock_bus(struct i2c_adapter
*adapter
,
3289 struct intel_sdvo_ddc
*ddc
= adapter
->algo_data
;
3290 struct intel_sdvo
*sdvo
= ddc
->sdvo
;
3292 sdvo
->i2c
->lock_ops
->lock_bus(sdvo
->i2c
, flags
);
3295 static int proxy_trylock_bus(struct i2c_adapter
*adapter
,
3298 struct intel_sdvo_ddc
*ddc
= adapter
->algo_data
;
3299 struct intel_sdvo
*sdvo
= ddc
->sdvo
;
3301 return sdvo
->i2c
->lock_ops
->trylock_bus(sdvo
->i2c
, flags
);
3304 static void proxy_unlock_bus(struct i2c_adapter
*adapter
,
3307 struct intel_sdvo_ddc
*ddc
= adapter
->algo_data
;
3308 struct intel_sdvo
*sdvo
= ddc
->sdvo
;
3310 sdvo
->i2c
->lock_ops
->unlock_bus(sdvo
->i2c
, flags
);
3313 static const struct i2c_lock_operations proxy_lock_ops
= {
3314 .lock_bus
= proxy_lock_bus
,
3315 .trylock_bus
= proxy_trylock_bus
,
3316 .unlock_bus
= proxy_unlock_bus
,
3320 intel_sdvo_init_ddc_proxy(struct intel_sdvo_ddc
*ddc
,
3321 struct intel_sdvo
*sdvo
, int ddc_bus
)
3323 struct drm_i915_private
*dev_priv
= to_i915(sdvo
->base
.base
.dev
);
3324 struct pci_dev
*pdev
= to_pci_dev(dev_priv
->drm
.dev
);
3327 ddc
->ddc_bus
= ddc_bus
;
3329 ddc
->ddc
.owner
= THIS_MODULE
;
3330 snprintf(ddc
->ddc
.name
, I2C_NAME_SIZE
, "SDVO %c DDC%d",
3331 port_name(sdvo
->base
.port
), ddc_bus
);
3332 ddc
->ddc
.dev
.parent
= &pdev
->dev
;
3333 ddc
->ddc
.algo_data
= ddc
;
3334 ddc
->ddc
.algo
= &intel_sdvo_ddc_proxy
;
3335 ddc
->ddc
.lock_ops
= &proxy_lock_ops
;
3337 return i2c_add_adapter(&ddc
->ddc
);
3340 static bool is_sdvo_port_valid(struct drm_i915_private
*dev_priv
, enum port port
)
3342 if (HAS_PCH_SPLIT(dev_priv
))
3343 return port
== PORT_B
;
3345 return port
== PORT_B
|| port
== PORT_C
;
3348 static bool assert_sdvo_port_valid(struct drm_i915_private
*dev_priv
,
3351 return !drm_WARN(&dev_priv
->drm
, !is_sdvo_port_valid(dev_priv
, port
),
3352 "Platform does not support SDVO %c\n", port_name(port
));
3355 bool intel_sdvo_init(struct drm_i915_private
*dev_priv
,
3356 i915_reg_t sdvo_reg
, enum port port
)
3358 struct intel_encoder
*intel_encoder
;
3359 struct intel_sdvo
*intel_sdvo
;
3362 if (!assert_port_valid(dev_priv
, port
))
3365 if (!assert_sdvo_port_valid(dev_priv
, port
))
3368 intel_sdvo
= kzalloc(sizeof(*intel_sdvo
), GFP_KERNEL
);
3372 /* encoder type will be decided later */
3373 intel_encoder
= &intel_sdvo
->base
;
3374 intel_encoder
->type
= INTEL_OUTPUT_SDVO
;
3375 intel_encoder
->power_domain
= POWER_DOMAIN_PORT_OTHER
;
3376 intel_encoder
->port
= port
;
3378 drm_encoder_init(&dev_priv
->drm
, &intel_encoder
->base
,
3379 &intel_sdvo_enc_funcs
, 0,
3380 "SDVO %c", port_name(port
));
3382 intel_sdvo
->sdvo_reg
= sdvo_reg
;
3383 intel_sdvo
->slave_addr
= intel_sdvo_get_slave_addr(intel_sdvo
) >> 1;
3385 intel_sdvo_select_i2c_bus(intel_sdvo
);
3387 /* Read the regs to test if we can talk to the device */
3388 for (i
= 0; i
< 0x40; i
++) {
3391 if (!intel_sdvo_read_byte(intel_sdvo
, i
, &byte
)) {
3392 drm_dbg_kms(&dev_priv
->drm
,
3393 "No SDVO device found on %s\n",
3394 SDVO_NAME(intel_sdvo
));
3399 intel_encoder
->compute_config
= intel_sdvo_compute_config
;
3400 if (HAS_PCH_SPLIT(dev_priv
)) {
3401 intel_encoder
->disable
= pch_disable_sdvo
;
3402 intel_encoder
->post_disable
= pch_post_disable_sdvo
;
3404 intel_encoder
->disable
= intel_disable_sdvo
;
3406 intel_encoder
->pre_enable
= intel_sdvo_pre_enable
;
3407 intel_encoder
->enable
= intel_enable_sdvo
;
3408 intel_encoder
->audio_enable
= intel_sdvo_enable_audio
;
3409 intel_encoder
->audio_disable
= intel_sdvo_disable_audio
;
3410 intel_encoder
->get_hw_state
= intel_sdvo_get_hw_state
;
3411 intel_encoder
->get_config
= intel_sdvo_get_config
;
3413 /* In default case sdvo lvds is false */
3414 if (!intel_sdvo_get_capabilities(intel_sdvo
, &intel_sdvo
->caps
))
3417 intel_sdvo
->colorimetry_cap
=
3418 intel_sdvo_get_colorimetry_cap(intel_sdvo
);
3420 for (i
= 0; i
< ARRAY_SIZE(intel_sdvo
->ddc
); i
++) {
3423 ret
= intel_sdvo_init_ddc_proxy(&intel_sdvo
->ddc
[i
],
3429 if (!intel_sdvo_output_setup(intel_sdvo
)) {
3430 drm_dbg_kms(&dev_priv
->drm
,
3431 "SDVO output failed to setup on %s\n",
3432 SDVO_NAME(intel_sdvo
));
3433 /* Output_setup can leave behind connectors! */
3438 * Only enable the hotplug irq if we need it, to work around noisy
3441 if (intel_sdvo
->hotplug_active
) {
3442 if (intel_sdvo
->base
.port
== PORT_B
)
3443 intel_encoder
->hpd_pin
= HPD_SDVO_B
;
3445 intel_encoder
->hpd_pin
= HPD_SDVO_C
;
3449 * Cloning SDVO with anything is often impossible, since the SDVO
3450 * encoder can request a special input timing mode. And even if that's
3451 * not the case we have evidence that cloning a plain unscaled mode with
3452 * VGA doesn't really work. Furthermore the cloning flags are way too
3453 * simplistic anyway to express such constraints, so just give up on
3454 * cloning for SDVO encoders.
3456 intel_sdvo
->base
.cloneable
= 0;
3458 /* Set the input timing to the screen. Assume always input 0. */
3459 if (!intel_sdvo_set_target_input(intel_sdvo
))
3462 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo
,
3463 &intel_sdvo
->pixel_clock_min
,
3464 &intel_sdvo
->pixel_clock_max
))
3467 drm_dbg_kms(&dev_priv
->drm
, "%s device VID/DID: %02X:%02X.%02X, "
3468 "clock range %dMHz - %dMHz, "
3470 "output 1: %c, output 2: %c\n",
3471 SDVO_NAME(intel_sdvo
),
3472 intel_sdvo
->caps
.vendor_id
, intel_sdvo
->caps
.device_id
,
3473 intel_sdvo
->caps
.device_rev_id
,
3474 intel_sdvo
->pixel_clock_min
/ 1000,
3475 intel_sdvo
->pixel_clock_max
/ 1000,
3476 intel_sdvo
->caps
.sdvo_num_inputs
,
3477 /* check currently supported outputs */
3478 intel_sdvo
->caps
.output_flags
&
3479 (SDVO_OUTPUT_TMDS0
| SDVO_OUTPUT_RGB0
|
3480 SDVO_OUTPUT_LVDS0
| SDVO_OUTPUT_SVID0
|
3481 SDVO_OUTPUT_CVBS0
| SDVO_OUTPUT_YPRPB0
) ? 'Y' : 'N',
3482 intel_sdvo
->caps
.output_flags
&
3483 (SDVO_OUTPUT_TMDS1
| SDVO_OUTPUT_RGB1
|
3484 SDVO_OUTPUT_LVDS1
) ? 'Y' : 'N');
3488 intel_sdvo_output_cleanup(intel_sdvo
);
3490 intel_sdvo_unselect_i2c_bus(intel_sdvo
);
3491 intel_sdvo_encoder_destroy(&intel_encoder
->base
);