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drm/i915: Move GEM object domain management from struct_mutex to local
[thirdparty/kernel/stable.git] / drivers / gpu / drm / i915 / i915_vma.h
1 /*
2 * Copyright © 2016 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 */
24
25 #ifndef __I915_VMA_H__
26 #define __I915_VMA_H__
27
28 #include <linux/io-mapping.h>
29 #include <linux/rbtree.h>
30
31 #include <drm/drm_mm.h>
32
33 #include "i915_gem_gtt.h"
34 #include "i915_gem_fence_reg.h"
35 #include "gem/i915_gem_object.h"
36
37 #include "i915_active.h"
38 #include "i915_request.h"
39
40 enum i915_cache_level;
41
42 /**
43 * A VMA represents a GEM BO that is bound into an address space. Therefore, a
44 * VMA's presence cannot be guaranteed before binding, or after unbinding the
45 * object into/from the address space.
46 *
47 * To make things as simple as possible (ie. no refcounting), a VMA's lifetime
48 * will always be <= an objects lifetime. So object refcounting should cover us.
49 */
50 struct i915_vma {
51 struct drm_mm_node node;
52 struct drm_i915_gem_object *obj;
53 struct i915_address_space *vm;
54 const struct i915_vma_ops *ops;
55 struct drm_i915_fence_reg *fence;
56 struct reservation_object *resv; /** Alias of obj->resv */
57 struct sg_table *pages;
58 void __iomem *iomap;
59 void *private; /* owned by creator */
60 u64 size;
61 u64 display_alignment;
62 struct i915_page_sizes page_sizes;
63
64 u32 fence_size;
65 u32 fence_alignment;
66
67 /**
68 * Count of the number of times this vma has been opened by different
69 * handles (but same file) for execbuf, i.e. the number of aliases
70 * that exist in the ctx->handle_vmas LUT for this vma.
71 */
72 unsigned int open_count;
73 unsigned long flags;
74 /**
75 * How many users have pinned this object in GTT space.
76 *
77 * This is a tightly bound, fairly small number of users, so we
78 * stuff inside the flags field so that we can both check for overflow
79 * and detect a no-op i915_vma_pin() in a single check, while also
80 * pinning the vma.
81 *
82 * The worst case display setup would have the same vma pinned for
83 * use on each plane on each crtc, while also building the next atomic
84 * state and holding a pin for the length of the cleanup queue. In the
85 * future, the flip queue may be increased from 1.
86 * Estimated worst case: 3 [qlen] * 4 [max crtcs] * 7 [max planes] = 84
87 *
88 * For GEM, the number of concurrent users for pwrite/pread is
89 * unbounded. For execbuffer, it is currently one but will in future
90 * be extended to allow multiple clients to pin vma concurrently.
91 *
92 * We also use suballocated pages, with each suballocation claiming
93 * its own pin on the shared vma. At present, this is limited to
94 * exclusive cachelines of a single page, so a maximum of 64 possible
95 * users.
96 */
97 #define I915_VMA_PIN_MASK 0xff
98 #define I915_VMA_PIN_OVERFLOW BIT(8)
99
100 /** Flags and address space this VMA is bound to */
101 #define I915_VMA_GLOBAL_BIND BIT(9)
102 #define I915_VMA_LOCAL_BIND BIT(10)
103 #define I915_VMA_BIND_MASK (I915_VMA_GLOBAL_BIND | I915_VMA_LOCAL_BIND | I915_VMA_PIN_OVERFLOW)
104
105 #define I915_VMA_GGTT BIT(11)
106 #define I915_VMA_CAN_FENCE BIT(12)
107 #define I915_VMA_CLOSED BIT(13)
108 #define I915_VMA_USERFAULT_BIT 14
109 #define I915_VMA_USERFAULT BIT(I915_VMA_USERFAULT_BIT)
110 #define I915_VMA_GGTT_WRITE BIT(15)
111
112 struct i915_active active;
113 struct i915_active_request last_fence;
114
115 /**
116 * Support different GGTT views into the same object.
117 * This means there can be multiple VMA mappings per object and per VM.
118 * i915_ggtt_view_type is used to distinguish between those entries.
119 * The default one of zero (I915_GGTT_VIEW_NORMAL) is default and also
120 * assumed in GEM functions which take no ggtt view parameter.
121 */
122 struct i915_ggtt_view ggtt_view;
123
124 /** This object's place on the active/inactive lists */
125 struct list_head vm_link;
126
127 struct list_head obj_link; /* Link in the object's VMA list */
128 struct rb_node obj_node;
129 struct hlist_node obj_hash;
130
131 /** This vma's place in the execbuf reservation list */
132 struct list_head exec_link;
133 struct list_head reloc_link;
134
135 /** This vma's place in the eviction list */
136 struct list_head evict_link;
137
138 struct list_head closed_link;
139
140 /**
141 * Used for performing relocations during execbuffer insertion.
142 */
143 unsigned int *exec_flags;
144 struct hlist_node exec_node;
145 u32 exec_handle;
146 };
147
148 struct i915_vma *
149 i915_vma_instance(struct drm_i915_gem_object *obj,
150 struct i915_address_space *vm,
151 const struct i915_ggtt_view *view);
152
153 void i915_vma_unpin_and_release(struct i915_vma **p_vma, unsigned int flags);
154 #define I915_VMA_RELEASE_MAP BIT(0)
155
156 static inline bool i915_vma_is_active(const struct i915_vma *vma)
157 {
158 return !i915_active_is_idle(&vma->active);
159 }
160
161 int __must_check i915_vma_move_to_active(struct i915_vma *vma,
162 struct i915_request *rq,
163 unsigned int flags);
164
165 static inline bool i915_vma_is_ggtt(const struct i915_vma *vma)
166 {
167 return vma->flags & I915_VMA_GGTT;
168 }
169
170 static inline bool i915_vma_has_ggtt_write(const struct i915_vma *vma)
171 {
172 return vma->flags & I915_VMA_GGTT_WRITE;
173 }
174
175 static inline void i915_vma_set_ggtt_write(struct i915_vma *vma)
176 {
177 GEM_BUG_ON(!i915_vma_is_ggtt(vma));
178 vma->flags |= I915_VMA_GGTT_WRITE;
179 }
180
181 static inline void i915_vma_unset_ggtt_write(struct i915_vma *vma)
182 {
183 vma->flags &= ~I915_VMA_GGTT_WRITE;
184 }
185
186 void i915_vma_flush_writes(struct i915_vma *vma);
187
188 static inline bool i915_vma_is_map_and_fenceable(const struct i915_vma *vma)
189 {
190 return vma->flags & I915_VMA_CAN_FENCE;
191 }
192
193 static inline bool i915_vma_is_closed(const struct i915_vma *vma)
194 {
195 return vma->flags & I915_VMA_CLOSED;
196 }
197
198 static inline bool i915_vma_set_userfault(struct i915_vma *vma)
199 {
200 GEM_BUG_ON(!i915_vma_is_map_and_fenceable(vma));
201 return __test_and_set_bit(I915_VMA_USERFAULT_BIT, &vma->flags);
202 }
203
204 static inline void i915_vma_unset_userfault(struct i915_vma *vma)
205 {
206 return __clear_bit(I915_VMA_USERFAULT_BIT, &vma->flags);
207 }
208
209 static inline bool i915_vma_has_userfault(const struct i915_vma *vma)
210 {
211 return test_bit(I915_VMA_USERFAULT_BIT, &vma->flags);
212 }
213
214 static inline u32 i915_ggtt_offset(const struct i915_vma *vma)
215 {
216 GEM_BUG_ON(!i915_vma_is_ggtt(vma));
217 GEM_BUG_ON(!vma->node.allocated);
218 GEM_BUG_ON(upper_32_bits(vma->node.start));
219 GEM_BUG_ON(upper_32_bits(vma->node.start + vma->node.size - 1));
220 return lower_32_bits(vma->node.start);
221 }
222
223 static inline u32 i915_ggtt_pin_bias(struct i915_vma *vma)
224 {
225 return i915_vm_to_ggtt(vma->vm)->pin_bias;
226 }
227
228 static inline struct i915_vma *i915_vma_get(struct i915_vma *vma)
229 {
230 i915_gem_object_get(vma->obj);
231 return vma;
232 }
233
234 static inline void i915_vma_put(struct i915_vma *vma)
235 {
236 i915_gem_object_put(vma->obj);
237 }
238
239 static __always_inline ptrdiff_t ptrdiff(const void *a, const void *b)
240 {
241 return a - b;
242 }
243
244 static inline long
245 i915_vma_compare(struct i915_vma *vma,
246 struct i915_address_space *vm,
247 const struct i915_ggtt_view *view)
248 {
249 ptrdiff_t cmp;
250
251 GEM_BUG_ON(view && !i915_is_ggtt(vm));
252
253 cmp = ptrdiff(vma->vm, vm);
254 if (cmp)
255 return cmp;
256
257 BUILD_BUG_ON(I915_GGTT_VIEW_NORMAL != 0);
258 cmp = vma->ggtt_view.type;
259 if (!view)
260 return cmp;
261
262 cmp -= view->type;
263 if (cmp)
264 return cmp;
265
266 assert_i915_gem_gtt_types();
267
268 /* ggtt_view.type also encodes its size so that we both distinguish
269 * different views using it as a "type" and also use a compact (no
270 * accessing of uninitialised padding bytes) memcmp without storing
271 * an extra parameter or adding more code.
272 *
273 * To ensure that the memcmp is valid for all branches of the union,
274 * even though the code looks like it is just comparing one branch,
275 * we assert above that all branches have the same address, and that
276 * each branch has a unique type/size.
277 */
278 BUILD_BUG_ON(I915_GGTT_VIEW_NORMAL >= I915_GGTT_VIEW_PARTIAL);
279 BUILD_BUG_ON(I915_GGTT_VIEW_PARTIAL >= I915_GGTT_VIEW_ROTATED);
280 BUILD_BUG_ON(I915_GGTT_VIEW_ROTATED >= I915_GGTT_VIEW_REMAPPED);
281 BUILD_BUG_ON(offsetof(typeof(*view), rotated) !=
282 offsetof(typeof(*view), partial));
283 BUILD_BUG_ON(offsetof(typeof(*view), rotated) !=
284 offsetof(typeof(*view), remapped));
285 return memcmp(&vma->ggtt_view.partial, &view->partial, view->type);
286 }
287
288 int i915_vma_bind(struct i915_vma *vma, enum i915_cache_level cache_level,
289 u32 flags);
290 bool i915_gem_valid_gtt_space(struct i915_vma *vma, unsigned long cache_level);
291 bool i915_vma_misplaced(const struct i915_vma *vma,
292 u64 size, u64 alignment, u64 flags);
293 void __i915_vma_set_map_and_fenceable(struct i915_vma *vma);
294 void i915_vma_revoke_mmap(struct i915_vma *vma);
295 int __must_check i915_vma_unbind(struct i915_vma *vma);
296 void i915_vma_unlink_ctx(struct i915_vma *vma);
297 void i915_vma_close(struct i915_vma *vma);
298 void i915_vma_reopen(struct i915_vma *vma);
299 void i915_vma_destroy(struct i915_vma *vma);
300
301 #define assert_vma_held(vma) reservation_object_assert_held((vma)->resv)
302
303 static inline void i915_vma_lock(struct i915_vma *vma)
304 {
305 reservation_object_lock(vma->resv, NULL);
306 }
307
308 static inline void i915_vma_unlock(struct i915_vma *vma)
309 {
310 reservation_object_unlock(vma->resv);
311 }
312
313 int __i915_vma_do_pin(struct i915_vma *vma,
314 u64 size, u64 alignment, u64 flags);
315 static inline int __must_check
316 i915_vma_pin(struct i915_vma *vma, u64 size, u64 alignment, u64 flags)
317 {
318 BUILD_BUG_ON(PIN_MBZ != I915_VMA_PIN_OVERFLOW);
319 BUILD_BUG_ON(PIN_GLOBAL != I915_VMA_GLOBAL_BIND);
320 BUILD_BUG_ON(PIN_USER != I915_VMA_LOCAL_BIND);
321
322 /* Pin early to prevent the shrinker/eviction logic from destroying
323 * our vma as we insert and bind.
324 */
325 if (likely(((++vma->flags ^ flags) & I915_VMA_BIND_MASK) == 0)) {
326 GEM_BUG_ON(!drm_mm_node_allocated(&vma->node));
327 GEM_BUG_ON(i915_vma_misplaced(vma, size, alignment, flags));
328 return 0;
329 }
330
331 return __i915_vma_do_pin(vma, size, alignment, flags);
332 }
333
334 static inline int i915_vma_pin_count(const struct i915_vma *vma)
335 {
336 return vma->flags & I915_VMA_PIN_MASK;
337 }
338
339 static inline bool i915_vma_is_pinned(const struct i915_vma *vma)
340 {
341 return i915_vma_pin_count(vma);
342 }
343
344 static inline void __i915_vma_pin(struct i915_vma *vma)
345 {
346 vma->flags++;
347 GEM_BUG_ON(vma->flags & I915_VMA_PIN_OVERFLOW);
348 }
349
350 static inline void __i915_vma_unpin(struct i915_vma *vma)
351 {
352 vma->flags--;
353 }
354
355 static inline void i915_vma_unpin(struct i915_vma *vma)
356 {
357 GEM_BUG_ON(!i915_vma_is_pinned(vma));
358 GEM_BUG_ON(!drm_mm_node_allocated(&vma->node));
359 __i915_vma_unpin(vma);
360 }
361
362 static inline bool i915_vma_is_bound(const struct i915_vma *vma,
363 unsigned int where)
364 {
365 return vma->flags & where;
366 }
367
368 /**
369 * i915_vma_pin_iomap - calls ioremap_wc to map the GGTT VMA via the aperture
370 * @vma: VMA to iomap
371 *
372 * The passed in VMA has to be pinned in the global GTT mappable region.
373 * An extra pinning of the VMA is acquired for the return iomapping,
374 * the caller must call i915_vma_unpin_iomap to relinquish the pinning
375 * after the iomapping is no longer required.
376 *
377 * Callers must hold the struct_mutex.
378 *
379 * Returns a valid iomapped pointer or ERR_PTR.
380 */
381 void __iomem *i915_vma_pin_iomap(struct i915_vma *vma);
382 #define IO_ERR_PTR(x) ((void __iomem *)ERR_PTR(x))
383
384 /**
385 * i915_vma_unpin_iomap - unpins the mapping returned from i915_vma_iomap
386 * @vma: VMA to unpin
387 *
388 * Unpins the previously iomapped VMA from i915_vma_pin_iomap().
389 *
390 * Callers must hold the struct_mutex. This function is only valid to be
391 * called on a VMA previously iomapped by the caller with i915_vma_pin_iomap().
392 */
393 void i915_vma_unpin_iomap(struct i915_vma *vma);
394
395 static inline struct page *i915_vma_first_page(struct i915_vma *vma)
396 {
397 GEM_BUG_ON(!vma->pages);
398 return sg_page(vma->pages->sgl);
399 }
400
401 /**
402 * i915_vma_pin_fence - pin fencing state
403 * @vma: vma to pin fencing for
404 *
405 * This pins the fencing state (whether tiled or untiled) to make sure the
406 * vma (and its object) is ready to be used as a scanout target. Fencing
407 * status must be synchronize first by calling i915_vma_get_fence():
408 *
409 * The resulting fence pin reference must be released again with
410 * i915_vma_unpin_fence().
411 *
412 * Returns:
413 *
414 * True if the vma has a fence, false otherwise.
415 */
416 int i915_vma_pin_fence(struct i915_vma *vma);
417 int __must_check i915_vma_put_fence(struct i915_vma *vma);
418
419 static inline void __i915_vma_unpin_fence(struct i915_vma *vma)
420 {
421 GEM_BUG_ON(vma->fence->pin_count <= 0);
422 vma->fence->pin_count--;
423 }
424
425 /**
426 * i915_vma_unpin_fence - unpin fencing state
427 * @vma: vma to unpin fencing for
428 *
429 * This releases the fence pin reference acquired through
430 * i915_vma_pin_fence. It will handle both objects with and without an
431 * attached fence correctly, callers do not need to distinguish this.
432 */
433 static inline void
434 i915_vma_unpin_fence(struct i915_vma *vma)
435 {
436 /* lockdep_assert_held(&vma->vm->i915->drm.struct_mutex); */
437 if (vma->fence)
438 __i915_vma_unpin_fence(vma);
439 }
440
441 void i915_vma_parked(struct drm_i915_private *i915);
442
443 #define for_each_until(cond) if (cond) break; else
444
445 /**
446 * for_each_ggtt_vma - Iterate over the GGTT VMA belonging to an object.
447 * @V: the #i915_vma iterator
448 * @OBJ: the #drm_i915_gem_object
449 *
450 * GGTT VMA are placed at the being of the object's vma_list, see
451 * vma_create(), so we can stop our walk as soon as we see a ppgtt VMA,
452 * or the list is empty ofc.
453 */
454 #define for_each_ggtt_vma(V, OBJ) \
455 list_for_each_entry(V, &(OBJ)->vma.list, obj_link) \
456 for_each_until(!i915_vma_is_ggtt(V))
457
458 struct i915_vma *i915_vma_alloc(void);
459 void i915_vma_free(struct i915_vma *vma);
460
461 #endif