drivers/gpu/drm/i915/intel_atomic.c

   1 /*
   2  * Copyright © 2015 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  */
  23
  24 /**
  25  * DOC: atomic modeset support
  26  *
  27  * The functions here implement the state management and hardware programming
  28  * dispatch required by the atomic modeset infrastructure.
  29  * See intel_atomic_plane.c for the plane-specific atomic functionality.
  30  */
  31
  32 #include <drm/drm_atomic.h>
  33 #include <drm/drm_atomic_helper.h>
  34 #include <drm/drm_plane_helper.h>
  35 #include "intel_drv.h"
  36
  37 /**
  38  * intel_digital_connector_atomic_get_property - hook for connector->atomic_get_property.
  39  * @connector: Connector to get the property for.
  40  * @state: Connector state to retrieve the property from.
  41  * @property: Property to retrieve.
  42  * @val: Return value for the property.
  43  *
  44  * Returns the atomic property value for a digital connector.
  45  */
  46 int intel_digital_connector_atomic_get_property(struct drm_connector *connector,
  47                                                 const struct drm_connector_state *state,
  48                                                 struct drm_property *property,
  49                                                 u64 *val)
  50 {
  51         struct drm_device *dev = connector->dev;
  52         struct drm_i915_private *dev_priv = to_i915(dev);
  53         struct intel_digital_connector_state *intel_conn_state =
  54                 to_intel_digital_connector_state(state);
  55
  56         if (property == dev_priv->force_audio_property)
  57                 *val = intel_conn_state->force_audio;
  58         else if (property == dev_priv->broadcast_rgb_property)
  59                 *val = intel_conn_state->broadcast_rgb;
  60         else {
  61                 DRM_DEBUG_ATOMIC("Unknown property [PROP:%d:%s]\n",
  62                                  property->base.id, property->name);
  63                 return -EINVAL;
  64         }
  65
  66         return 0;
  67 }
  68
  69 /**
  70  * intel_digital_connector_atomic_set_property - hook for connector->atomic_set_property.
  71  * @connector: Connector to set the property for.
  72  * @state: Connector state to set the property on.
  73  * @property: Property to set.
  74  * @val: New value for the property.
  75  *
  76  * Sets the atomic property value for a digital connector.
  77  */
  78 int intel_digital_connector_atomic_set_property(struct drm_connector *connector,
  79                                                 struct drm_connector_state *state,
  80                                                 struct drm_property *property,
  81                                                 u64 val)
  82 {
  83         struct drm_device *dev = connector->dev;
  84         struct drm_i915_private *dev_priv = to_i915(dev);
  85         struct intel_digital_connector_state *intel_conn_state =
  86                 to_intel_digital_connector_state(state);
  87
  88         if (property == dev_priv->force_audio_property) {
  89                 intel_conn_state->force_audio = val;
  90                 return 0;
  91         }
  92
  93         if (property == dev_priv->broadcast_rgb_property) {
  94                 intel_conn_state->broadcast_rgb = val;
  95                 return 0;
  96         }
  97
  98         DRM_DEBUG_ATOMIC("Unknown property [PROP:%d:%s]\n",
  99                          property->base.id, property->name);
 100         return -EINVAL;
 101 }
 102
 103 int intel_digital_connector_atomic_check(struct drm_connector *conn,
 104                                          struct drm_connector_state *new_state)
 105 {
 106         struct intel_digital_connector_state *new_conn_state =
 107                 to_intel_digital_connector_state(new_state);
 108         struct drm_connector_state *old_state =
 109                 drm_atomic_get_old_connector_state(new_state->state, conn);
 110         struct intel_digital_connector_state *old_conn_state =
 111                 to_intel_digital_connector_state(old_state);
 112         struct drm_crtc_state *crtc_state;
 113
 114         intel_hdcp_atomic_check(conn, old_state, new_state);
 115
 116         if (!new_state->crtc)
 117                 return 0;
 118
 119         crtc_state = drm_atomic_get_new_crtc_state(new_state->state, new_state->crtc);
 120
 121         /*
 122          * These properties are handled by fastset, and might not end
 123          * up in a modeset.
 124          */
 125         if (new_conn_state->force_audio != old_conn_state->force_audio ||
 126             new_conn_state->broadcast_rgb != old_conn_state->broadcast_rgb ||
 127             new_conn_state->base.picture_aspect_ratio != old_conn_state->base.picture_aspect_ratio ||
 128             new_conn_state->base.content_type != old_conn_state->base.content_type ||
 129             new_conn_state->base.scaling_mode != old_conn_state->base.scaling_mode)
 130                 crtc_state->mode_changed = true;
 131
 132         return 0;
 133 }
 134
 135 /**
 136  * intel_digital_connector_duplicate_state - duplicate connector state
 137  * @connector: digital connector
 138  *
 139  * Allocates and returns a copy of the connector state (both common and
 140  * digital connector specific) for the specified connector.
 141  *
 142  * Returns: The newly allocated connector state, or NULL on failure.
 143  */
 144 struct drm_connector_state *
 145 intel_digital_connector_duplicate_state(struct drm_connector *connector)
 146 {
 147         struct intel_digital_connector_state *state;
 148
 149         state = kmemdup(connector->state, sizeof(*state), GFP_KERNEL);
 150         if (!state)
 151                 return NULL;
 152
 153         __drm_atomic_helper_connector_duplicate_state(connector, &state->base);
 154         return &state->base;
 155 }
 156
 157 /**
 158  * intel_crtc_duplicate_state - duplicate crtc state
 159  * @crtc: drm crtc
 160  *
 161  * Allocates and returns a copy of the crtc state (both common and
 162  * Intel-specific) for the specified crtc.
 163  *
 164  * Returns: The newly allocated crtc state, or NULL on failure.
 165  */
 166 struct drm_crtc_state *
 167 intel_crtc_duplicate_state(struct drm_crtc *crtc)
 168 {
 169         struct intel_crtc_state *crtc_state;
 170
 171         crtc_state = kmemdup(crtc->state, sizeof(*crtc_state), GFP_KERNEL);
 172         if (!crtc_state)
 173                 return NULL;
 174
 175         __drm_atomic_helper_crtc_duplicate_state(crtc, &crtc_state->base);
 176
 177         crtc_state->update_pipe = false;
 178         crtc_state->disable_lp_wm = false;
 179         crtc_state->disable_cxsr = false;
 180         crtc_state->update_wm_pre = false;
 181         crtc_state->update_wm_post = false;
 182         crtc_state->fb_changed = false;
 183         crtc_state->fifo_changed = false;
 184         crtc_state->wm.need_postvbl_update = false;
 185         crtc_state->fb_bits = 0;
 186         crtc_state->update_planes = 0;
 187
 188         return &crtc_state->base;
 189 }
 190
 191 /**
 192  * intel_crtc_destroy_state - destroy crtc state
 193  * @crtc: drm crtc
 194  * @state: the state to destroy
 195  *
 196  * Destroys the crtc state (both common and Intel-specific) for the
 197  * specified crtc.
 198  */
 199 void
 200 intel_crtc_destroy_state(struct drm_crtc *crtc,
 201                          struct drm_crtc_state *state)
 202 {
 203         drm_atomic_helper_crtc_destroy_state(crtc, state);
 204 }
 205
 206 static void intel_atomic_setup_scaler(struct intel_crtc_scaler_state *scaler_state,
 207                                       int num_scalers_need, struct intel_crtc *intel_crtc,
 208                                       const char *name, int idx,
 209                                       struct intel_plane_state *plane_state,
 210                                       int *scaler_id)
 211 {
 212         struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);
 213         int j;
 214         u32 mode;
 215
 216         if (*scaler_id < 0) {
 217                 /* find a free scaler */
 218                 for (j = 0; j < intel_crtc->num_scalers; j++) {
 219                         if (scaler_state->scalers[j].in_use)
 220                                 continue;
 221
 222                         *scaler_id = j;
 223                         scaler_state->scalers[*scaler_id].in_use = 1;
 224                         break;
 225                 }
 226         }
 227
 228         if (WARN(*scaler_id < 0, "Cannot find scaler for %s:%d\n", name, idx))
 229                 return;
 230
 231         /* set scaler mode */
 232         if (plane_state && plane_state->base.fb &&
 233             plane_state->base.fb->format->is_yuv &&
 234             plane_state->base.fb->format->num_planes > 1) {
 235                 if (IS_GEN(dev_priv, 9) &&
 236                     !IS_GEMINILAKE(dev_priv)) {
 237                         mode = SKL_PS_SCALER_MODE_NV12;
 238                 } else if (icl_is_hdr_plane(to_intel_plane(plane_state->base.plane))) {
 239                         /*
 240                          * On gen11+'s HDR planes we only use the scaler for
 241                          * scaling. They have a dedicated chroma upsampler, so
 242                          * we don't need the scaler to upsample the UV plane.
 243                          */
 244                         mode = PS_SCALER_MODE_NORMAL;
 245                 } else {
 246                         mode = PS_SCALER_MODE_PLANAR;
 247
 248                         if (plane_state->linked_plane)
 249                                 mode |= PS_PLANE_Y_SEL(plane_state->linked_plane->id);
 250                 }
 251         } else if (INTEL_GEN(dev_priv) > 9 || IS_GEMINILAKE(dev_priv)) {
 252                 mode = PS_SCALER_MODE_NORMAL;
 253         } else if (num_scalers_need == 1 && intel_crtc->num_scalers > 1) {
 254                 /*
 255                  * when only 1 scaler is in use on a pipe with 2 scalers
 256                  * scaler 0 operates in high quality (HQ) mode.
 257                  * In this case use scaler 0 to take advantage of HQ mode
 258                  */
 259                 scaler_state->scalers[*scaler_id].in_use = 0;
 260                 *scaler_id = 0;
 261                 scaler_state->scalers[0].in_use = 1;
 262                 mode = SKL_PS_SCALER_MODE_HQ;
 263         } else {
 264                 mode = SKL_PS_SCALER_MODE_DYN;
 265         }
 266
 267         DRM_DEBUG_KMS("Attached scaler id %u.%u to %s:%d\n",
 268                       intel_crtc->pipe, *scaler_id, name, idx);
 269         scaler_state->scalers[*scaler_id].mode = mode;
 270 }
 271
 272 /**
 273  * intel_atomic_setup_scalers() - setup scalers for crtc per staged requests
 274  * @dev_priv: i915 device
 275  * @intel_crtc: intel crtc
 276  * @crtc_state: incoming crtc_state to validate and setup scalers
 277  *
 278  * This function sets up scalers based on staged scaling requests for
 279  * a @crtc and its planes. It is called from crtc level check path. If request
 280  * is a supportable request, it attaches scalers to requested planes and crtc.
 281  *
 282  * This function takes into account the current scaler(s) in use by any planes
 283  * not being part of this atomic state
 284  *
 285  *  Returns:
 286  *         0 - scalers were setup succesfully
 287  *         error code - otherwise
 288  */
 289 int intel_atomic_setup_scalers(struct drm_i915_private *dev_priv,
 290                                struct intel_crtc *intel_crtc,
 291                                struct intel_crtc_state *crtc_state)
 292 {
 293         struct drm_plane *plane = NULL;
 294         struct intel_plane *intel_plane;
 295         struct intel_plane_state *plane_state = NULL;
 296         struct intel_crtc_scaler_state *scaler_state =
 297                 &crtc_state->scaler_state;
 298         struct drm_atomic_state *drm_state = crtc_state->base.state;
 299         struct intel_atomic_state *intel_state = to_intel_atomic_state(drm_state);
 300         int num_scalers_need;
 301         int i;
 302
 303         num_scalers_need = hweight32(scaler_state->scaler_users);
 304
 305         /*
 306          * High level flow:
 307          * - staged scaler requests are already in scaler_state->scaler_users
 308          * - check whether staged scaling requests can be supported
 309          * - add planes using scalers that aren't in current transaction
 310          * - assign scalers to requested users
 311          * - as part of plane commit, scalers will be committed
 312          *   (i.e., either attached or detached) to respective planes in hw
 313          * - as part of crtc_commit, scaler will be either attached or detached
 314          *   to crtc in hw
 315          */
 316
 317         /* fail if required scalers > available scalers */
 318         if (num_scalers_need > intel_crtc->num_scalers){
 319                 DRM_DEBUG_KMS("Too many scaling requests %d > %d\n",
 320                         num_scalers_need, intel_crtc->num_scalers);
 321                 return -EINVAL;
 322         }
 323
 324         /* walkthrough scaler_users bits and start assigning scalers */
 325         for (i = 0; i < sizeof(scaler_state->scaler_users) * 8; i++) {
 326                 int *scaler_id;
 327                 const char *name;
 328                 int idx;
 329
 330                 /* skip if scaler not required */
 331                 if (!(scaler_state->scaler_users & (1 << i)))
 332                         continue;
 333
 334                 if (i == SKL_CRTC_INDEX) {
 335                         name = "CRTC";
 336                         idx = intel_crtc->base.base.id;
 337
 338                         /* panel fitter case: assign as a crtc scaler */
 339                         scaler_id = &scaler_state->scaler_id;
 340                 } else {
 341                         name = "PLANE";
 342
 343                         /* plane scaler case: assign as a plane scaler */
 344                         /* find the plane that set the bit as scaler_user */
 345                         plane = drm_state->planes[i].ptr;
 346
 347                         /*
 348                          * to enable/disable hq mode, add planes that are using scaler
 349                          * into this transaction
 350                          */
 351                         if (!plane) {
 352                                 struct drm_plane_state *state;
 353                                 plane = drm_plane_from_index(&dev_priv->drm, i);
 354                                 state = drm_atomic_get_plane_state(drm_state, plane);
 355                                 if (IS_ERR(state)) {
 356                                         DRM_DEBUG_KMS("Failed to add [PLANE:%d] to drm_state\n",
 357                                                 plane->base.id);
 358                                         return PTR_ERR(state);
 359                                 }
 360
 361                                 /*
 362                                  * the plane is added after plane checks are run,
 363                                  * but since this plane is unchanged just do the
 364                                  * minimum required validation.
 365                                  */
 366                                 crtc_state->base.planes_changed = true;
 367                         }
 368
 369                         intel_plane = to_intel_plane(plane);
 370                         idx = plane->base.id;
 371
 372                         /* plane on different crtc cannot be a scaler user of this crtc */
 373                         if (WARN_ON(intel_plane->pipe != intel_crtc->pipe))
 374                                 continue;
 375
 376                         plane_state = intel_atomic_get_new_plane_state(intel_state,
 377                                                                        intel_plane);
 378                         scaler_id = &plane_state->scaler_id;
 379                 }
 380
 381                 intel_atomic_setup_scaler(scaler_state, num_scalers_need,
 382                                           intel_crtc, name, idx,
 383                                           plane_state, scaler_id);
 384         }
 385
 386         return 0;
 387 }
 388
 389 struct drm_atomic_state *
 390 intel_atomic_state_alloc(struct drm_device *dev)
 391 {
 392         struct intel_atomic_state *state = kzalloc(sizeof(*state), GFP_KERNEL);
 393
 394         if (!state || drm_atomic_state_init(dev, &state->base) < 0) {
 395                 kfree(state);
 396                 return NULL;
 397         }
 398
 399         return &state->base;
 400 }
 401
 402 void intel_atomic_state_clear(struct drm_atomic_state *s)
 403 {
 404         struct intel_atomic_state *state = to_intel_atomic_state(s);
 405         drm_atomic_state_default_clear(&state->base);
 406         state->dpll_set = state->modeset = false;
 407 }