2 * Copyright © 2016 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
25 #include <drm/drm_edid.h>
26 #include <drm/drm_atomic_helper.h>
27 #include <drm/drm_dp_dual_mode_helper.h>
28 #include "intel_drv.h"
30 /* LSPCON OUI Vendor ID(signatures) */
31 #define LSPCON_VENDOR_PARADE_OUI 0x001CF8
32 #define LSPCON_VENDOR_MCA_OUI 0x0060AD
34 /* AUX addresses to write MCA AVI IF */
35 #define LSPCON_MCA_AVI_IF_WRITE_OFFSET 0x5C0
36 #define LSPCON_MCA_AVI_IF_CTRL 0x5DF
37 #define LSPCON_MCA_AVI_IF_KICKOFF (1 << 0)
38 #define LSPCON_MCA_AVI_IF_HANDLED (1 << 1)
40 /* AUX addresses to write Parade AVI IF */
41 #define LSPCON_PARADE_AVI_IF_WRITE_OFFSET 0x516
42 #define LSPCON_PARADE_AVI_IF_CTRL 0x51E
43 #define LSPCON_PARADE_AVI_IF_KICKOFF (1 << 7)
44 #define LSPCON_PARADE_AVI_IF_DATA_SIZE 32
46 static struct intel_dp
*lspcon_to_intel_dp(struct intel_lspcon
*lspcon
)
48 struct intel_digital_port
*dig_port
=
49 container_of(lspcon
, struct intel_digital_port
, lspcon
);
54 static const char *lspcon_mode_name(enum drm_lspcon_mode mode
)
57 case DRM_LSPCON_MODE_PCON
:
59 case DRM_LSPCON_MODE_LS
:
61 case DRM_LSPCON_MODE_INVALID
:
69 static bool lspcon_detect_vendor(struct intel_lspcon
*lspcon
)
71 struct intel_dp
*dp
= lspcon_to_intel_dp(lspcon
);
72 struct drm_dp_dpcd_ident
*ident
;
75 if (drm_dp_read_desc(&dp
->aux
, &dp
->desc
, drm_dp_is_branch(dp
->dpcd
))) {
76 DRM_ERROR("Can't read description\n");
80 ident
= &dp
->desc
.ident
;
81 vendor_oui
= (ident
->oui
[0] << 16) | (ident
->oui
[1] << 8) |
85 case LSPCON_VENDOR_MCA_OUI
:
86 lspcon
->vendor
= LSPCON_VENDOR_MCA
;
87 DRM_DEBUG_KMS("Vendor: Mega Chips\n");
90 case LSPCON_VENDOR_PARADE_OUI
:
91 lspcon
->vendor
= LSPCON_VENDOR_PARADE
;
92 DRM_DEBUG_KMS("Vendor: Parade Tech\n");
96 DRM_ERROR("Invalid/Unknown vendor OUI\n");
103 static enum drm_lspcon_mode
lspcon_get_current_mode(struct intel_lspcon
*lspcon
)
105 enum drm_lspcon_mode current_mode
;
106 struct i2c_adapter
*adapter
= &lspcon_to_intel_dp(lspcon
)->aux
.ddc
;
108 if (drm_lspcon_get_mode(adapter
, ¤t_mode
)) {
109 DRM_DEBUG_KMS("Error reading LSPCON mode\n");
110 return DRM_LSPCON_MODE_INVALID
;
115 static enum drm_lspcon_mode
lspcon_wait_mode(struct intel_lspcon
*lspcon
,
116 enum drm_lspcon_mode mode
)
118 enum drm_lspcon_mode current_mode
;
120 current_mode
= lspcon_get_current_mode(lspcon
);
121 if (current_mode
== mode
)
124 DRM_DEBUG_KMS("Waiting for LSPCON mode %s to settle\n",
125 lspcon_mode_name(mode
));
127 wait_for((current_mode
= lspcon_get_current_mode(lspcon
)) == mode
, 400);
128 if (current_mode
!= mode
)
129 DRM_ERROR("LSPCON mode hasn't settled\n");
132 DRM_DEBUG_KMS("Current LSPCON mode %s\n",
133 lspcon_mode_name(current_mode
));
138 static int lspcon_change_mode(struct intel_lspcon
*lspcon
,
139 enum drm_lspcon_mode mode
)
142 enum drm_lspcon_mode current_mode
;
143 struct i2c_adapter
*adapter
= &lspcon_to_intel_dp(lspcon
)->aux
.ddc
;
145 err
= drm_lspcon_get_mode(adapter
, ¤t_mode
);
147 DRM_ERROR("Error reading LSPCON mode\n");
151 if (current_mode
== mode
) {
152 DRM_DEBUG_KMS("Current mode = desired LSPCON mode\n");
156 err
= drm_lspcon_set_mode(adapter
, mode
);
158 DRM_ERROR("LSPCON mode change failed\n");
163 DRM_DEBUG_KMS("LSPCON mode changed done\n");
167 static bool lspcon_wake_native_aux_ch(struct intel_lspcon
*lspcon
)
171 if (drm_dp_dpcd_readb(&lspcon_to_intel_dp(lspcon
)->aux
, DP_DPCD_REV
,
173 DRM_DEBUG_KMS("Native AUX CH down\n");
177 DRM_DEBUG_KMS("Native AUX CH up, DPCD version: %d.%d\n",
178 rev
>> 4, rev
& 0xf);
183 void lspcon_ycbcr420_config(struct drm_connector
*connector
,
184 struct intel_crtc_state
*crtc_state
)
186 const struct drm_display_info
*info
= &connector
->display_info
;
187 const struct drm_display_mode
*adjusted_mode
=
188 &crtc_state
->base
.adjusted_mode
;
190 if (drm_mode_is_420_only(info
, adjusted_mode
) &&
191 connector
->ycbcr_420_allowed
) {
192 crtc_state
->port_clock
/= 2;
193 crtc_state
->output_format
= INTEL_OUTPUT_FORMAT_YCBCR444
;
194 crtc_state
->lspcon_downsampling
= true;
198 static bool lspcon_probe(struct intel_lspcon
*lspcon
)
201 enum drm_dp_dual_mode_type adaptor_type
;
202 struct i2c_adapter
*adapter
= &lspcon_to_intel_dp(lspcon
)->aux
.ddc
;
203 enum drm_lspcon_mode expected_mode
;
205 expected_mode
= lspcon_wake_native_aux_ch(lspcon
) ?
206 DRM_LSPCON_MODE_PCON
: DRM_LSPCON_MODE_LS
;
208 /* Lets probe the adaptor and check its type */
209 for (retry
= 0; retry
< 6; retry
++) {
211 usleep_range(500, 1000);
213 adaptor_type
= drm_dp_dual_mode_detect(adapter
);
214 if (adaptor_type
== DRM_DP_DUAL_MODE_LSPCON
)
218 if (adaptor_type
!= DRM_DP_DUAL_MODE_LSPCON
) {
219 DRM_DEBUG_KMS("No LSPCON detected, found %s\n",
220 drm_dp_get_dual_mode_type_name(adaptor_type
));
224 /* Yay ... got a LSPCON device */
225 DRM_DEBUG_KMS("LSPCON detected\n");
226 lspcon
->mode
= lspcon_wait_mode(lspcon
, expected_mode
);
229 * In the SW state machine, lets Put LSPCON in PCON mode only.
230 * In this way, it will work with both HDMI 1.4 sinks as well as HDMI
233 if (lspcon
->mode
!= DRM_LSPCON_MODE_PCON
) {
234 if (lspcon_change_mode(lspcon
, DRM_LSPCON_MODE_PCON
) < 0) {
235 DRM_ERROR("LSPCON mode change to PCON failed\n");
242 static void lspcon_resume_in_pcon_wa(struct intel_lspcon
*lspcon
)
244 struct intel_dp
*intel_dp
= lspcon_to_intel_dp(lspcon
);
245 struct intel_digital_port
*dig_port
= dp_to_dig_port(intel_dp
);
246 unsigned long start
= jiffies
;
249 if (intel_digital_port_connected(&dig_port
->base
)) {
250 DRM_DEBUG_KMS("LSPCON recovering in PCON mode after %u ms\n",
251 jiffies_to_msecs(jiffies
- start
));
255 if (time_after(jiffies
, start
+ msecs_to_jiffies(1000)))
258 usleep_range(10000, 15000);
261 DRM_DEBUG_KMS("LSPCON DP descriptor mismatch after resume\n");
264 static bool lspcon_parade_fw_ready(struct drm_dp_aux
*aux
)
270 /* Check if LSPCON FW is ready for data */
271 for (retry
= 0; retry
< 5; retry
++) {
273 usleep_range(200, 300);
275 ret
= drm_dp_dpcd_read(aux
, LSPCON_PARADE_AVI_IF_CTRL
,
278 DRM_ERROR("Failed to read AVI IF control\n");
282 if ((avi_if_ctrl
& LSPCON_PARADE_AVI_IF_KICKOFF
) == 0)
286 DRM_ERROR("Parade FW not ready to accept AVI IF\n");
290 static bool _lspcon_parade_write_infoframe_blocks(struct drm_dp_aux
*aux
,
299 while (block_count
< 4) {
300 if (!lspcon_parade_fw_ready(aux
)) {
301 DRM_DEBUG_KMS("LSPCON FW not ready, block %d\n",
306 reg
= LSPCON_PARADE_AVI_IF_WRITE_OFFSET
;
307 data
= avi_buf
+ block_count
* 8;
308 ret
= drm_dp_dpcd_write(aux
, reg
, data
, 8);
310 DRM_ERROR("Failed to write AVI IF block %d\n",
316 * Once a block of data is written, we have to inform the FW
317 * about this by writing into avi infoframe control register:
318 * - set the kickoff bit[7] to 1
319 * - write the block no. to bits[1:0]
321 reg
= LSPCON_PARADE_AVI_IF_CTRL
;
322 avi_if_ctrl
= LSPCON_PARADE_AVI_IF_KICKOFF
| block_count
;
323 ret
= drm_dp_dpcd_write(aux
, reg
, &avi_if_ctrl
, 1);
325 DRM_ERROR("Failed to update (0x%x), block %d\n",
333 DRM_DEBUG_KMS("Wrote AVI IF blocks successfully\n");
337 static bool _lspcon_write_avi_infoframe_parade(struct drm_dp_aux
*aux
,
338 const uint8_t *frame
,
341 uint8_t avi_if
[LSPCON_PARADE_AVI_IF_DATA_SIZE
] = {1, };
344 * Parade's frames contains 32 bytes of data, divided
346 * Token byte (first byte of first frame, must be non-zero)
347 * HB0 to HB2 from AVI IF (3 bytes header)
348 * PB0 to PB27 from AVI IF (28 bytes data)
349 * So it should look like this
350 * first block: | <token> <HB0-HB2> <DB0-DB3> |
351 * next 3 blocks: |<DB4-DB11>|<DB12-DB19>|<DB20-DB28>|
354 if (len
> LSPCON_PARADE_AVI_IF_DATA_SIZE
- 1) {
355 DRM_ERROR("Invalid length of infoframes\n");
359 memcpy(&avi_if
[1], frame
, len
);
361 if (!_lspcon_parade_write_infoframe_blocks(aux
, avi_if
)) {
362 DRM_DEBUG_KMS("Failed to write infoframe blocks\n");
369 static bool _lspcon_write_avi_infoframe_mca(struct drm_dp_aux
*aux
,
370 const uint8_t *buffer
, ssize_t len
)
376 const uint8_t *data
= buffer
;
378 reg
= LSPCON_MCA_AVI_IF_WRITE_OFFSET
;
380 /* DPCD write for AVI IF can fail on a slow FW day, so retry */
381 for (retry
= 0; retry
< 5; retry
++) {
382 ret
= drm_dp_dpcd_write(aux
, reg
, (void *)data
, 1);
385 } else if (retry
< 4) {
389 DRM_ERROR("DPCD write failed at:0x%x\n", reg
);
393 val
++; reg
++; data
++;
397 reg
= LSPCON_MCA_AVI_IF_CTRL
;
398 ret
= drm_dp_dpcd_read(aux
, reg
, &val
, 1);
400 DRM_ERROR("DPCD read failed, address 0x%x\n", reg
);
404 /* Indicate LSPCON chip about infoframe, clear bit 1 and set bit 0 */
405 val
&= ~LSPCON_MCA_AVI_IF_HANDLED
;
406 val
|= LSPCON_MCA_AVI_IF_KICKOFF
;
408 ret
= drm_dp_dpcd_write(aux
, reg
, &val
, 1);
410 DRM_ERROR("DPCD read failed, address 0x%x\n", reg
);
415 ret
= drm_dp_dpcd_read(aux
, reg
, &val
, 1);
417 DRM_ERROR("DPCD read failed, address 0x%x\n", reg
);
421 if (val
== LSPCON_MCA_AVI_IF_HANDLED
)
422 DRM_DEBUG_KMS("AVI IF handled by FW\n");
427 void lspcon_write_infoframe(struct intel_encoder
*encoder
,
428 const struct intel_crtc_state
*crtc_state
,
430 const void *frame
, ssize_t len
)
433 struct intel_dp
*intel_dp
= enc_to_intel_dp(&encoder
->base
);
434 struct intel_lspcon
*lspcon
= enc_to_intel_lspcon(&encoder
->base
);
436 /* LSPCON only needs AVI IF */
437 if (type
!= HDMI_INFOFRAME_TYPE_AVI
)
440 if (lspcon
->vendor
== LSPCON_VENDOR_MCA
)
441 ret
= _lspcon_write_avi_infoframe_mca(&intel_dp
->aux
,
444 ret
= _lspcon_write_avi_infoframe_parade(&intel_dp
->aux
,
448 DRM_ERROR("Failed to write AVI infoframes\n");
452 DRM_DEBUG_DRIVER("AVI infoframes updated successfully\n");
455 void lspcon_set_infoframes(struct intel_encoder
*encoder
,
457 const struct intel_crtc_state
*crtc_state
,
458 const struct drm_connector_state
*conn_state
)
461 union hdmi_infoframe frame
;
462 uint8_t buf
[VIDEO_DIP_DATA_SIZE
];
463 struct intel_digital_port
*dig_port
= enc_to_dig_port(&encoder
->base
);
464 struct intel_lspcon
*lspcon
= &dig_port
->lspcon
;
465 struct intel_dp
*intel_dp
= &dig_port
->dp
;
466 struct drm_connector
*connector
= &intel_dp
->attached_connector
->base
;
467 const struct drm_display_mode
*mode
= &crtc_state
->base
.adjusted_mode
;
468 bool is_hdmi2_sink
= connector
->display_info
.hdmi
.scdc
.supported
;
470 if (!lspcon
->active
) {
471 DRM_ERROR("Writing infoframes while LSPCON disabled ?\n");
475 ret
= drm_hdmi_avi_infoframe_from_display_mode(&frame
.avi
,
476 mode
, is_hdmi2_sink
);
478 DRM_ERROR("couldn't fill AVI infoframe\n");
482 if (crtc_state
->output_format
== INTEL_OUTPUT_FORMAT_YCBCR444
) {
483 if (crtc_state
->lspcon_downsampling
)
484 frame
.avi
.colorspace
= HDMI_COLORSPACE_YUV420
;
486 frame
.avi
.colorspace
= HDMI_COLORSPACE_YUV444
;
488 frame
.avi
.colorspace
= HDMI_COLORSPACE_RGB
;
491 drm_hdmi_avi_infoframe_quant_range(&frame
.avi
, mode
,
492 crtc_state
->limited_color_range
?
493 HDMI_QUANTIZATION_RANGE_LIMITED
:
494 HDMI_QUANTIZATION_RANGE_FULL
,
495 false, is_hdmi2_sink
);
497 ret
= hdmi_infoframe_pack(&frame
, buf
, sizeof(buf
));
499 DRM_ERROR("Failed to pack AVI IF\n");
503 dig_port
->write_infoframe(encoder
, crtc_state
, HDMI_INFOFRAME_TYPE_AVI
,
507 bool lspcon_infoframe_enabled(struct intel_encoder
*encoder
,
508 const struct intel_crtc_state
*pipe_config
)
510 return enc_to_intel_lspcon(&encoder
->base
)->active
;
513 void lspcon_resume(struct intel_lspcon
*lspcon
)
515 enum drm_lspcon_mode expected_mode
;
517 if (lspcon_wake_native_aux_ch(lspcon
)) {
518 expected_mode
= DRM_LSPCON_MODE_PCON
;
519 lspcon_resume_in_pcon_wa(lspcon
);
521 expected_mode
= DRM_LSPCON_MODE_LS
;
524 if (lspcon_wait_mode(lspcon
, expected_mode
) == DRM_LSPCON_MODE_PCON
)
527 if (lspcon_change_mode(lspcon
, DRM_LSPCON_MODE_PCON
))
528 DRM_ERROR("LSPCON resume failed\n");
530 DRM_DEBUG_KMS("LSPCON resume success\n");
533 void lspcon_wait_pcon_mode(struct intel_lspcon
*lspcon
)
535 lspcon_wait_mode(lspcon
, DRM_LSPCON_MODE_PCON
);
538 bool lspcon_init(struct intel_digital_port
*intel_dig_port
)
540 struct intel_dp
*dp
= &intel_dig_port
->dp
;
541 struct intel_lspcon
*lspcon
= &intel_dig_port
->lspcon
;
542 struct drm_device
*dev
= intel_dig_port
->base
.base
.dev
;
543 struct drm_i915_private
*dev_priv
= to_i915(dev
);
544 struct drm_connector
*connector
= &dp
->attached_connector
->base
;
546 if (!HAS_LSPCON(dev_priv
)) {
547 DRM_ERROR("LSPCON is not supported on this platform\n");
551 lspcon
->active
= false;
552 lspcon
->mode
= DRM_LSPCON_MODE_INVALID
;
554 if (!lspcon_probe(lspcon
)) {
555 DRM_ERROR("Failed to probe lspcon\n");
559 if (!intel_dp_read_dpcd(dp
)) {
560 DRM_ERROR("LSPCON DPCD read failed\n");
564 if (!lspcon_detect_vendor(lspcon
)) {
565 DRM_ERROR("LSPCON vendor detection failed\n");
569 connector
->ycbcr_420_allowed
= true;
570 lspcon
->active
= true;
571 DRM_DEBUG_KMS("Success: LSPCON init\n");