drivers/gpu/drm/msm/disp/mdp5/mdp5_pipe.h

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /*
   3  * Copyright (C) 2016 Red Hat
   4  * Author: Rob Clark <robdclark@gmail.com>
   5  */
   6
   7 #ifndef __MDP5_PIPE_H__
   8 #define __MDP5_PIPE_H__
   9
  10 /* TODO: Add SSPP_MAX in mdp5.xml.h */
  11 #define SSPP_MAX        (SSPP_CURSOR1 + 1)
  12
  13 /* represents a hw pipe, which is dynamically assigned to a plane */
  14 struct mdp5_hw_pipe {
  15         int idx;
  16
  17         const char *name;
  18         enum mdp5_pipe pipe;
  19
  20         uint32_t reg_offset;
  21         uint32_t caps;
  22
  23         uint32_t flush_mask;      /* used to commit pipe registers */
  24
  25         /* number of smp blocks per plane, ie:
  26          *   nblks_y | (nblks_u << 8) | (nblks_v << 16)
  27          */
  28         uint32_t blkcfg;
  29 };
  30
  31 /* global atomic state of assignment between pipes and planes: */
  32 struct mdp5_hw_pipe_state {
  33         struct drm_plane *hwpipe_to_plane[SSPP_MAX];
  34 };
  35
  36 int mdp5_pipe_assign(struct drm_atomic_state *s, struct drm_plane *plane,
  37                      uint32_t caps, uint32_t blkcfg,
  38                      struct mdp5_hw_pipe **hwpipe,
  39                      struct mdp5_hw_pipe **r_hwpipe);
  40 void mdp5_pipe_release(struct drm_atomic_state *s, struct mdp5_hw_pipe *hwpipe);
  41
  42 struct mdp5_hw_pipe *mdp5_pipe_init(enum mdp5_pipe pipe,
  43                 uint32_t reg_offset, uint32_t caps);
  44 void mdp5_pipe_destroy(struct mdp5_hw_pipe *hwpipe);
  45
  46 #endif /* __MDP5_PIPE_H__ */